https://bugzilla.kernel.org/show_bug.cgi?id=210479
alaps...@fastmail.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugzilla.kernel.org/show_bug.cgi?id=210479
--- Comment #2 from alaps...@fastmail.com ---
Alex, thank you very much.
This was exactly it. I had CONFIG_DRM_AMD_DC_DCN3_0 unset. After enabling it
everything seems to work fine, including XServer.
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[AMD Public Use]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Arnd Bergmann
> Sent: Friday, December 4, 2020 7:07 AM
> To: Deucher, Alexander ; Koenig, Christian
> ; David Airlie ; Daniel Vetter
> ; Li, Dennis ; Zhou1, Tao
> ; Chen, Guchun
> Cc: Arnd Bergmann ; Zhang, Hawking
>
> On Dec 3, 2020, at 10:12, Daniel Vetter wrote:
>
> On Thu, Dec 03, 2020 at 03:06:20AM +, Zack Rusin wrote:
>>
>>
>>> On Dec 2, 2020, at 11:03, Daniel Vetter wrote:
>>>
>>> On Wed, Dec 2, 2020 at 4:37 PM Zack Rusin wrote:
> On Dec 2, 2020, at 09:27, Thomas
Hi guys,
This series of patches implements a pending list for
jobs which are in the hardware, and a done list for
tasks which are done and need to be freed.
As tasks complete and call their DRM callback, their
fences are signalled and tasks are added to the done
list and the main scheduler
The drm_sched_job_done() callback now moves done
jobs from the pending list to a "done" list.
In drm_sched_job_timeout, make use of the status
returned by a GPU driver job timeout handler to
decide whether to leave the oldest job in the
pending list, or to send it off to the done list.
If a
The job done callback is called from various
places, in two ways: in job done role, and
as a fence callback role.
Essentialize the callback to an atom
function to just complete the job,
and into a second function as a prototype
of fence callback which calls to complete
the job.
This is used in
Rename "ring_mirror_list" to "pending_list",
to describe what something is, not what it does,
how it's used, or how the hardware implements it.
This also abstracts the actual hardware
implementation, i.e. how the low-level driver
communicates with the device it drives, ring, CAM,
etc., shouldn't
The driver's job timeout handler now returns
status indicating back to the DRM layer whether
the task (job) was successfully aborted or whether
more time should be given to the task to complete.
Default behaviour as of this patch, is preserved,
except in obvious-by-comment case in the Panfrost
Rename "node" to "list" in struct drm_sched_job,
in order to make it consistent with what we see
being used throughout gpu_scheduler.h, for
instance in struct drm_sched_entity, as well as
the rest of DRM and the kernel.
Signed-off-by: Luben Tuikov
Reviewed-by: Christian König
Cc: Alexander
Hi Linus,
This week's regular fixes. i915 has fixes for a few races,
use-after-free, gpu hangs,
tegra just has some minor fixes that I didn't see much point in
hanging on to. The
nouveau fix is for all pre-nv50 cards and was reported a few times.
Otherwise it's
just some amdgpu, and a few misc
From: Arnd Bergmann
The iommu pgtable support is only available when IOMMU support
is built into the kernel:
WARNING: unmet direct dependencies detected for IOMMU_IO_PGTABLE
Depends on [n]: IOMMU_SUPPORT [=n]
Selected by [y]:
- DRM_MSM [=y] && HAS_IOMEM [=y] && DRM [=y] && (ARCH_QCOM [=y]
From: Arnd Bergmann
There is still a warning when CONFIG_DEBUG_FS is disabled:
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1145:13: error:
'amdgpu_ras_debugfs_create_ctrl_node' defined but not used
[-Werror=unused-function]
1145 | static void amdgpu_ras_debugfs_create_ctrl_node(struct
Hi Tian,
> > + ret = devm_add_action_or_reset(dev->dev, devm_drm_irq_uninstall, dev);
> > + if (ret)
> > + devm_drm_irq_uninstall(dev);
> devm_add_action_or_reset() will call devm_drm_irq_uninstall() if ret is
> != 0. See include/device.h.
>
> I guess that is the "_or_reset" part
https://bugzilla.kernel.org/show_bug.cgi?id=209123
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
On Tue, Sep 29, 2020 at 4:04 PM Alex Deucher wrote:
>
> On Tue, Sep 29, 2020 at 8:31 AM Jan Kiszka wrote:
> >
> > On 10.09.20 20:18, Deucher, Alexander wrote:
> > > [AMD Public Use]
> > >
> > >
> > >
> > >> -Original Message-
> > >> From: amd-gfx On Behalf Of
> > >> Daniel Vetter
> > >>
https://bugzilla.kernel.org/show_bug.cgi?id=210467
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
Hi Tomi,
On Thu, Dec 03, 2020 at 01:52:21PM +0200, Tomi Valkeinen wrote:
> Hi DRM Bridge maintainers,
>
> On 30/11/2020 13:29, Tomi Valkeinen wrote:
> > Hi,
> >
> > This series adds the DT bindings and a driver for DisplayPort connector.
> >
> > Minor changes since v3:
> > - Added Laurent's
On Thu, Dec 3, 2020 at 8:13 PM Sumera Priyadarsini
wrote:
>
> Update the vkms documentation to contain steps to:
>
> - setup the vkms driver
> - run tests using igt
>
> Signed-off-by: Sumera Priyadarsini
> ---
> Documentation/gpu/vkms.rst | 47 ++
> 1 file
On Thu, Dec 3, 2020 at 7:55 PM James Park wrote:
>
> The trailing underscore for DRM_FOURCC_STANDALONE_ isn't intentional, right?
> Should I put all the integer types, or just the ones that are used in that
> file?
Yeah that trailing _ just slipped in. And I'd just do the types
already used.
On Thu, Dec 03, 2020 at 07:59:04PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 03.12.20 um 16:26 schrieb Daniel Vetter:
> > On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:
> > > Dma-buf's vmap and vunmap callbacks are undocumented and various
> > > exporters currently have
On Tue, Nov 24, 2020 at 12:57:43PM -0600, Bjorn Andersson wrote:
> A combination of recent bug fixes by Doug Anderson and the proper
> definition of iommu streams means that this hack is no longer needed.
> Let's clean up the code by reverting '127068abe85b ("i2c: qcom-geni:
> Disable DMA
Hi Tian.
On Wed, Dec 02, 2020 at 04:47:14PM +0800, Tian Tao wrote:
> Add new api devm_drm_irq_install() to register interrupts,
> no need to call drm_irq_uninstall() when the drm module is removed.
>
> Signed-off-by: Tian Tao
Just a few details to fix.
Sam
> ---
>
https://bugzilla.kernel.org/show_bug.cgi?id=94061
--- Comment #12 from mirh (m...@protonmail.ch) ---
I see that [amdgpu_]kv_smc_bapm_enable is equivalent, but the condition
guarding it seems quite different.
Then I'm not really pretending to understand much else about the two kv_dpms.
--
You
Update the vkms documentation to contain steps to:
- setup the vkms driver
- run tests using igt
Signed-off-by: Sumera Priyadarsini
---
Documentation/gpu/vkms.rst | 47 ++
1 file changed, 47 insertions(+)
diff --git a/Documentation/gpu/vkms.rst
Hi
Am 03.12.20 um 16:26 schrieb Daniel Vetter:
On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:
Dma-buf's vmap and vunmap callbacks are undocumented and various
exporters currently have slightly different semantics for them. Add
documentation on how to implement and use these
https://bugzilla.kernel.org/show_bug.cgi?id=210479
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
https://bugzilla.kernel.org/show_bug.cgi?id=94061
--- Comment #11 from Alex Deucher (alexdeuc...@gmail.com) ---
The dpm code for kaveri is identical for both radeon and amdgpu.
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Hi Marek
On Wed, 12 Aug 2020 at 21:07, Sam Ravnborg wrote:
>
> Hi Marek.
>
> On Sun, Aug 09, 2020 at 12:57:04PM +0200, Marek Vasut wrote:
> > Add DT bindings for Toshiba TC358762 DSI-to-DPI bridge, this
> > one is used in the Raspberry Pi 7" touchscreen display unit.
> >
> > Signed-off-by: Marek
https://bugzilla.kernel.org/show_bug.cgi?id=94061
mirh (m...@protonmail.ch) changed:
What|Removed |Added
CC||m...@protonmail.ch
---
https://bugzilla.kernel.org/show_bug.cgi?id=78111
mirh (m...@protonmail.ch) changed:
What|Removed |Added
CC||m...@protonmail.ch
---
https://bugzilla.kernel.org/show_bug.cgi?id=210479
Bug ID: 210479
Summary: amdgpu: Monitor connected to RX 6800XT loses signal
when module is loaded
Product: Drivers
Version: 2.5
Kernel Version: 5.10.0-rc6
Hardware:
input_bus_flags are specified in drm_bridge_timings (legacy) as well
as drm_bridge_state->input_bus_cfg.flags
The flags from the timings will be deprecated. Bridges are supposed
to validate and set the bridge state flags from atomic_check.
Implement atomic_check hook for the same.
On Thu, Dec 3, 2020 at 5:11 PM Peter Rosin wrote:
>
> Hi!
>
> On 2020-12-03 15:42, Chuhong Yuan wrote:
> > setcmap_legacy() does not call drm_modeset_unlock_all() in some exits,
> > add the missed unlocks with goto to fix it.
> >
> > Fixes: 964c60063bff ("drm/fb-helper: separate the fb_setcmap
On 03/12/2020 14:31, Ville Syrjälä wrote:
> BTW I have some gamma related stuff here
> git://github.com/vsyrjala/linux.git fb_helper_c8_lut_4
>
> which tries to fix some fb_helper gamma stuff, and I'm also
> getting rid of the gamma_store stuff for the leacy uapi for
> drivers which implement
On 12/2/2020 10:00 PM, Jordan Crouse wrote:
On Wed, Dec 02, 2020 at 08:53:51PM +0530, Akhil P Oommen wrote:
On 11/30/2020 10:32 PM, Jordan Crouse wrote:
On Fri, Nov 27, 2020 at 06:19:44PM +0530, Akhil P Oommen wrote:
So far a530v2 gpu has support for detecting its supported opps
based on a
Dim will probably reject that without a one line as commit message.
Am 03.12.20 um 17:02 schrieb Lucas Stach:
Signed-off-by: Lucas Stach
Apart from that Reviewed-by: Christian König
---
drivers/gpu/drm/scheduler/sched_main.c | 2 --
1 file changed, 2 deletions(-)
diff --git
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/scheduler/sched_main.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/scheduler/sched_main.c
b/drivers/gpu/drm/scheduler/sched_main.c
index 9a0d77a68018..f517ffd53847 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++
Hi DRM Bridge maintainers,
On 30/11/2020 13:29, Tomi Valkeinen wrote:
> Hi,
>
> This series adds the DT bindings and a driver for DisplayPort connector.
>
> Minor changes since v3:
> - Added Laurent's reviewed-bys
> - Added $ref to graph schema
> - Use 'ret' instead of 'r'
> - Add the missing
Hi,
The first patch fix legacy gamma table for HW which have a degamma lut
block before CTM block, but no gamma lut after the CTM.
The second one cleans up the legacy gamma support a bit by handling
legacy gamma for modern drivers in the drm core.
Tomi
Tomi Valkeinen (2):
drm: add legacy
We currently have drm_atomic_helper_legacy_gamma_set() helper which can
be used to handle legacy gamma-set ioctl.
drm_atomic_helper_legacy_gamma_set() sets GAMMA_LUT, and clears
CTM and DEGAMMA_LUT. This works fine on HW where we have either:
degamma -> ctm -> gamma -> out
or
ctm -> gamma ->
To support legacy gamma ioctls the drivers need to set
drm_crtc_funcs.gamma_set either to a custom implementation or to
drm_atomic_helper_legacy_gamma_set. Most of the atomic drivers do the
latter.
We can simplify this by making the core handle it automatically.
Add two functions:
On Thu, Dec 03, 2020 at 03:02:59PM +0100, Thomas Zimmermann wrote:
> Dma-buf's vmap and vunmap callbacks are undocumented and various
> exporters currently have slightly different semantics for them. Add
> documentation on how to implement and use these interfaces correctly.
>
> v2:
> *
Hi Maxime
On Thu, 3 Dec 2020 at 13:25, Maxime Ripard wrote:
>
> Hi,
>
> Here's a series adding support for the DSI0 controller in the BCM2835 and the
> DSI1 controller found in the BCM2711.
>
> Let me know what you think,
> Maxime
Thanks for that series - your using a variant structure is much
On Thu, Dec 03, 2020 at 03:06:20AM +, Zack Rusin wrote:
>
>
> > On Dec 2, 2020, at 11:03, Daniel Vetter wrote:
> >
> > On Wed, Dec 2, 2020 at 4:37 PM Zack Rusin wrote:
> >>
> >>
> >>
> >>> On Dec 2, 2020, at 09:27, Thomas Zimmermann wrote:
> >>>
> >>> Hi
> >>>
> >>> Am 02.12.20 um
On Thu, Dec 3, 2020 at 9:18 AM Michel Dänzer wrote:
>
> On 2020-12-02 8:47 p.m., James Park wrote:
> >
> > If we're trying to cut ties with the drm-uapi folder entirely, the stuff
> > ac_surface.c need includes the AMD_FMT_MOD stuff in drm_fourcc.h,
> > and AMDGPU_TILING_* under amdgpu_drm.h. Is
Am 03.12.20 um 15:02 schrieb Thomas Zimmermann:
GEM VRAM helpers used to pin the BO in their implementation of vmap, so
that they could not be relocated. In a recent discussion, [1] it became
Grrr, [1] was again supposed to point to the discussion at
Dma-buf's vmap and vunmap callbacks are undocumented and various
exporters currently have slightly different semantics for them. Add
documentation on how to implement and use these interfaces correctly.
v2:
* document vmap semantics in struct dma_buf_ops
* add TODO item for
The HW cursor's BO used to be mapped permanently into the kernel's
address space. GEM's vmap operation will be protected by locks, and
we don't want to lock the BO's for an indefinate period of time.
Change the cursor code to map the HW BOs only during updates. The
vmap operation in VRAM helpers
Overlapping or nested mappings of the same BO are not allowed by the
semantics of the GEM vmap/vunmap operations. Concurent access to the
GEM object is prevented by reservation locks.
So we don't need the reference counter in the GEM VRAM object. Remove
it.
Signed-off-by: Thomas Zimmermann
---
Implementations of the vmap/vunmap callbacks may expect that the caller
holds the reservation lock. Therefore push the locking from vmap and
vunmap into the callers.
This affects fbdev emulation, and cursor updates in ast and vboxvideo.
Ast and vboxvideo acquire the BO's reservation lock
After removing the pinning operations, the vmap/vunmap code as been
reduced to what used to be an internal helper. Inline the helper to
simplify the implementation.
Signed-off-by: Thomas Zimmermann
Acked-by: Christian König
---
drivers/gpu/drm/drm_gem_vram_helper.c | 52
BO pinning was never meant to be part of a GEM object's vmap operation.
Remove it from the related code in VRAM helpers.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_gem_vram_helper.c | 16 +---
1 file changed, 1 insertion(+), 15 deletions(-)
diff --git
GEM VRAM helpers used to pin the BO in their implementation of vmap, so
that they could not be relocated. In a recent discussion, [1] it became
clear that this is incorrect and that vmap should rather repend on the
reservation lock to prevent relocation. This patchset addresses the issue.
Version
Vmapping the cursor source BO contains an implicit pin operation,
so there's no need to do this manually.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/ast/ast_cursor.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/ast/ast_cursor.c
Hi Dave and Daniel,
Please ignore the pull request I had sent yesterday and use only this one.
I had missed one patch: 14d1eaf08845 ("drm/i915/gt: Protect context lifetime
with RCU").
Also, please notice that the commit 6db58901c2aa ("drm/i915/display: return
earlier from
There is a copy and paste bug in this code. It's supposed to check
"obj2" instead of checking "obj" a second time.
Fixes: 80f0b679d6f0 ("drm/i915: Add an implementation for i915_gem_ww_ctx
locking, v2.")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/selftests/i915_gem.c | 4 ++--
1
From: Krzysztof Kozlowski
[ Upstream commit e2d3d2e904ad3d381753798dcd5cae03e3c47242 ]
The Exynos DRM uses Common Clock Framework thus it cannot be built on
platforms without it (e.g. compile test on MIPS with RALINK and
SOC_RT305X):
/usr/bin/mips-linux-gnu-ld:
Quoting Andi Shyti (2020-12-03 11:12:24)
> Hi Dan,
>
> > There is a copy and paste bug in this code. It's supposed to check
> > "obj2" instead of checking "obj" a second time.
> >
> > Fixes: 80f0b679d6f0 ("drm/i915: Add an implementation for i915_gem_ww_ctx
> > locking, v2.")
> >
On Thursday, December 3, 2020 1:54 PM, Ville Syrjälä
wrote:
> > The drm_fourcc.h maybe makes some sense (I think in some places mesa
> > uses these internally, and many drivers use the modifiers directly in
> > the main driver). But the amdgpu header should be all ioctl stuff,
> > which should
On Wed, Dec 02, 2020 at 11:25:58PM +0100, Daniel Vetter wrote:
> On Wed, Dec 2, 2020 at 8:48 PM James Park wrote:
> >
> > I can avoid modifying drm.h by doing this to drm_fourcc.h:
> >
> > #ifdef _WIN32
> > #include
> > typedef uint64_t __u64;
> > #else
> > #include "drm.h"
> > #endif
> >
> >
On Wed, Dec 02, 2020 at 01:38:42PM +0100, Daniel Vetter wrote:
> On Wed, Dec 2, 2020 at 12:52 PM Tomi Valkeinen wrote:
> >
> > On 30/11/2020 16:10, Daniel Vetter wrote:
> >
> > > The thing is, the legacy helpers should be able to pull off what userspace
> > > needs to do when it's using atomic
On Wed, Nov 25, 2020 at 05:29:39PM +, Robin Murphy wrote:
> The only user of tlb_flush_leaf is a particularly hairy corner of the
> Arm short-descriptor code, which wants a synchronous invalidation to
> minimise the races inherent in trying to split a large page mapping.
> This is already far
https://bugzilla.kernel.org/show_bug.cgi?id=210467
Alexey (intervio...@gmail.com) changed:
What|Removed |Added
Summary|Vega 3 lock MCLK on 1200mhz |amdgpu Vega 3 lock MCLK
https://bugzilla.kernel.org/show_bug.cgi?id=210467
--- Comment #3 from Alexey (intervio...@gmail.com) ---
Created attachment 293917
--> https://bugzilla.kernel.org/attachment.cgi?id=293917=edit
dmesg debug mode
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--- Comment #2 from Alexey (intervio...@gmail.com) ---
Created attachment 293915
--> https://bugzilla.kernel.org/attachment.cgi?id=293915=edit
dmesg
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https://bugzilla.kernel.org/show_bug.cgi?id=210467
--- Comment #1 from Alexey (intervio...@gmail.com) ---
*** Bug 210465 has been marked as a duplicate of this bug. ***
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Alexey (intervio...@gmail.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugzilla.kernel.org/show_bug.cgi?id=210467
Bug ID: 210467
Summary: Vega 3 lock MCLK on 1200mhz
Product: Drivers
Version: 2.5
Kernel Version: 5.9.11, 5.4.80-2
Hardware: x86-64
OS: Linux
Tree: Mainline
https://bugzilla.kernel.org/show_bug.cgi?id=210465
Bug ID: 210465
Summary: Vega 3 lock MCLK on 1200mhz
Product: Drivers
Version: 2.5
Kernel Version: 5.9.11, 5.4.80-2
Hardware: x86-64
OS: Linux
Tree: Mainline
Hi Dan,
> There is a copy and paste bug in this code. It's supposed to check
> "obj2" instead of checking "obj" a second time.
>
> Fixes: 80f0b679d6f0 ("drm/i915: Add an implementation for i915_gem_ww_ctx
> locking, v2.")
> Signed-off-by: Dan Carpenter
> ---
>
Quoting Dan Carpenter (2020-12-03 08:45:17)
> There is a copy and paste bug in this code. It's supposed to check
> "obj2" instead of checking "obj" a second time.
>
> Fixes: 80f0b679d6f0 ("drm/i915: Add an implementation for i915_gem_ww_ctx
> locking, v2.")
> Signed-off-by: Dan Carpenter
> ---
On Thu, Dec 3, 2020 at 9:41 AM Dan Carpenter wrote:
>
> The main problem with this error handling was that it didn't clean up if
> i2c_add_numbered_adapter() failed. This code is pretty old, and doesn't
> match with today's checkpatch.pl standards so I took the opportunity to
> tidy it up a bit.
Hi
Am 03.12.20 um 10:05 schrieb Tian Tao:
Deletted the entire file hibmc_ttm.c. drmm_vram_helper_init() can be
Deletted -> Delete
Here and in the subject line.
called directly from hibmc_load(). hibmc_dumb_create() and
hibmc_mode_funcs can go to hibmc_drm_drv.c
Signed-off-by: Tian Tao
On Wed, 2 Dec 2020 23:25:58 +0100
Daniel Vetter wrote:
> Also kinda disappointing that drm_fourcc.h includes drm.h and isn't
> standalone, but I guess that sailed (at least for linux).
Hi,
FWIW, libweston core needs drm_fourcc.h too, even if nothing would ever
use DRM or need libdrm otherwise.
The main problem with this error handling was that it didn't clean up if
i2c_add_numbered_adapter() failed. This code is pretty old, and doesn't
match with today's checkpatch.pl standards so I took the opportunity to
tidy it up a bit. I changed the NULL comparison, and removed the
WARNING
On 2020-12-02 8:47 p.m., James Park wrote:
If we're trying to cut ties with the drm-uapi folder entirely, the stuff
ac_surface.c need includes the AMD_FMT_MOD stuff in drm_fourcc.h,
and AMDGPU_TILING_* under amdgpu_drm.h. Is there a better spot for these
definitions?
The Mesa src/amd/ code
Use devm_drm_irq_install to register interrupts so that
drm_irq_uninstall is not called when hibmc is removed.
Signed-off-by: Tian Tao
Reviewed-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Artifically use 'plane' and 'old_plane_state' to avoid 'not used' warning.
The precedent has already been set by other macros in the same file.
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
include/drm/drm_atomic.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Add Plymovent Group BV BAS iMX6dl based board
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
Plymovent BAS is a base system controller produced for the Plymovent filter
systems.
Co-Developed-by: David Jander
Signed-off-by: David Jander
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-plybas.dts | 394
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 35 +++
include/drm/drm_irq.h | 2 +-
2 files changed, 36 insertions(+), 1
Uwe Kleine-König writes:
> Hello Michael,
>
> On Sat, Nov 28, 2020 at 09:48:30AM +0100, Takashi Iwai wrote:
>> On Thu, 26 Nov 2020 17:59:50 +0100,
>> Uwe Kleine-König wrote:
>> >
>> > The driver core ignores the return value of struct device_driver::remove
>> > because there is only little that
Hi
在 2020/12/2 17:02, Thomas Zimmermann 写道:
Am 02.12.20 um 09:47 schrieb Tian Tao:
Use the devm_drm_dev_alloc provided by the drm framework to alloc
a structure hibmc_drm_private.
Signed-off-by: Tian Tao
This looks good now. Thanks for sticking to it.
Thank you for your continued
This patch adds bindings for i.MX8qxp/qm Display Processing Unit.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v1->v2:
* Fix yamllint warnings.
*
patch #1 is code refactorings to use devm_drm_dev_alloc.
patch #2 add the new api to install irq, patch #3 is hibmc driver uses
the newly added api to register interrupts.
Tian Tao (3):
drm/hisilicon: Code refactoring for hibmc_drm_drv
drm/irq: Add the new api to install irq
drm/hisilicon:
If the definitions in drm_fourcc.h make sense to live there, and we can't
remove drm.h from that header for backward compatibility, and the code that
I'm trying to compile on Windows needs the definitions in drm_fourcc.h,
then doesn't it make sense to adjust drm.h?
The patch that I'm proposing
Hi Ionela,
On 12/2/20 10:24 AM, Ionela Voinescu wrote:
Hi Lukasz,
On Wednesday 18 Nov 2020 at 12:03:56 (+), Lukasz Luba wrote:
[snip]
+ struct device_node *np = NULL;
[snip]
+
+ if (dev->of_node)
+ np = of_node_get(dev->of_node);
+
Should np be checked
Add "ply" entry for Plymovent Group BV: https://www.plymovent.com/
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
Plymovent M2M is a control interface produced for the Plymovent filter
systems.
Co-Developed-by: David Jander
Signed-off-by: David Jander
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6dl-plym2m.dts | 446
2
Use the devm_drm_dev_alloc provided by the drm framework to alloc
a structure hibmc_drm_private.
Signed-off-by: Tian Tao
Acked-by: Thomas Zimmermann
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c | 2 +-
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c | 46 +++-
The infoframes are sent at a regular interval as a data island packet,
so we don't need to wait for them to be sent when we're setting them up.
However, we do need to poll when we're enabling since the we can't
update the packet RAM until it has been sent.
Let's add a boolean flag to tell
On Wednesday 18 Nov 2020 at 12:03:57 (+), Lukasz Luba wrote:
> Remove old power model and use new Energy Model to calculate the power
> budget. It drops static + dynamic power calculations and power table
> in order to use Energy Model performance domain data. This model
> should be easy to
Reorder it alphabetically and remove one double entry.
Signed-off-by: Oleksij Rempel
---
.../bindings/display/panel/panel-simple.yaml | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
Add new api devm_drm_irq_install() to register interrupts,
no need to call drm_irq_uninstall() when the drm module is removed.
Signed-off-by: Tian Tao
---
drivers/gpu/drm/drm_irq.c | 32
include/drm/drm_irq.h | 2 +-
2 files changed, 33 insertions(+), 1
On Wednesday 18 Nov 2020 at 12:03:55 (+), Lukasz Luba wrote:
> Devfreq cooling needs to now the correct status of the device in order
> to operate. Do not rely on Devfreq last_status which might be a stale data
> and get more up-to-date values of the load.
>
> Devfreq framework can change the
This will allow Mesa to port code to Windows more easily.
Hide BSD header and drm_handle_t behind _WIN32 check.
Change __volatile__ to volatile, which is standard.
Signed-off-by: James Park
---
include/uapi/drm/drm.h | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff
This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Channel.
Signed-off-by: Liu Ying
---
Note that this depends on the 'two cell binding' clock patch set which has
already landed in Shawn's i.MX clk/imx git branch. Otherwise, imx8-lpcg.h
won't be found.
v1->v2:
* Use new dt
Add myself as the maintainer of the i.MX8qxp DPU DRM driver.
Signed-off-by: Liu Ying
---
v1->v2:
* No change.
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 970d9ce..dee4586 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5834,6 +5834,15
Hi,
This patch set introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support.
DPU is comprised of a blit engine for 2D graphics, a display controller
and a command sequencer. Outside of DPU, optional prefetch engines can
fetch data from memory prior to some DPU fetchunits of blit engine
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