Hi Martin,
What kind of panel does Galaxy Note 10.1 use? I guess it uses I80
panel which needs CPU-trigger.
If so, you may need to check if the panel device works correctly after
booting because FIMD will incur vsync timeout if the panel doesn't
work.
I think you could try to check if te signal
On Fri, Jun 3, 2022 at 5:38 PM Stephen Rothwell wrote:
>
> Hi Rob,
>
> On Fri, 3 Jun 2022 07:58:14 -0700 Rob Clark wrote:
> >
> > will the truncated subject confuse the scripts that look for patches
> > to backport to stable, ie. do we *really* have to rewrite history to
> > fix this?
>
> I
Hi Rob,
On Fri, 3 Jun 2022 07:58:14 -0700 Rob Clark wrote:
>
> will the truncated subject confuse the scripts that look for patches
> to backport to stable, ie. do we *really* have to rewrite history to
> fix this?
I don't know what scripts are being used and what they expect, but our
On Fri, Jun 03, 2022 at 10:20:25AM +0300, Lionel Landwerlin wrote:
On 02/06/2022 23:35, Jason Ekstrand wrote:
On Thu, Jun 2, 2022 at 3:11 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
>On Wed, Jun 01, 2022 at
On 6/3/2022 12:02 AM, Dmitry Baryshkov wrote:
On Fri, 3 Jun 2022 at 04:02, Jessica Zhang wrote:
On 6/2/2022 3:51 PM, Dmitry Baryshkov wrote:
On 28/05/2022 01:23, Jessica Zhang wrote:
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for
[+amd-gfx]
On 2022-06-03 15:37, Felix Kuehling wrote:
On 2022-06-03 06:46, Christian König wrote:
Resources about to be destructed are not tied to BOs any more.
I've been seeing a backtrace in that area with a patch series I'm
working on, but didn't have enough time to track it down yet.
On 6/2/2022 1:24 PM, Dmitry Baryshkov wrote:
Replace superfluous cfg_init functions, which just assign a static
config to the struct dpu_mdss_cfg, with static instances of struct
dpu_mdss_cfg.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
On Wed, Jun 1, 2022 at 10:24 AM Joel Selvaraj wrote:
> Add DRM panel driver for EBBG FT8719 6.18" 2246x1080 DSI video mode
> panel, which can be found on some Xiaomi Poco F1 phones. The panel's
> backlight is managed through QCOM WLED driver.
>
> Signed-off-by: Joel Selvaraj
> Reviewed-by: Sam
On Wed, Jun 1, 2022 at 10:24 AM Joel Selvaraj wrote:
> A helper macro that can be used to simplify sending DCS commands.
> It is useful in scenarios like panel initialization which can sometimes
> involve sending lot of DCS commands.
>
> Signed-off-by: Joel Selvaraj
Reviewed-by: Linus Walleij
Any one has any comments?
Thanks,
On 5/27/2022 2:32 PM, Kuogee Hsieh wrote:
During display resolution changes display have to be disabled first
followed by display enabling with new resolution. Display disable
will turn off both pixel clock and main link clock so that main link
have to be re
During msm initialize phase, dp_display_unbind() will be called to undo
initializations had been done by dp_display_bind() previously if there is
error happen at msm_drm_bind. In this case, core_initialized flag had to
be check to make sure clocks is on before update DP controller register
to
At msm initialize phase, msm_drm_init() is called to initialize modules
sequentially. It will call msm_drm_uninit() to clean up initialized phase
if any module initialization return failed. This patch move msm_irq_install()
to the last step of msm_drm_init() after all modules are initialized
system crash due to NOC fatal error if any module initialization faield
during msm_drm_init()
Kuogee Hsieh (2):
drm/msm: enable msm irq after all initializations are done
successfully at msm_drm_init()
drm/msm/dp: check core_initialized before disable interrupts at
dp_display_unbind()
Having one fence for a vgfb would cause conflict in case there are
multiple planes referencing the same vgfb (e.g. Xorg screen covering
two displays in extended mode) being flushed simultaneously. So it makes
sence to use a separated fence for each plane update to prevent this.
vgfb->fence is not
virtio_gpu_fence_release is added to free virtio-gpu-fence
upon release of dma_fence.
Cc: Gurchetan Singh
Cc: Gerd Hoffmann
Cc: Vivek Kasireddy
Signed-off-by: Dongwon Kim
---
drivers/gpu/drm/virtio/virtgpu_fence.c | 8
1 file changed, 8 insertions(+)
diff --git
Current primary plane update flow when blob is enabled (for zero copy
display sharing) shows fence synchronization problems when multi planes
are referencing a same single large FB (i.e. multi displays in extended
mode). This is because there is only one fence bound to the FB and this
single fence
Use quic id instead of codeaurora id in maintainers list
for display devicetree bindings.
Signed-off-by: Kuogee Hsieh
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hello! This is just a reminder that the CFP for XDC in 2022 is still open!
The 2022 X.Org Developers Conference is being held in conjunction with
the 2022 Wine Developers Conference. This is a meeting to bring
together developers working on all things open graphics (Linux kernel,
Mesa, DRM,
Hello! This is just a reminder that the CFP for XDC in 2022 is still open!
The 2022 X.Org Developers Conference is being held in conjunction with
the 2022 Wine Developers Conference. This is a meeting to bring
together developers working on all things open graphics (Linux kernel,
Mesa, DRM,
On 2022-06-03 06:46, Christian König wrote:
Resources about to be destructed are not tied to BOs any more.
I've been seeing a backtrace in that area with a patch series I'm
working on, but didn't have enough time to track it down yet. I'll try
if this patch fixes it.
Regards,
Felix
On Fri, Jun 3, 2022 at 8:41 PM Christian König wrote:
>
> Am 03.06.22 um 19:50 schrieb Bas Nieuwenhuizen:
> > [SNIP]
> Yeah, but that's exactly the bubble we try to avoid. Isn't it?
> >>> For this series, not really. To clarify there are two sides for
> >>> getting GPU bubbles and no
The pull request you sent on Fri, 3 Jun 2022 13:49:48 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-next-2022-06-03-1
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/ab18b7b36a82b1900687c5718f7d46f0d8e77d86
Thank you!
--
Deet-doot-dot, I am a bot.
Am 03.06.22 um 19:50 schrieb Bas Nieuwenhuizen:
[SNIP]
Yeah, but that's exactly the bubble we try to avoid. Isn't it?
For this series, not really. To clarify there are two sides for
getting GPU bubbles and no overlap:
(1) VM operations implicitly wait for earlier CS submissions
(2) CS
On Jun 3, 2022, at 11:49 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd, 2022 at 17:32, Zack Rusin
mailto:za...@vmware.com>> wrote:
On Jun 3, 2022, at 11:22 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd, 2022
On Fri, Jun 3, 2022 at 7:42 PM Christian König wrote:
>
> Am 03.06.22 um 15:23 schrieb Bas Nieuwenhuizen:
> > On Fri, Jun 3, 2022 at 2:49 PM Christian König
> > wrote:
> >> Am 03.06.22 um 14:39 schrieb Bas Nieuwenhuizen:
> >>> On Fri, Jun 3, 2022 at 2:08 PM Christian König
> >>> wrote:
>
Am 03.06.22 um 15:23 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 2:49 PM Christian König wrote:
Am 03.06.22 um 14:39 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 2:08 PM Christian König wrote:
Am 03.06.22 um 13:07 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 12:16 PM
On Tue, May 24, 2022 at 01:39:33PM +0300, Jani Nikula wrote:
> HDMI 2.1 section 10.3.6 defines an HDMI Forum EDID Extension Override
> Data Block, which may contain a different extension count than the base
> block claims. Add support for reading more EDID data if available. The
> extra blocks
> >
> > > +
> > > +#define MT6370_AICR_400MA0x6
> > > +#define MT6370_ICHG_500MA0x4
> > > +#define MT6370_ICHG_900MA0x8
> > > +
> > > +#define ADC_CONV_TIME_US 35000
> > > +#define ADC_CONV_POLLING_TIME1000
> > > +
> > > +struct
On Fri, Jun 03, 2022 at 10:19:09AM +0300, Pekka Paalanen wrote:
> On Thu, 2 Jun 2022 19:40:01 +0300
> Ville Syrjälä wrote:
>
> > On Thu, Jun 02, 2022 at 10:47:59AM +0300, Pekka Paalanen wrote:
> > > On Wed, 1 Jun 2022 17:06:25 +0300
> > > Ville Syrjälä wrote:
> > >
>
> ...
>
> > > > The
Remove error message about scaling & replace it by a debug
message to avoid too much error.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index
Zpos property is immutable for all hardware versions except the last
version (0x40100) which support the blending order feature
(dynamic z-order).
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/drv.c | 1 +
drivers/gpu/drm/stm/ltdc.c | 23 ---
On Friday, June 3rd, 2022 at 17:32, Zack Rusin wrote:
> > On Jun 3, 2022, at 11:22 AM, Simon Ser wrote:
> > ⚠ External Email
> >
> > On Friday, June 3rd, 2022 at 17:17, Zack Rusin wrote:
> >
> >
> > >
> > >
> > > > On Jun 3, 2022, at 10:56 AM, Simon Ser wrote:
> > > > ⚠ External Email
> > >
On Jun 3, 2022, at 11:22 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd, 2022 at 17:17, Zack Rusin
mailto:za...@vmware.com>> wrote:
On Jun 3, 2022, at 10:56 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd,
On Friday, June 3rd, 2022 at 17:17, Zack Rusin wrote:
>
> > On Jun 3, 2022, at 10:56 AM, Simon Ser wrote:
> > ⚠ External Email
> >
> > On Friday, June 3rd, 2022 at 16:38, Zack Rusin wrote:
> >
> > > > On Jun 3, 2022, at 10:32 AM, Simon Ser wrote:
> > > >
> > > > ⚠ External Email
> > > >
> > >
All plans must be disabled before the CRTC shutdown helping
the crtc to restart from a clean situation (without unwanted
planes already enable).
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/stm/ltdc.c
Hi,
On Fri, Jun 3, 2022 at 8:11 AM Sean Paul wrote:
>
> On Mon, May 23, 2022 at 5:51 PM Brian Norris wrote:
> >
> > On Thu, Mar 10, 2022 at 3:50 PM Brian Norris
> > wrote:
> > > On Mon, Feb 28, 2022 at 12:25 PM Brian Norris
> > > wrote:
> >
> > > Ping for review? Sean, perhaps? (You already
On Jun 3, 2022, at 10:56 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd, 2022 at 16:38, Zack Rusin
mailto:za...@vmware.com>> wrote:
On Jun 3, 2022, at 10:32 AM, Simon Ser
mailto:cont...@emersion.fr>> wrote:
⚠ External Email
On Friday, June 3rd,
Fix issues reported by checkpatch.pl:
- Braces {} should be used on all arms
- Blank lines
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index
On Mon, May 23, 2022 at 5:51 PM Brian Norris wrote:
>
> On Thu, Mar 10, 2022 at 3:50 PM Brian Norris wrote:
> > On Mon, Feb 28, 2022 at 12:25 PM Brian Norris
> > wrote:
>
> > Ping for review? Sean, perhaps? (You already reviewed this on the
> > Chromium tracker.)
>
> Ping
Apologies for the
Support of vertical & horizontal mirroring features thanks to
the plane rotation property.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 163 -
drivers/gpu/drm/stm/ltdc.h | 1 +
2 files changed, 108 insertions(+), 56 deletions(-)
diff
On Thu, Jun 2, 2022 at 10:16 PM Stephen Rothwell wrote:
>
> Hi all,
>
> In commit
>
> 8caad14e7224 ("drm/msm/dpu: Fix pointer dereferenced before checking")
>
> Fixes tag
>
> Fixes: d7d0e73f7de33 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for
>
> has these problem(s):
>
> - Subject has
On Friday, June 3rd, 2022 at 16:38, Zack Rusin wrote:
> > On Jun 3, 2022, at 10:32 AM, Simon Ser wrote:
> >
> > ⚠ External Email
> >
> > On Friday, June 3rd, 2022 at 16:27, Zack Rusin wrote:
> >
> >>> In particular: since the driver will ignore the KMS cursor plane
> >>> position set by
Hi,
On Fri, Jun 3, 2022 at 7:14 AM Maxime Ripard wrote:
>
> On Fri, Jun 03, 2022 at 01:19:16PM +0300, Dmitry Baryshkov wrote:
> > On Fri, 3 Jun 2022 at 11:21, Maxime Ripard wrote:
> > >
> > > On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> > > > On Mon, May 23, 2022 at 10:00 AM
A: http://en.wikipedia.org/wiki/Top_post
Q: Were do I find info about this thing called top-posting?
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
A: No.
Q: Should I
> On Jun 3, 2022, at 6:28 AM, Gerd Hoffmann wrote:
>
> ⚠ External Email
>
> Hi,
>
>> the legacy kms to atomic. This left virtualized drivers, all which
>> are atomic, in a weird spot because all userspace compositors put
>> those drivers on deny-lists for atomic kms due to the fact that
> On Jun 3, 2022, at 10:32 AM, Simon Ser wrote:
>
> ⚠ External Email
>
> On Friday, June 3rd, 2022 at 16:27, Zack Rusin wrote:
>
>>> In particular: since the driver will ignore the KMS cursor plane
>>> position set by user-space, I don't think it's okay to just expose
>>> without opt-in
On Fri, 3 Jun 2022 at 16:04, Jagan Teki wrote:
>
> TI DLPC3433 is a MIPI DSI based display controller bridge
> for processing high resolution DMD based projectors.
>
> It has a flexible configuration of MIPI DSI and DPI signal
> input that produces a DMD output in RGB565, RGB666, RGB888
>
On Friday, June 3rd, 2022 at 16:27, Zack Rusin wrote:
> > In particular: since the driver will ignore the KMS cursor plane
> > position set by user-space, I don't think it's okay to just expose
> > without opt-in from user-space (e.g. with a DRM_CLIENT_CAP).
> >
> > cc wayland-devel and Pekka
> On Jun 3, 2022, at 10:14 AM, Simon Ser wrote:
>
> Hi,
>
> Please, read this thread:
>
On Thu, 2022-06-02 at 16:30 -0700, Matt Roper wrote:
> We missed this setting in the initial device info patch's definition of
> XE_HPC_FEATURES.
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: Matt Roper
> ---
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> 1 file changed, 1 insertion(+)
>
On Fri, Jun 03, 2022 at 11:57:35AM +0300, Roman Stratiienko wrote:
> Hi Maxime,
>
> пт, 3 июн. 2022 г. в 11:24, Maxime Ripard :
> >
> > Hi,
> >
> > On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> > > According to DE2.0/DE3.0 manual VI scaler enable register is double
> > >
On Fri, Jun 03, 2022 at 06:52:05AM -0700, Doug Anderson wrote:
> On Fri, Jun 3, 2022 at 3:19 AM Dmitry Baryshkov
> wrote:
> > On Fri, 3 Jun 2022 at 11:21, Maxime Ripard wrote:
> > >
> > > On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> > > > On Mon, May 23, 2022 at 10:00 AM Doug
Hi,
Please, read this thread:
https://lists.freedesktop.org/archives/dri-devel/2020-March/thread.html#259615
It has a lot of information about the pitfalls of cursor hotspot and
other things done by VM software.
In particular: since the driver will ignore the KMS cursor plane
position set by
On Fri, Jun 03, 2022 at 01:19:16PM +0300, Dmitry Baryshkov wrote:
> On Fri, 3 Jun 2022 at 11:21, Maxime Ripard wrote:
> >
> > On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> > > On Mon, May 23, 2022 at 10:00 AM Doug Anderson
> > > wrote:
> > > > On Sat, May 21, 2022 at 2:17 AM
TI DLPC3433 is a MIPI DSI based display controller bridge
for processing high resolution DMD based projectors.
It has a flexible configuration of MIPI DSI and DPI signal
input that produces a DMD output in RGB565, RGB666, RGB888
formats.
It supports upto 720p resolution with 60 and 120 Hz
TI DLPC3433 is a MIPI DSI based display controller bridge
for processing high resolution DMD based projectors.
It has a flexible configuration of MIPI DSI and DPI signal
input that produces a DMD output in RGB565, RGB666, RGB888
formats.
It supports upto 720p resolution with 60 and 120 Hz
On 6/3/22 16:27, Miaoqian Lin wrote:
> of_get_child_by_name() returns a node pointer with refcount
> incremented, we should use of_node_put() on it when not need anymore.
> So add of_node_put() in error paths.
>
> Fixes: d8f4a9eda006 ("drm: Add NVIDIA Tegra20 support")
> Signed-off-by: Miaoqian
The latest hardware version (0x40100) supports a hardware threshold
register (aka FUTR) to trigger a fifo underrun interrupt.
A software threshold has been implemented for other hardware versions.
The threshold is set to 128 by default.
Signed-off-by: Yannick Fertre
---
Hi,
On Fri, Jun 3, 2022 at 3:19 AM Dmitry Baryshkov
wrote:
>
> On Fri, 3 Jun 2022 at 11:21, Maxime Ripard wrote:
> >
> > On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> > > On Mon, May 23, 2022 at 10:00 AM Doug Anderson
> > > wrote:
> > > > On Sat, May 21, 2022 at 2:17 AM
of_get_child_by_name() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
So add of_node_put() in error paths.
Fixes: d8f4a9eda006 ("drm: Add NVIDIA Tegra20 support")
Signed-off-by: Miaoqian Lin
---
changes in v2:
- update Fixes tag.
v1
On Fri, Jun 3, 2022 at 2:49 PM Christian König wrote:
>
> Am 03.06.22 um 14:39 schrieb Bas Nieuwenhuizen:
> > On Fri, Jun 3, 2022 at 2:08 PM Christian König
> > wrote:
> >> Am 03.06.22 um 13:07 schrieb Bas Nieuwenhuizen:
> >>> On Fri, Jun 3, 2022 at 12:16 PM Christian König
> >>> wrote:
>
From: Martin Krastev
On 2.06.22 г. 18:42 ч., Zack Rusin wrote:
From: Zack Rusin
Atomic modesetting got support for mouse hotspots via the hotspot
properties. Drivers need to create those properties on cursor planes
which require the mouse hotspot coordinates.
Add the code creating hotspot
Am 03.06.22 um 14:39 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 2:08 PM Christian König wrote:
Am 03.06.22 um 13:07 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 12:16 PM Christian König
wrote:
Am 03.06.22 um 12:08 schrieb Bas Nieuwenhuizen:
[SNIP]
I do have to fix some stuff
On Fri, Jun 3, 2022 at 2:08 PM Christian König wrote:
>
> Am 03.06.22 um 13:07 schrieb Bas Nieuwenhuizen:
> > On Fri, Jun 3, 2022 at 12:16 PM Christian König
> > wrote:
> >> Am 03.06.22 um 12:08 schrieb Bas Nieuwenhuizen:
> >>> [SNIP]
> > I do have to fix some stuff indeed, especially for
Track the pid per submit, so we can print the name and cmdline of
the task which submitted the batch that caused the gpu to hang.
Signed-off-by: Christian Gmeiner
---
drivers/gpu/drm/etnaviv/etnaviv_gem.h| 1 +
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 6 ++
Am 03.06.22 um 13:07 schrieb Bas Nieuwenhuizen:
On Fri, Jun 3, 2022 at 12:16 PM Christian König
wrote:
Am 03.06.22 um 12:08 schrieb Bas Nieuwenhuizen:
[SNIP]
I do have to fix some stuff indeed, especially for the GEM close but
with that we should be able to keep the same basic approach?
On 06/03, Peter Robinson wrote:
> Runtime PM doesn't seem to work correctly on this driver. On top of
> that, commit 8b6864e3e138 ("drm/v3d/v3d_drv: Remove unused static
> variable 'v3d_v3d_pm_ops'") hints that it most likely never did as the
> driver's PM ops were not hooked-up.
>
> So, in order
On Fri, Jun 3, 2022 at 12:16 PM Christian König
wrote:
>
> Am 03.06.22 um 12:08 schrieb Bas Nieuwenhuizen:
> > [SNIP]
> >>> I do have to fix some stuff indeed, especially for the GEM close but
> >>> with that we should be able to keep the same basic approach?
> >> Nope, not even remotely.
> >>
>
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Friday, June 3, 2022 3:07 PM
> To: Vinod Polimera (QUIC) ; dri-
> de...@lists.freedesktop.org; linux-arm-...@vger.kernel.org;
> freedr...@lists.freedesktop.org; devicet...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org;
Resources about to be destructed are not tied to BOs any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_device.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_device.c b/drivers/gpu/drm/ttm/ttm_device.c
index
Hi,
> the legacy kms to atomic. This left virtualized drivers, all which
> are atomic, in a weird spot because all userspace compositors put
> those drivers on deny-lists for atomic kms due to the fact that mouse
> clicks were incorrectly routed, e.g:
> - all userspace code needs to hardcore a
On Fri, 3 Jun 2022 at 11:21, Maxime Ripard wrote:
>
> On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> > On Mon, May 23, 2022 at 10:00 AM Doug Anderson
> > wrote:
> > > On Sat, May 21, 2022 at 2:17 AM Maxime Ripard wrote:
> > > > On Tue, May 10, 2022 at 12:29:43PM -0700,
Am 03.06.22 um 12:08 schrieb Bas Nieuwenhuizen:
[SNIP]
I do have to fix some stuff indeed, especially for the GEM close but
with that we should be able to keep the same basic approach?
Nope, not even remotely.
What we need is the following:
1. Rolling out my drm_exec patch set, so that we can
On Fri, Jun 3, 2022 at 10:11 AM Christian König
wrote:
>
> Am 03.06.22 um 03:21 schrieb Bas Nieuwenhuizen:
> > [SNIP]
> >> The problem is we need to wait on fences *not* added to the buffer object.
> > What fences wouldn't be added to the buffer object that we need here?
>
> Basically all still
On 03/06/2022 12:42, Vinod Polimera wrote:
During probe defer, drm device is not initialized and an external
trigger to shutdown is trying to clean up drm device leading to crash.
Add checks to avoid drm device cleanup in such cases.
BUG: unable to handle kernel NULL pointer dereference at
On 03/06/2022 12:42, Vinod Polimera wrote:
During probe defer, drm device is not initialized and an external
trigger to shutdown is trying to clean up drm device leading to crash.
Add checks to avoid drm device cleanup in such cases.
BUG: unable to handle kernel NULL pointer dereference at
During probe defer, drm device is not initialized and an external
trigger to shutdown is trying to clean up drm device leading to crash.
Add checks to avoid drm device cleanup in such cases.
BUG: unable to handle kernel NULL pointer dereference at virtual
address 00b8
Call trace:
On 5/16/22 13:02, cyn...@kapsi.fi wrote:
> Hi all,
>
> This series adds support for Host1x and VIC on the recently released
> Tegra234 (Orin) SoC. It's split into the following parts:
>
> * Device tree binding updates
> * Cleanup in host1x driver
> * Add programming of new registers and old
On 03/06/2022 12:22, Vinod Polimera wrote:
During probe defer, drm device is not initialized and an external
trigger to shutdown is trying to clean up drm device leading to crash.
Add checks to avoid drm device cleanup in such cases.
BUG: unable to handle kernel NULL pointer dereference at
If dp modeset init is failed due to panel being not ready and
probe defers during drm bind, avoid clearing irqs and dereference
hw_intr when hw_intr is null.
BUG: Unable to handle kernel NULL pointer dereference at virtual address
Call trace:
dpu_core_irq_uninstall+0x50/0xb0
BCM2711, the SoC used on the Raspberry Pi 4 has a different 3D
render GPU IP than its predecessors. Enable it it on multi v7
and bcm2835 configs.
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Peter Robinson
Reviewed-by: Stefan Wahren
Reviewed-by: Javier Martinez Canillas
---
Changes
This adds the entry for V3D for bcm2711 (used in the Raspberry Pi 4)
and the associated firmware clock entry.
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Peter Robinson
Reviewed-by: Javier Martinez Canillas
---
Changes since v5:
- Update the compatible to match the other updated ones
From: Nicolas Saenz Julienne
BCM2711, the SoC used on the Raspberry Pi 4 has a different GPU than its
predecessors. Enable it.
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Peter Robinson
Reviewed-by: Stefan Wahren
Reviewed-by: Javier Martinez Canillas
---
Add compatible string and Kconfig options and help for bcm2711.
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Peter Robinson
Reviewed-by: Stefan Wahren
Reviewed-by: Javier Martinez Canillas
---
Changes since v5:
- Update help text to cover all supported SoCs
Changes since v4:
- Change
BCM2711, Raspberry Pi 4's SoC, contains a V3D core. So add its specific
compatible to the bindings.
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Peter Robinson
Reviewed-by: Stefan Wahren
Reviewed-by: Javier Martinez Canillas
Acked-by: Rob Herring
---
Changes since v4:
- Change
Runtime PM doesn't seem to work correctly on this driver. On top of
that, commit 8b6864e3e138 ("drm/v3d/v3d_drv: Remove unused static
variable 'v3d_v3d_pm_ops'") hints that it most likely never did as the
driver's PM ops were not hooked-up.
So, in order to support regular operation with V3D on
This is a follow up from my v4 patchset. The power management pieces have
been split out to a separate independent set of patches by Stefan [1]. This
version 5 of the DRM patches are independent and given the V3D driver has
been upstream for some time the two patches to enable it in defconfigs can
During probe defer, drm device is not initialized and an external
trigger to shutdown is trying to clean up drm device leading to crash.
Add checks to avoid drm device cleanup in such cases.
BUG: unable to handle kernel NULL pointer dereference at virtual
address 00b8
Call trace:
Hi Maxime,
пт, 3 июн. 2022 г. в 11:24, Maxime Ripard :
>
> Hi,
>
> On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> > According to DE2.0/DE3.0 manual VI scaler enable register is double
> > buffered, but de facto it doesn't, or the hardware has the shadow
> > register latching
Hi,
On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> According to DE2.0/DE3.0 manual VI scaler enable register is double
> buffered, but de facto it doesn't, or the hardware has the shadow
> register latching issues which causes single-frame picture corruption
> after changing
On Tue, May 31, 2022 at 02:06:34PM -0700, Doug Anderson wrote:
> On Mon, May 23, 2022 at 10:00 AM Doug Anderson wrote:
> > On Sat, May 21, 2022 at 2:17 AM Maxime Ripard wrote:
> > > On Tue, May 10, 2022 at 12:29:43PM -0700, Douglas Anderson wrote:
> > > > This adds a devm managed version of
Am 03.06.22 um 03:21 schrieb Bas Nieuwenhuizen:
[SNIP]
The problem is we need to wait on fences *not* added to the buffer object.
What fences wouldn't be added to the buffer object that we need here?
Basically all still running submissions from the VM which could
potentially access the BO.
LoongArch maintains cache coherency in hardware, but its WUC attribute
(Weak-ordered UnCached, which is similar to WC) is out of the scope of
cache coherency machanism. This means WUC can only used for write-only
memory regions.
Cc: Daniel Vetter
Cc: dri-devel@lists.freedesktop.org
Reviewed-by:
On 02/06/2022 23:35, Jason Ekstrand wrote:
On Thu, Jun 2, 2022 at 3:11 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
>On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
>> On 17/05/2022 21:32, Niranjana
On Thu, 2 Jun 2022 19:40:01 +0300
Ville Syrjälä wrote:
> On Thu, Jun 02, 2022 at 10:47:59AM +0300, Pekka Paalanen wrote:
> > On Wed, 1 Jun 2022 17:06:25 +0300
> > Ville Syrjälä wrote:
> >
...
> > > The "Colorspace" property just changes what we report to the display
> > > via
Hi Ondrej,
пт, 3 июн. 2022 г. в 00:55, Ondřej Jirman :
>
> Hi Roman,
>
> On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> > According to DE2.0/DE3.0 manual VI scaler enable register is double
> > buffered, but de facto it doesn't, or the hardware has the shadow
> > register
On Wed, 2022-06-01 at 12:02 +0100, Peter Robinson wrote:
> Runtime PM doesn't seem to work correctly on this driver. On top of
> that, commit 8b6864e3e138 ("drm/v3d/v3d_drv: Remove unused static
> variable 'v3d_v3d_pm_ops'") hints that it most likely never did as the
> driver's PM ops were not
On Fri, 3 Jun 2022 at 04:00, Jessica Zhang wrote:
>
>
>
> On 6/2/2022 3:31 PM, Dmitry Baryshkov wrote:
> > On 27/05/2022 23:11, Jessica Zhang wrote:
> >>
> >>
> >> On 5/27/2022 12:38 PM, Dmitry Baryshkov wrote:
> >>> On 27/05/2022 21:54, Jessica Zhang wrote:
> Add support for setting MISR
On Fri, 3 Jun 2022 at 04:02, Jessica Zhang wrote:
> On 6/2/2022 3:51 PM, Dmitry Baryshkov wrote:
> > On 28/05/2022 01:23, Jessica Zhang wrote:
> >> On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
> >>> On 27/05/2022 21:54, Jessica Zhang wrote:
> Add support for writing CRC values for the
Hi Lyude,
Thank you for the reviews.
On 5/18/22 19:39, Lyude Paul wrote:
> On Tue, 2022-05-17 at 17:23 +0200, Hans de Goede wrote:
>> Typically the acpi_video driver will initialize before nouveau, which
>> used to cause /sys/class/backlight/acpi_video0 to get registered and then
>> nouveau
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