Hello Svyatoslav,
On Fri, 5 Sep 2025 19:11:06 +0300
Svyatoslav Ryhel wrote:
> пт, 5 вер. 2025 р. о 19:08 Luca Ceresoli пише:
> >
> > On Tue, 19 Aug 2025 15:16:25 +0300
> > Svyatoslav Ryhel wrote:
> >
> > > Tegra20, Tegra30 and Tegra114 have VI revision 1.
> >
> > Why? You should mention th
On Tue, Sep 09, 2025 at 08:16:48AM +0200, Jens Wiklander wrote:
> On Tue, Sep 9, 2025 at 6:34 AM Sumit Garg wrote:
> >
> > On Tue, Aug 12, 2025 at 05:35:29PM -0700, Amirreza Zarrabi wrote:
> > > This patch series introduces a Trusted Execution Environment (TEE)
> > > driver for Qualcomm TEE (QTEE)
On 08/09/2025 21:19, Ariel D'Alessandro wrote:
> Krzysztof,
>
> On 8/21/25 3:43 AM, Krzysztof Kozlowski wrote:
>> On Wed, Aug 20, 2025 at 02:12:51PM -0300, Ariel D'Alessandro wrote:
>>> Current, the DT bindings for MediaTek mmsys controller is missing the
>>> assigned-clocks and assigned-clocks-ra
Use reST syntax for admonitions (notes and custom admonition
for gotcha).
Signed-off-by: Bagas Sanjaya
---
Documentation/fb/fbcon.rst | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/Documentation/fb/fbcon.rst b/Documentation/fb/fbcon.rst
index 3
Hi,
Here are reST formatting cleanup and improvements for fbcon documentation.
The shortlog below should be self-explanatory.
This series is based on docs-next tree.
Enjoy!
Bagas Sanjaya (3):
Documentation: fbcon: Add boot options and attach/detach/unload
section headings
Documentation:
Properly indent 8th step text (as enumerated list item) to be inline
with other steps.
Signed-off-by: Bagas Sanjaya
---
Documentation/fb/fbcon.rst | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/Documentation/fb/fbcon.rst b/Documentation/fb/fbcon.rst
index b9ddc145
These last two enumerated sections headings are in normal paragraphs,
making both sections merged into "Loading" section instead.
Add the headings.
Signed-off-by: Bagas Sanjaya
---
Documentation/fb/fbcon.rst | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/fb
On Mon, Sep 08, 2025 at 02:01:34PM -0700, Mukesh R wrote:
> On 9/6/25 04:36, Greg KH wrote:
> > On Fri, Sep 05, 2025 at 06:09:52PM -0700, Mukesh Rathor wrote:
> >> With CONFIG_HYPERV and CONFIG_HYPERV_VMBUS separated, change CONFIG_HYPERV
> >> to bool from tristate. CONFIG_HYPERV now becomes the co
Hi Peter / Jani,
From the measurements I have done, the difference between RBtree full
iteration and list full iteration
is negligible, even under heavy fragmentation. Based on this, I think it
would be reasonable to include
these macros in rbtree.h as a convenience for cases where a full walk
On Tue, Sep 9, 2025 at 6:34 AM Sumit Garg wrote:
>
> On Tue, Aug 12, 2025 at 05:35:29PM -0700, Amirreza Zarrabi wrote:
> > This patch series introduces a Trusted Execution Environment (TEE)
> > driver for Qualcomm TEE (QTEE). QTEE enables Trusted Applications (TAs)
> > and services to run securely
On Thu, Sep 4, 2025 at 2:14 PM Thomas Zimmermann wrote:
>
> Gma500 unnecessarily clears the framebuffer's GEM-object pointer
> before calling drm_framebuffer_cleanup(). Remove this code to make
> gma500 consistent with the rest of the drivers.
>
> The change is cosmetic, as drm_framebuffer_cleanup
On 08.09.25 19:05, Alex Hung wrote:
>
>
> On 8/24/25 12:23, Kuan-Wei Chiu wrote:
>> Replace the custom bubble sort used for sorting reserved time
>> candidates in with the kernel's standard sort() helper. The previous
>> code had O(N^2) time complexity, while the generic kernel sort runs in
>> O(
Hi,
On Mon, Sep 8, 2025 at 1:37 PM John Ripple wrote:
>
> Add support for DisplayPort to the bridge, which entails the following:
> - Get and use an interrupt for HPD;
> - Properly clear all status bits in the interrupt handler;
>
> Signed-off-by: John Ripple
> ---
> V1 -> V2: Cleaned up coding
вт, 9 вер. 2025 р. о 03:57 Rob Herring пише:
>
> On Sat, Sep 06, 2025 at 04:53:33PM +0300, Svyatoslav Ryhel wrote:
> > The avdd-dsi-csi-supply is CSI power supply, it has nothing to do with VI,
> > like same supply is used with DSI and has nothing to do with DC. Move it
> > to correct place.
> >
>
On Tue, Aug 12, 2025 at 05:35:29PM -0700, Amirreza Zarrabi wrote:
> This patch series introduces a Trusted Execution Environment (TEE)
> driver for Qualcomm TEE (QTEE). QTEE enables Trusted Applications (TAs)
> and services to run securely. It uses an object-based interface, where
> each service is
On Sat, 6 Sep 2025 08:57:37 +0200 David Hildenbrand wrote:
> >> @@ -3024,6 +3025,7 @@ static int gup_fast_pud_leaf(pud_t orig, pud_t
> >> *pudp, unsigned long addr,
> >> return 0;
> >> }
> >> + pages += *nr;
> >> *nr += refs;
> >> for (; refs; re
Hi Lyude,
On Mon, Sep 08, 2025 at 06:04:44PM -0400, Lyude Paul wrote:
> I made a very silly mistake with this commit that managed to slip by
> because I forgot to mzke sure rvkms was rebased before testing my work last
> - we can't do blanket implementations like this due to rust's orphan rule.
>
From: Michael Kelley Sent: Thursday, September 4, 2025 10:36 PM
>
> From: Thomas Zimmermann Sent: Thursday, September 4,
> 2025 7:56 AM
> >
> > Compositors often depend on vblanks to limit their display-update
> > rate. Without, they see vblank events ASAP, which breaks the rate-
> > limit featu
On Tue Sep 9, 2025 at 2:16 AM JST, Joel Fernandes wrote:
> Hi Alex,
>
> On 9/7/2025 11:12 PM, Alexandre Courbot wrote:
>> On Thu Sep 4, 2025 at 6:54 AM JST, Joel Fernandes wrote:
>>> The bitfield-specific into new macro. This will be used to define
>>> structs with bitfields, similar to C language.
On 07/18, Melissa Wen wrote:
> On 18-07-2025 00:51, Matthew Schwartz wrote:
> [...]
>
> In short, there is a chance that you are not seeing those glitches
> because there are no changes in the pipe split when transitioning
> between 1-2 overlay planes in your hw, but the split happens on steam
> d
On Thu, 4 Sept 2025 at 21:30, Christian König wrote:
>
> On 04.09.25 04:25, Dave Airlie wrote:
> > On Wed, 3 Sept 2025 at 00:23, Christian König
> > wrote:
> >>
> >> On 02.09.25 06:06, Dave Airlie wrote:
> >>> From: Dave Airlie
> >>>
> >>> This enables all the backend code to use the list lru i
On Mon, Sep 08, 2025 at 08:39:19PM +0200, Miguel Ojeda wrote:
> On Mon, Sep 8, 2025 at 7:06 PM Joel Fernandes wrote:
> >
> > The issue I ran into is, without adding it to prelude, the users of
> > register!
> > macro will have to import both bitfield! and register! macros explictly,
> > even
> >
Hi Marek,
> Subject: Re: [PATCH v2 9/9] arm64: dts: imx95: Describe Mali G310
> GPU
>
> On 9/4/25 11:54 AM, Peng Fan wrote:
>
> Hello Peng,
>
> >>> @@ -1890,6 +1919,35 @@ netc_emdio: mdio@0,0 {
> >>> };
> >>> };
> >>>
> >>> + gpu_blk_ctrl: res
https://bugzilla.kernel.org/show_bug.cgi?id=220554
Bug ID: 220554
Summary: Display powers off after every update.
Product: Drivers
Version: 2.5
Hardware: ARM
OS: Linux
Status: NEW
Severity: normal
On 9/2/2025 8:14 AM, Zhanjun Dong wrote:
Boolean flag access from interrupt context might have synchronous issueis
on multiple processor platform, flags modified by one core might be read
as an old value by another core. This issue on interrupt enable flag might
causes interrupt misses or leak
This patch series simply drops an blanket implementation of
AlwaysRefCounted for gem objects, which would cause issues if any other
additional blanket implementations of AlwaysRefCounted were present
within the same rust crate. While we're at it, we also introduce a macro
in lieu of being able to u
In the future we're going to be introducing more GEM object types in rust
then just gem::Object. Since all types of GEM objects have refcounting,
let's introduce a macro that we can use in the gem crate in order to copy
this boilerplate implementation for each type: impl_aref_for_gem_obj!().
Signe
I made a very silly mistake with this commit that managed to slip by
because I forgot to mzke sure rvkms was rebased before testing my work last
- we can't do blanket implementations like this due to rust's orphan rule.
The code -does- build just fine right now, but it doesn't with the ongoing
bin
Le 08/09/2025 à 23:26, Dmitry Baryshkov a écrit :
On Mon, Sep 08, 2025 at 11:09:07PM +0200, Christophe JAILLET wrote:
Le 19/08/2025 à 22:32, Dmitry Baryshkov a écrit :
Use drmm_plain_encoder_alloc() to allocate simple encoder and
drmm_writeback_connector_init() in order to initialize writeback
In subject, s|PCI: PM:|PCI/PM:| to follow previous practice.
On Sun, Aug 17, 2025 at 09:00:55PM -0500, Mario Limonciello (AMD) wrote:
> PCI devices can be programmed as a wakeup source from low power states
> by sysfs. However when using the S4 flow to go into S5 these wakeup
> sources should be
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify kfd_ioctl_set_cu_mask().
Return early if an error occurs and remove the obsolete 'out' label.
No functional changes intended.
Signed-off-by: Thorsten Blum
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 12
On Mon, 08 Sep 2025 15:04:17 +0200, Neil Armstrong wrote:
> The Thinkpad T14s embeds a transparent 4lanes DP->HDMI transceiver
> connected to the third QMP Combo PHY 4 lanes.
>
> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
> of a combo glue to route either lanes to the 4 shared
On Mon, Sep 08, 2025 at 03:04:21PM +0200, Neil Armstrong wrote:
> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
> of a combo glue to route either lanes to the 4 shared physical lanes.
>
> The routing of the lanes can be:
> - 2 DP + 2 USB3
> - 4 DP
> - 2 USB3
>
> Get the lanes ma
The pm_domain cleanup can not be devres managed as it uses struct
simplefb_par which is allocated within struct fb_info by
framebuffer_alloc(). This allocation is explicitly freed by
unregister_framebuffer() in simplefb_remove().
Devres managed cleanup runs after the device remove call and thus can
On Mon, Sep 1, 2025 at 4:52 PM Dave Airlie wrote:
>
> On Tue, 2 Sept 2025 at 04:18, M Henning wrote:
> > Maybe we should also do this for older GPUs? eg. perhaps we should
> > also update gf100_fifo_nonstall_allow / gf100_fifo_nonstall_block ?
>
> Those actually turn off the irq at the hardware,
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify ta_if_load_debugfs_write() and
ta_if_invoke_debugfs_write().
No functional changes intended.
Signed-off-by: Thorsten Blum
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c | 20 ++--
1 file ch
On 9/6/25 04:36, Greg KH wrote:
> On Fri, Sep 05, 2025 at 06:09:52PM -0700, Mukesh Rathor wrote:
>> With CONFIG_HYPERV and CONFIG_HYPERV_VMBUS separated, change CONFIG_HYPERV
>> to bool from tristate. CONFIG_HYPERV now becomes the core Hyper-V
>> hypervisor support, such as hypercalls, clocks/timer
On Mon, Sep 08, 2025 at 12:59:37PM -0500, Ryan Eatmon wrote:
>
>
> On 9/8/2025 9:19 AM, Rob Clark wrote:
> > On Mon, Sep 8, 2025 at 6:39 AM Ryan Eatmon wrote:
> > >
> > >
> > >
> > > On 9/6/2025 6:24 PM, Rob Clark wrote:
> > > > On Sat, May 24, 2025 at 10:15 AM Dmitry Baryshkov
> > > > wrote
On 9/8/25 13:13, Dan Carpenter wrote:
On Mon, Sep 08, 2025 at 11:19:33AM -0700, Lizhi Hou wrote:
On 9/7/25 23:40, Dan Carpenter wrote:
Hello Lizhi Hou,
Commit 2f509fe6a42c ("accel/amdxdna: Add ioctl
DRM_IOCTL_AMDXDNA_GET_ARRAY") from Sep 2, 2025 (linux-next), leads to
the following (UNPUBLIS
Add support for DisplayPort to the bridge, which entails the following:
- Get and use an interrupt for HPD;
- Properly clear all status bits in the interrupt handler;
Signed-off-by: John Ripple
---
V1 -> V2: Cleaned up coding style and addressed review comments
drivers/gpu/drm/bridge/ti-sn65dsi
On 9/8/2025 2:39 PM, Miguel Ojeda wrote:
> On Mon, Sep 8, 2025 at 7:06 PM Joel Fernandes wrote:
>>
>> The issue I ran into is, without adding it to prelude, the users of register!
>> macro will have to import both bitfield! and register! macros explictly, even
>> though they're only using regis
Replace kmalloc_array() followed by copy_from_user() with
memdup_array_user() to improve and simplify cs_ioctl_engine_cores(),
cs_ioctl_engines(), and hl_multi_cs_wait_ioctl().
Remove the unused variable 'size_to_copy' from hl_multi_cs_wait_ioctl().
No functional changes intended.
Signed-off-by:
https://bugzilla.kernel.org/show_bug.cgi?id=220553
rbmc...@gmail.com changed:
What|Removed |Added
Bisected commit-id||8345a71fc54b
Kernel Version|
hi Louis, thx for the nudge.
On Mon, Sep 8, 2025 at 8:38 AM Louis Chauvet
wrote:
> \
>
> Le 03/08/2025 à 05:57, Jim Cromie a écrit :
> > Describe the 3 API macros providing dynamic_debug's classmaps
> >
> > DYNDBG_CLASSMAP_DEFINE - create & export a classmap
> > DYNDBG_CLASSMAP_USE- refer to
https://bugzilla.kernel.org/show_bug.cgi?id=220553
Bug ID: 220553
Summary: Suspend to mem fails on rx5600xt (regression in
6.16.2)
Product: Drivers
Version: 2.5
Hardware: AMD
OS: Linux
Status: NE
Add drm_panic module for vmwgfx stdu so that panic screen can be
displayed on panic.
Signed-off-by: Ryosuke Yasuoka
---
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c | 73
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 18 +++
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 9
drive
On 8/25/25 02:52, Xi Ruoyao wrote:
dml21_map_dc_state_into_dml_display_cfg calls (the call is usually
inlined by the compiler) populate_dml21_surface_config_from_plane_state
and populate_dml21_plane_config_from_plane_state which may use FPU. In
a x86-64 build:
$ objdump --disassemble=dm
tc, const struct drm_display_mode *mode)
{
if (mode->hdisplay == PIXPAPER_WIDTH &&
mode->vdisplay == PIXPAPER_HEIGHT) {
---
base-commit: 490b30fbaca2abbd6afa8bdc7e2df329b5d82412
change-id: 20250908-drm-pixpaper-fix-mode_valid-return-type-4228e531193b
Best regards,
--
Nathan Chancellor
Hello all,
On Fri, Aug 22, 2025 at 11:00:38AM +0200, Francesco Dolcini wrote:
> On Fri, Aug 22, 2025 at 11:46:40AM +0300, Tomi Valkeinen wrote:
> > On 22/08/2025 10:04, Francesco Dolcini wrote:
> > > On Thu, May 22, 2025 at 12:09:08PM +0300, Tomi Valkeinen wrote:
> > >> On 12/05/2025 11:32, Vitor
On Mon, Sep 08, 2025 at 12:52:57PM +0900, Alexandre Courbot wrote:
> On Thu Sep 4, 2025 at 6:54 AM JST, Joel Fernandes wrote:
> > Out of broad need for these macros in Rust, move them out. Several folks
> > have shown interest (Nova, Tyr GPU drivers).
> >
> > bitstruct - defines bitfields in Rust s
On Mon, Sep 08, 2025 at 11:19:33AM -0700, Lizhi Hou wrote:
>
> On 9/7/25 23:40, Dan Carpenter wrote:
> > Hello Lizhi Hou,
> >
> > Commit 2f509fe6a42c ("accel/amdxdna: Add ioctl
> > DRM_IOCTL_AMDXDNA_GET_ARRAY") from Sep 2, 2025 (linux-next), leads to
> > the following (UNPUBLISHED) Smatch static
Rob,
On 8/22/25 12:14 PM, Rob Herring wrote:
On Wed, Aug 20, 2025 at 02:12:53PM -0300, Ariel D'Alessandro wrote:
Convert the existing text-based DT bindings for Mediatek MT8173 RT5650
codecs to a YAML schema.
Signed-off-by: Ariel D'Alessandro
---
.../sound/mediatek,mt8173-rt5650.yaml
On 9/8/2025 9:07 PM, Konrad Dybcio wrote:
> On 9/8/25 10:27 AM, Akhil P Oommen wrote:
>> There are some special registers which are accessible even when GX power
>> domain is collapsed during an IFPC sleep. Accessing these registers
>> wakes up GPU from power collapse and allow programming these re
Hi Daniel,
On 30.08.2025 10:12, Daniel Stone wrote:
> Hi Adrian,
>
> On Thu, 28 Aug 2025 at 04:35, Adrián Larumbe
> wrote:
> > -void panfrost_job_close(struct panfrost_file_priv *panfrost_priv)
> > +int panfrost_jm_ctx_destroy(struct drm_file *file, u32 handle)
> > {
> > - struct panfrost_
From: Gaurav Kohli
Unlike the CPU, the GPU does not throttle its speed automatically when it
reaches high temperatures.
Set up GPU cooling by throttling the GPU speed
when reaching 105°C.
Signed-off-by: Gaurav Kohli
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 55
Enable GPU on both qcs9100-ride platforms and provide the path
for zap shader.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Akhil P Oommen
---
arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common
Document compatible string for the QFPROM on Lemans platform.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Akhil P Oommen
---
Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
b/
Add speedbin mappings for A663 GPU.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index
00
This series adds support for Adreno 663 gpu found in SA8775P (Lemans)
chipsets. The closest gpu which is currently supported in drm-msm is A660.
Following are the major differences with that:
1. gmu/zap firmwares
2. Recommended to disable Level2 swizzling
Verified kmscube/weston/gl
From: Puranam V G Tejaswi
Add gpu and gmu nodes for sa8775p chipset. Also, add the speedbin
qfprom node and wire it up with GPU node.
Signed-off-by: Puranam V G Tejaswi
Signed-off-by: Akhil P Oommen
Reviewed-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 119
Hi Daniel,
On 28.08.2025 10:04, Daniel Almeida wrote:
> Add an initial test suit covering query device properties, allocating
> memory, binding and unbinding VA ranges through VM_BIND and submitting a
> simple piece of work through GROUP_SUBMIT.
> ---
> lib/igt_panthor.c | 136 +++
In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
fix a7xx GPU snapshot.
Sync from mesa commit 15ee3873aa4d ("freedreno/registers: Update GMU
register xml").
Cc: Karmjit Mahil
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +-
drivers/gpu/d
The upstream mesa copy of the GPU regs has shifted more things to reg64
instead of seperate 32b HI/LO reg32's. This works better with the "new-
style" c++ builders that mesa has been migrating to for a6xx+ (to better
handle register shuffling between gens), but it leaves the C builders
with missin
Synced from mesa commit 77c42c1a5752 ("freedreno/registers: Make
TPL1_BICUBIC_WEIGHTS_TABLE an array").
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 10 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 +-
drivers/gpu/drm/msm/registers/adreno/
Sync from mesa commit 04e2140d8be7 ("freedreno/registers: remove python
3.9 dependency for compiling msm").
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/registers/gen_header.py | 157 +---
1 file changed, 107 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/msm/re
Since these generated files are no longer checked in, either in mesa or
in the linux kernel, simplify things by dropping the verbose generated
comment.
These were semi-nerf'd on the kernel side, in the name of build
reproducibility, by commit ba64c6737f86 ("drivers: gpu: drm: msm:
registers: impro
Now that https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37216
has synced kernel side changes back to mesa, this completes the round
trip by syncing mesa side changes back to the kernel.
Rob Clark (5):
drm/msm/registers: Remove license/etc from generated headers
drm/msm/registers: Sy
Hello,
syzbot found the following issue on:
HEAD commit:76eeb9b8de98 Linux 6.17-rc5
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=1437956258
kernel config: https://syzkaller.appspot.com/x/.config?x=e0bea6c0b97a2002
dashboard link: https://syzkaller.ap
On Mon, Sep 8, 2025 at 10:59 AM Ryan Eatmon wrote:
>
>
>
> On 9/8/2025 9:19 AM, Rob Clark wrote:
> > On Mon, Sep 8, 2025 at 6:39 AM Ryan Eatmon wrote:
> >>
> >>
> >>
> >> On 9/6/2025 6:24 PM, Rob Clark wrote:
> >>> On Sat, May 24, 2025 at 10:15 AM Dmitry Baryshkov
> >>> wrote:
>
> On S
Hi,
On Sun, Sep 7, 2025 at 11:37 PM Zhongtian Wu
wrote:
>
> Add a few generic edp panels used by mt8189 chromebooks. For
> BOE-NV140WUM-N44 , the enable timing required 80ms. For
> CSW-MNE007QB3-1, the hpd_absent timing rquired 80ms, the enable timing
> required 50ms, the disable timing required
On 9/8/25 8:46 PM, Lyude Paul wrote:
> Now that my rust skills have been honed, I noticed that there's a lot of
> generics in our gem bindings that don't actually need to be here. Currently
> the hierarchy of traits in our gem bindings looks like this:
>
> * Drivers implement:
> * BaseDri
On 9/8/25 8:46 PM, Lyude Paul wrote:
> Just to reduce the clutter with the File<…> types in gem.rs.
>
> Signed-off-by: Lyude Paul
> Reviewed-by: Daniel Almeida
Acked-by: Danilo Krummrich
On Mon, Sep 8, 2025 at 8:52 PM Lyude Paul wrote:
>
> This is the first few patches that were originally part of the series to
> introduce gem shmem bindings for rust into the Linux kernel, which can
> be found here:
>
> https://lkml.org/lkml/2025/8/29/1533
>
> These patches don't have any dependen
Drive-by fix, it doesn't seem like anything actually uses this constant
anymore.
Signed-off-by: Lyude Paul
Reviewed-by: Danilo Krummrich
Reviewed-by: Daniel Almeida
---
rust/kernel/drm/gem/mod.rs | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/rust/kernel/drm/gem/mod.rs
Now that my rust skills have been honed, I noticed that there's a lot of
generics in our gem bindings that don't actually need to be here. Currently
the hierarchy of traits in our gem bindings looks like this:
* Drivers implement:
* BaseDriverObject (has the callbacks)
* DriverObject (ha
This is the first few patches that were originally part of the series to
introduce gem shmem bindings for rust into the Linux kernel, which can
be found here:
https://lkml.org/lkml/2025/8/29/1533
These patches don't have any dependencies besides needing to be applied
on top of drm-rust-next.
Lyu
On Sun, 2025-09-07 at 15:42 +0200, Christophe JAILLET wrote:
> Use devm_mutex_init() instead of hand-writing it.
>
> This saves some LoC, improves readability and saves some space in the
> generated .o file.
>
> Before:
> ==
> text data bss dec hex filename
> 36884 10296
在 2025/9/6 04:17, Rafael J. Wysocki 写道:
On Fri, Sep 5, 2025 at 3:24 PM Zihuan Zhang wrote:
Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
annotation for policy references. This reduces the risk of reference
counting mistakes and aligns the code with the latest kernel sty
s/leds/leds-consumer.example.dtb:
camera@36 (ovti,ov02c10): Unevaluated properties are not allowed ('led-names',
'leds' were unexpected)
from schema $id:
http://devicetree.org/schemas/media/i2c/ovti,ov02e10.yaml#
doc reference errors (make refcheckdocs):
See
This series adds some kunit tests to drm_panic, and a debugfs interface to
easily test the panic screen rendering at different resolutions/pixel format.
The kunit tests draws the panic screens to different framebuffer size and
format, and ensure it doesn't crash or draw outside of the buffer.
Ho
On 9/8/25 9:33 AM, Hans de Goede wrote:
> Hi,
>
> On 8-Sep-25 09:20, Konrad Dybcio wrote:
>> On 9/8/25 1:18 AM, Aleksandrs Vinarskis wrote:
>>> A number of existing schemas use 'leds' property to provide
>>> phandle-array of LED(s) to the consumer. Additionally, with the
>>> upcoming privacy-led s
On Mon, Sep 08, 2025 at 03:35:23PM +0200, Maud Spierings wrote:
> Hello Neil,
>
> > Add support for the transparent Realtek RTD2171 DP-to-HDMI bridge.
> >
> > Reviewed-by: Dmitry Baryshkov
> > Signed-off-by: Neil Armstrong
> > ---
> > drivers/gpu/drm/bridge/simple-bridge.c | 5 +
> > 1 fil
Hi Harikrishna,
Thanks for the patch.
On 9/3/25 15:39, Harikrishna Shenoy wrote:
Update VP SYNC LOST Bit as per register description for
DSS0_COMMON_VP_IRQENABLE_0 give in TRM.
Link:https://www.ti.com/lit/zip/spruil1/SPRUIL_DRA829_TDA4VM
Broken link, please add a working link.
Please add link
Il 08/09/25 14:05, Nicolas Frattaroli ha scritto:
On Monday, 8 September 2025 12:06:01 Central European Summer Time
AngeloGioacchino Del Regno wrote:
Il 05/09/25 12:23, Nicolas Frattaroli ha scritto:
The MT8196 SoC uses an embedded MCU to control frequencies and power of
the GPU. This controll
Set Keepalive votes at appropriate places to block IFPC power collapse
until we access all the required registers. This is required during gpu
IRQ handling and also during preemption.
Signed-off-by: Akhil P Oommen
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 26 +-
dri
Hi,
On 03/09/2025 13:09, Harikrishna Shenoy wrote:
> Update VP SYNC LOST Bit as per register description for
> DSS0_COMMON_VP_IRQENABLE_0 give in TRM.
You need to explain what issue is this bug causing, and how does the
behavior change here.
Tomi
> Link:https://www.ti.com/lit/zip/spruil1/SPRUI
On 8/24/25 12:23, Kuan-Wei Chiu wrote:
Replace the custom bubble sort used for sorting reserved time
candidates in with the kernel's standard sort() helper. The previous
code had O(N^2) time complexity, while the generic kernel sort runs in
O(N log N). This improves efficiency and removes the
On 9/7/25 23:40, Dan Carpenter wrote:
Hello Lizhi Hou,
Commit 2f509fe6a42c ("accel/amdxdna: Add ioctl
DRM_IOCTL_AMDXDNA_GET_ARRAY") from Sep 2, 2025 (linux-next), leads to
the following (UNPUBLISHED) Smatch static checker warning:
drivers/accel/amdxdna/aie2_pci.c:904 aie2_query_ctx_st
On Mon, Sep 08, 2025 at 07:05:17PM +0200, Michel Dänzer wrote:
> These messages are primarily intended for developers, not users
But everybody sees them! And they're flooding the console.
And most people seeing them are users, not developers.
And if those messages are only for developers, they b
On 9/8/25 1:10 PM, Alex Hung wrote:
On 8/24/25 12:23, Kuan-Wei Chiu wrote:
Replace the previous O(N^2) implementation of remove_duplicates() in
with a O(N) version using a fast/slow pointer approach. The new version
keeps only the first occurrence of each element and compacts the array
in p
On Fri, Sep 5, 2025 at 3:24 PM Zihuan Zhang wrote:
>
> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> annotation for policy references. This reduces the risk of reference
> counting mistakes and aligns the code with the latest kernel style.
>
> No functional change intended
On Mon, Sep 8, 2025 at 11:16 AM Zihuan Zhang wrote:
>
>
> 在 2025/9/6 04:17, Rafael J. Wysocki 写道:
> > On Fri, Sep 5, 2025 at 3:24 PM Zihuan Zhang wrote:
> >> Replace the manual cpufreq_cpu_put() with __free(put_cpufreq_policy)
> >> annotation for policy references. This reduces the risk of refere
On Thu, 2025-09-04 at 09:51 -0300, Daniel Almeida wrote:
> > - gem_create_object: T::Object::ALLOC_OPS.gem_create_object,
> > - prime_handle_to_fd: T::Object::ALLOC_OPS.prime_handle_to_fd,
> > - prime_fd_to_handle: T::Object::ALLOC_OPS.prime_fd_to_handle,
> > - gem_prime
Applied, thanks.
On Wed, Jul 09, 2025 at 10:54:38AM +0200, Loic Poulain wrote:
> If the interrupt occurs before resource initialization is complete, the
> interrupt handler/worker may access uninitialized data such as the I2C
> tcpc_client device, potentially leading to NULL pointer dereference.
>
> Signed-off-by:
Hi Alex,
On 9/7/2025 11:12 PM, Alexandre Courbot wrote:
> On Thu Sep 4, 2025 at 6:54 AM JST, Joel Fernandes wrote:
>> The bitfield-specific into new macro. This will be used to define
>> structs with bitfields, similar to C language.
>>
>> Signed-off-by: Joel Fernandes
>> ---
>> drivers/gpu/nova
On 08/09/2025 10:26, Akhil P Oommen wrote:
This patch series introduces the IFPC feature to the DRM-MSM driver for
Adreno GPUs. IFPC enables GMU to quickly transition GPU into a low power
state when idle and quickly resume gpu to active state upon workload
submission, hence the name 'Inter Frame
On 8/24/25 12:23, Kuan-Wei Chiu wrote:
Replace the previous O(N^2) implementation of remove_duplicates() in
with a O(N) version using a fast/slow pointer approach. The new version
keeps only the first occurrence of each element and compacts the array
in place, improving efficiency without chan
On 9/7/2025 2:14 PM, Miguel Ojeda wrote:
> Hi Joel,
>
> I didn't check the macros, but a couple nits I noticed in this patch
> in particular given it moved it to `kernel`...
>
> On Wed, Sep 3, 2025 at 11:54 PM Joel Fernandes wrote:
>>
>> +//! A library that provides support for defining bit f
On 01.09.25 12:10, Borislav Petkov wrote:
> On Mon, Sep 01, 2025 at 11:27:01AM +0200, Michel Dänzer wrote:
>> use some kind of debug output API which doesn't hit dmesg by default
>
> You still want to be enabled by default so that normal users can see it and
> actually report it.
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