Kuro Chung
Signed-off-by: Hermes Wu
Reviewed-by: AngeloGioacchino Del Regno
)
Reviewed-by: Alexandre Mergnat
Tested-by: Alexandre Mergnat
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,aal.yaml| 40 +++
.../display/mediatek/mediatek,ccorr.yaml | 21 ++
.../display/mediatek/mediatek,color.yaml | 22
defines the starting point for one of the (currently three)
possible hardware paths.
Reviewed-by: Rob Herring (Arm)
Reviewed-by: Alexandre Mergnat
Tested-by: Alexandre Mergnat
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 28 +++
1
of arrays for each board and SoC combination, also paving the
way to share the same mtk_mmsys_driver_data between multiple SoCs,
making it more straightforward to add support for new chips.
Reviewed-by: Alexandre Mergnat
Tested-by: Alexandre Mergnat
Signed-off-by: AngeloGioacchino Del Regno
t is already
present in this driver).
This series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
NIO-12L with both hardcoded paths, OF graph support and partially
hardcoded paths, and pure OF graph support including pipelines that
require OVL_ADAPTOR support.
AngeloGioacchino Del Reg
Il 20/05/24 13:49, Alexandre Mergnat ha scritto:
On 20/05/2024 12:53, AngeloGioacchino Del Regno wrote:
So, I don't know how you want to manage multiple display, but IMHO there are 2
ways:
- removing the current "oneOf".
...eh I think this should be anyOf instead :-)
I'll c
Il 19/05/24 19:18, Alexandre Mergnat ha scritto:
Hi Angelo,
On 16/05/2024 10:11, AngeloGioacchino Del Regno wrote:
+ oneOf:
+ - required:
+ - endpoint@0
+ - required:
+ - endpoint@1
+ - required:
+ - endpoint@2
I'm not sure this is what you expect
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Enable the MediaTek MT8365-EVK sound support.
The audio feature is handled by the MT8365 SoC and
the MT6357 PMIC codec audio.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Add audio clock wrapper and audio tuner control.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-afe-clk.c | 443 +
sound/soc/mediatek/mt8365/mt8365-afe-clk.h | 49
2 files changed, 492
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Add mt8365 platform driver.
Since you have to anyway send a v5:
Add a driver for the Analog Front End (AFE) PCM blahblah MT8365 blahblah :-)
after which
Reviewed-by: AngeloGioacchino Del Regno
tible = "mediatek,mt8365-mt6357", .data = _mt6357_card },
{ /* sentinel */ }
after which
Reviewed-by: AngeloGioacchino Del Regno
if (lrck_inv)
+ val |= PCM_INTF_CON1_SYNC_IN_INV;
+ if (bck_inv)
+ val |= PCM_INTF_CON1_BCLK_IN_INV;
+
+ // TODO: add asrc setting
/* TODO ... */
after which:
Reviewed-by: AngeloGioacchino Del Regno
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Add ADDA Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-dai-adda.c | 315
1 file changed, 315 insertions(+)
diff --git
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Add I2S Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-dai-i2s.c | 854 +
1 file changed, 854 insertions(+)
diff --git
Il 26/04/24 19:22, Alexandre Mergnat ha scritto:
Add Digital Micro Device Audio Interface support for MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
sound/soc/mediatek/mt8365/mt8365-dai-dmic.c | 347
1 file changed, 347 insertions(+)
diff --git
inspection.
Fixes: 812562b8d881 ("drm/panel: boe-tv101wum-nl6: Fine tune the panel power
sequence")
Signed-off-by: Douglas Anderson
Reviewed-by: AngeloGioacchino Del Regno
Il 17/05/24 11:49, Michael Walle ha scritto:
Hi Angelo,
On Thu May 16, 2024 at 10:11 AM CEST, AngeloGioacchino Del Regno wrote:
Implement OF graphs support to the mediatek-drm drivers, allowing to
stop hardcoding the paths, and preventing this driver to get a huge
amount of arrays for each
Il 17/05/24 04:16, kuro ha scritto:
From: Kuro Chung
This patch added a FIFO reset bit for input video. When system power resume,
the TTL input of it6505 may get some noise before video signal stable
and the hardware function reset is required.
But the input FIFO reset will also trigger error
to .remove().
Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.
Signed-off-by: Uwe Kleine-König
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_padding.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions
Il 15/05/24 13:23, Yong Wu ha scritto:
Introduce a FLAG for the restricted memory which means the memory is
protected by TEE or hypervisor, then it's inaccessiable for kernel.
Currently we don't use sg_dma_unmark_restricted, thus this interface
has not been added.
Signed-off-by: Yong Wu
---
Il 16/05/24 11:23, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Thu, 2024-05-16 at 10:11 +0200, AngeloGioacchino Del Regno wrote:
Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
per HW instance (so potentially up to six displays for multi-vdo SoCs).
The MMSYS or VDOSYS
defines the starting point for one of the (currently three)
possible hardware paths.
Reviewed-by: Rob Herring (Arm)
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 28 +++
1 file changed, 28 insertions(+)
diff --git a/Documentation
of arrays for each board and SoC combination, also paving the
way to share the same mtk_mmsys_driver_data between multiple SoCs,
making it more straightforward to add support for new chips.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
.../gpu/drm
a
NIO-12L with both hardcoded paths, OF graph support and partially
hardcoded paths, and pure OF graph support including pipelines that
require OVL_ADAPTOR support.
AngeloGioacchino Del Regno (3):
dt-bindings: display: mediatek: Add OF graph support for board path
dt-bindings: arm: mediatek: mmsys: Add
)
Signed-off-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,aal.yaml| 40 +++
.../display/mediatek/mediatek,ccorr.yaml | 21 ++
.../display/mediatek/mediatek,color.yaml | 22 ++
.../display/mediatek/mediatek,dither.yaml | 22
Il 13/05/24 08:15, CK Hu (胡俊光) ha scritto:
On Fri, 2024-05-10 at 12:14 +0200, AngeloGioacchino Del Regno wrote:
Il 10/05/24 11:34, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-09 at 11:27 +0200, AngeloGioacchino Del Regno
wrote:
Il 09/05/24 07:42, CK Hu (胡俊光) ha scritto:
On Wed, 2024-05-08 at 15
?
If it does, that's the actual issue; otherwise, there may be some mistake on
your side, because the EPs' ports<->ids relationship was verified before sending
this to the lists.
Cheers,
Angelo
On 02/05/2024 18:53, Alexandre Mergnat wrote:
On 30/04/2024 13:33, AngeloGioacchino Del Regno wrot
Il 13/05/24 08:15, CK Hu (胡俊光) ha scritto:
On Fri, 2024-05-10 at 12:14 +0200, AngeloGioacchino Del Regno wrote:
Il 10/05/24 11:34, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-09 at 11:27 +0200, AngeloGioacchino Del Regno
wrote:
Il 09/05/24 07:42, CK Hu (胡俊光) ha scritto:
On Wed, 2024-05-08 at 15
Il 10/05/24 13:04, Liankun Yang ha scritto:
During the testing phase, screen flickering is observed when
using displayport for screen casting. Relevant SSC register parameters
are set in dts to address the screen flickering issue effectively and
improve compatibility with different devices by
Il 10/05/24 11:34, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-09 at 11:27 +0200, AngeloGioacchino Del Regno wrote:
Il 09/05/24 07:42, CK Hu (胡俊光) ha scritto:
On Wed, 2024-05-08 at 15:03 +0200, AngeloGioacchino Del Regno
wrote:
Il 08/05/24 09:19, CK Hu (胡俊光) ha scritto:
On Tue, 2024-05-07 at 16
Il 10/05/24 08:16, Liankun Yang ha scritto:
Fix get efuse issue for MT8188 DPTX.
Signed-off-by: Liankun Yang
I may agree with this commit, but:
1. The commit title is incorrect - I don't see "drm/mediatek:" - please look at
the history to find out the right titles for your commits; and
2.
Il 10/05/24 04:15, Liankun Yang ha scritto:
Adjust the training sequence.Detects the actual link condition
and calculates the bandwidth where the relevant resolution resides.
The bandwidth is recalculated and modes that exceed the bandwidth are
filtered.
Example Modify bandwidth filtering
Il 09/05/24 07:42, CK Hu (胡俊光) ha scritto:
On Wed, 2024-05-08 at 15:03 +0200, AngeloGioacchino Del Regno wrote:
Il 08/05/24 09:19, CK Hu (胡俊光) ha scritto:
On Tue, 2024-05-07 at 16:07 +0200, AngeloGioacchino Del Regno
wrote:
Il 07/05/24 08:59, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-02 at 10
Il 08/05/24 09:19, CK Hu (胡俊光) ha scritto:
On Tue, 2024-05-07 at 16:07 +0200, AngeloGioacchino Del Regno wrote:
Il 07/05/24 08:59, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-02 at 10:50 +0200, AngeloGioacchino Del Regno
wrote:
Il 25/04/24 04:23, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Tue, 2024
Il 08/05/24 11:51, Jason-JH.Lin ha scritto:
When we run kernel with lockdebug option, we will get the BUG below:
[ 106.692124] BUG: sleeping function called from invalid context at
drivers/base/power/runtime.c:1164
[ 106.692190] in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 3616,
Il 07/05/24 08:59, CK Hu (胡俊光) ha scritto:
On Thu, 2024-05-02 at 10:50 +0200, AngeloGioacchino Del Regno wrote:
Il 25/04/24 04:23, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Tue, 2024-04-09 at 14:02 +0200, AngeloGioacchino Del Regno
wrote:
Document OF graph on MMSYS/VDOSYS: this supports up
Il 06/05/24 15:17, Michael Walle ha scritto:
Hi Angelo,
On Mon May 6, 2024 at 1:22 PM CEST, AngeloGioacchino Del Regno wrote:
The problem with this is that you need DDP_COMPONENT_DRM_OVL_ADAPTOR... which is
a software thing and not HW, so that can't be described in devicetree.
The only thing
Il 06/05/24 11:11, Michael Walle ha scritto:
Hi Angelo,
On Tue Apr 9, 2024 at 2:02 PM CEST, AngeloGioacchino Del Regno wrote:
+static int mtk_drm_of_get_ddp_ep_cid(struct device_node *node,
+int output_port, enum mtk_drm_crtc_path
crtc_path,
Not sure
Il 06/05/24 12:56, AngeloGioacchino Del Regno ha scritto:
Il 06/05/24 12:02, Michael Walle ha scritto:
Hi Angelo,
On Tue Apr 30, 2024 at 1:33 PM CEST, AngeloGioacchino Del Regno wrote:
This series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
NIO-12L with both hardcoded paths
Il 06/05/24 12:02, Michael Walle ha scritto:
Hi Angelo,
On Tue Apr 30, 2024 at 1:33 PM CEST, AngeloGioacchino Del Regno wrote:
This series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
NIO-12L with both hardcoded paths, OF graph support and partially
hardcoded paths (meaning main
of arrays for each board and SoC combination, also paving the
way to share the same mtk_mmsys_driver_data between multiple SoCs,
making it more straightforward to add support for new chips.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 16 +-
drivers/gpu/drm
defines the starting point for one of the (currently three)
possible hardware paths.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 23 +++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek
type.
Add support for OF graphs to most of the MediaTek DDP (display) bindings
to add flexibility to build custom hardware paths, hence enabling board
specific configuration of the display pipeline and allowing to finally
migrate away from using hardcoded paths.
Signed-off-by: AngeloGioacchino Del
eaning main display through OF graph and external
display hardcoded, because of OVL_ADAPTOR).
AngeloGioacchino Del Regno (3):
dt-bindings: display: mediatek: Add OF graph support for board path
dt-bindings: arm: mediatek: mmsys: Add OF graph support for board path
drm/mediatek: Implement OF
Il 25/04/24 04:23, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Tue, 2024-04-09 at 14:02 +0200, AngeloGioacchino Del Regno wrote:
Document OF graph on MMSYS/VDOSYS: this supports up to three DDP
paths
per HW instance (so potentially up to six displays for multi-vdo
SoCs).
The MMSYS or VDOSYS
Il 30/04/24 12:17, Alexandre Mergnat ha scritto:
Hi Angelo,
On 09/04/2024 14:02, AngeloGioacchino Del Regno wrote:
This series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
NIO-12L with both hardcoded paths, OF graph support and partially
hardcoded paths (meaning main display through
Il 18/04/24 16:17, amerg...@baylibre.com ha scritto:
From: Fabien Parent
Add DRM support for MT8365 SoC.
Signed-off-by: Fabien Parent
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Alexandre Mergnat
There are two things that I want to point out. Please check below.
The series
Il 10/04/24 21:15, Rob Herring ha scritto:
On Tue, Apr 09, 2024 at 02:02:10PM +0200, AngeloGioacchino Del Regno wrote:
Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
per HW instance (so potentially up to six displays for multi-vdo SoCs).
The MMSYS or VDOSYS is always
Il 10/04/24 21:03, Rob Herring ha scritto:
On Tue, Apr 09, 2024 at 02:02:09PM +0200, AngeloGioacchino Del Regno wrote:
The display IPs in MediaTek SoCs support being interconnected with
different instances of DDP IPs (for example, merge0 or merge1) and/or
with different DDP IPs (for example
Il 09/04/24 17:45, Dmitry Baryshkov ha scritto:
On Tue, 9 Apr 2024 at 18:41, AngeloGioacchino Del Regno
wrote:
Il 09/04/24 17:20, Dmitry Baryshkov ha scritto:
On Tue, Apr 09, 2024 at 02:02:09PM +0200, AngeloGioacchino Del Regno wrote:
The display IPs in MediaTek SoCs support being
ng en/disabled by HW control mechanism...
...because that'd make sense, as this is .. well, a DPI clock.
That's just out of curiosity though, as I'd really like to understand
whenwhatwhy
for stuff
In any case, whether you have an answer or not, this commit is:
Reviewed-by: AngeloGioacchino Del Regno
Cheers!
Il 18/04/24 16:16, Alexandre Mergnat ha scritto:
Add dt-binding documentation of dpi for MediaTek MT8365 SoC.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
constantly repeats the transfer request.
Fixes: f70ac097a2cf ("drm/mediatek: Add MT8195 Embedded DisplayPort driver")
Signed-off-by: Wojciech Macek
Reviewed-by: AngeloGioacchino Del Regno
Il 17/04/24 15:25, Uwe Kleine-König ha scritto:
Hello,
On Wed, Apr 17, 2024 at 12:19:19PM +0200, AngeloGioacchino Del Regno wrote:
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
According to the Mediatek MT8365 datasheet, the display PWM block has
a power domain.
Signed-off-by: Alexandre
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
MIPI DSI:
- Add "vsys_lcm_reg" regulator support and setup the "mt6357_vsim1_reg",
to power the pannel plugged to the DSI connector.
- Setup the Display Parallel Interface.
- Add the startek kd070fhfid015 pannel support.
HDMI:
- Add HDMI
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
- Add aliases for each display components to help display drivers.
- Add the Display Pulse Width Modulation (DISP_PWM) to provide PWM signals
for the LED driver of mobile LCM.
- Add the MIPI Display Serial Interface (DSI) PHY support. (up to
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the Display Serial Interface on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Adaptive Ambient Light on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Dither on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Color Correction on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Color on MT8365, which is compatible
with that of the MT8173.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Gamma on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Overlay on MT8365, which is compatible
with that of the MT8192.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Document the display Data Path Read DMA on MT8365, which is compatible
with that of the MT8183.
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
a mistake.
Please add a Fixes tag and resend, after which:
Reviewed-by: AngeloGioacchino Del Regno
Parent
Signed-off-by: Alexandre Mergnat
Please add the relevant Fixes tag and resubmit.
After which:
Reviewed-by: AngeloGioacchino Del Regno
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
- Add compatibles and platform data into the Mediatek DPI driver.
- Fix the DPI0 parent clock to be consistent.
This SoC is compatible with the mt8183 calculate factor.
Signed-off-by: Alexandre Mergnat
---
drivers/clk/mediatek/clk-mt8365-mm.c
Il 16/04/24 17:53, Alexandre Mergnat ha scritto:
Add dt-binding documentation of dpi for MediaTek MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
Il 09/04/24 17:20, Dmitry Baryshkov ha scritto:
On Tue, Apr 09, 2024 at 02:02:09PM +0200, AngeloGioacchino Del Regno wrote:
The display IPs in MediaTek SoCs support being interconnected with
different instances of DDP IPs (for example, merge0 or merge1) and/or
with different DDP IPs
of arrays for each board and SoC combination, also paving the
way to share the same mtk_mmsys_driver_data between multiple SoCs,
making it more straightforward to add support for new chips.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 16 +-
drivers/gpu/drm
type.
Add support for OF graphs to most of the MediaTek DDP (display) bindings
to add flexibility to build custom hardware paths, hence enabling board
specific configuration of the display pipeline and allowing to finally
migrate away from using hardcoded paths.
Signed-off-by: AngeloGioacchino Del
defines the starting point for one of the (currently three)
possible hardware paths.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 23 +++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek
ecause of OVL_ADAPTOR).
AngeloGioacchino Del Regno (3):
dt-bindings: display: mediatek: Add OF graph support for board path
dt-bindings: arm: mediatek: mmsys: Add OF graph support for board path
drm/mediatek: Implement OF graphs support for display paths
.../bindings/arm/mediatek/mediatek,mmsys.yaml
Il 08/04/24 05:20, Chen-Yu Tsai ha scritto:
On Thu, Apr 4, 2024 at 4:16 PM AngeloGioacchino Del Regno
wrote:
Document OF graph on MMSYS/VDOSYS: this supports up to three DDP paths
per HW instance (so potentially up to six displays for multi-vdo SoCs).
The MMSYS or VDOSYS is always the first
type.
Add support for OF graphs to most of the MediaTek DDP (display) bindings
to add flexibility to build custom hardware paths, hence enabling board
specific configuration of the display pipeline and allowing to finally
migrate away from using hardcoded paths.
Signed-off-by: AngeloGioacchino Del
of arrays for each board and SoC combination, also paving the
way to share the same mtk_mmsys_driver_data between multiple SoCs,
making it more straightforward to add support for new chips.
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 16 +-
drivers/gpu/drm
defines the starting point for one of the (currently three)
possible hardware paths.
Signed-off-by: AngeloGioacchino Del Regno
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 23 +++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek
series was tested on MT8195 Cherry Tomato and on MT8395 Radxa
NIO-12L with both hardcoded paths, OF graph support and partially
hardcoded paths (meaning main display through OF graph and external
display hardcoded, because of OVL_ADAPTOR).
AngeloGioacchino Del Regno (3):
dt-bindings: display: mediate
Move the simple component check to a new mtk_ddp_is_simple_comp()
internal helper to reduce code duplication.
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 57 +++--
1 file changed, 31 insertions(+), 26 deletions
Changes in v2:
- Fixed patch [2/3]
This series performs some cleanups for DDP component CRTC search and
correctly iounmaps the previously of_iomap() calls from drm_ddp_comp.
Tested on MT8195 Cherry Tomato
AngeloGioacchino Del Regno (3):
drm/mediatek: drm_ddp_comp: Fix and cleanup DDP
from sub driver to
DRM driver")
Signed-off-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 38 -
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 ++-
3 files c
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 44 ++---
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index a515e96cfefc..82d7a6887
On Thu, 29 Feb 2024 14:51:08 -0500, Nícolas F. R. A. Prado wrote:
> Most of the callers to this function do not require CMDQ support, it is
> optional, so the missing property shouldn't cause an error message.
> However, it could result on degraded performance, so the fact that it's
> missing
On Thu, 22 Feb 2024 15:41:08 +, Chun-Kuang Hu wrote:
> cl in struct cmdq_pkt is used to store struct cmdq_client, but every client
> driver has the struct cmdq_client information, so it's not necessary to
> store struct cmdq_client in struct cmdq_pkt. Because mailbox maintainer
> do not like
functions if you really need to.
Let's switch the function to use an allocation function that zeros the
memory. For me, this avoids the crash.
Fixes: 01389b324c97 ("drm/mediatek: Add connector dynamic selection capability")
Signed-off-by: Douglas Anderson
Reviewed-by: AngeloGioacchino
Il 30/03/24 21:43, Krzysztof Kozlowski ha scritto:
Simplify the code by dropping unnecessary .owner initialization in the
driver.
For the entire series:
Reviewed-by: AngeloGioacchino Del Regno
Best regards,
Krzysztof
---
Krzysztof Kozlowski (11):
drm/mediatek: aal: drop driver
increased. As long as it’s acceptable I won’t over-think
it but if more testing is needed I can look at it more.
Thanks for clarifying.
Reviewed-by: AngeloGioacchino Del Regno
Il 22/03/24 17:45, Christian Hewitt ha scritto:
Increase the timeout value to prevent system logs on Amlogic boards flooding
with power transition warnings:
[ 13.047638] panfrost ffe4.gpu: shader power transition timeout
[ 13.048674] panfrost ffe4.gpu: l2 power transition timeout
[
Il 22/03/24 02:27, Shawn Sung ha scritto:
From: Hsiao Chien Sung
Rename all "mtk_drm_plane" to "mtk_plane":
- To align the naming rule
- To reduce the code size
Reviewed-by: AngeloGiaocchino Del Regno
Shawn - please - can you fix my typo'ed name also here and on all of the
patches of this
Il 01/02/24 13:53, AngeloGioacchino Del Regno ha scritto:
This series performs some cleanups for DDP component CRTC search and
correctly iounmaps the previously of_iomap() calls from drm_ddp_comp.
Tested on MT8195 Cherry Tomato
Hello CK,
gentle ping for this series.
Cheers,
Angelo
Il 20/03/24 03:42, Shawn Sung ha scritto:
From: Hsiao Chien Sung
Rename files mtk_drm_ddp_comp.c to mtk_ddp_comp.c and
modify the Makefile accordingly.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
Il 20/03/24 03:42, Shawn Sung ha scritto:
From: Hsiao Chien Sung
Rename files mtk_drm_crtc.c to mtk_crtc.c and
modify the Makefile accordingly.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
ly possible, since
I write the tags by hand), or what actually happened to my Reviewed-by tags on
the entire series.
Can you please fix the typo in the tag?
Reviewed-by: AngeloGioacchino Del Regno
Use this one, please.
Thanks,
Angelo
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
Il 19/03/24 08:02, Shawn Sung ha scritto:
From: Hsiao Chien Sung
Rename files mtk_drm_plane.c to mtk_plane.c and
modify the Makefile accordingly.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
the #ifdef CONFIG_PM section around panthor_pm_ops's definition
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202403031944.eoimq8wk-...@intel.com/
Signed-off-by: Boris Brezillon
Reviewed-by: AngeloGioacchino Del Regno
---
Tested by faking CONFIG_PM=n in the driver
Il 15/03/24 02:52, Liankun Yang ha scritto:
By adjusting the order of link training and relocating it to HPD,
link training can identify the usability of each lane in the current link.
It also supports handling signal instability and weakness due to
environmental issues, enabling the
Il 15/03/24 08:29, Shuijing Li ha scritto:
This patch correct calculation formula of PHY timing.
Make actual phy timing more accurate.
More accurate in which cases? By how much? On which SoC(s)?
I agree about those changes if those are improving the PHY timing, but
can you please document
Il 14/03/24 10:41, Shuijing Li ha scritto:
Adding the per-frame lp function of mt8188, which can keep HFP in HS and
reduce the time required for each line to enter and exit low power.
Per Frame LP:
|<--One Active Frame>|
Il 12/03/24 15:50, Alexandre Mergnat ha scritto:
On 26/02/2024 16:25, AngeloGioacchino Del Regno wrote:
+ if (enable) {
+ /* set gpio mosi mode */
+ regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR,
GPIO_MODE2_CLEAR_ALL);
+ regmap_write(priv->
buffer on an MT8188 and
verifying that we now return EINVAL.
Signed-off-by: Justin green
You need a Fixes tag for this one. Please add the right one and resend.
After adding the correct Fixes tag,
Reviewed-by: AngeloGioacchino Del Regno
Cheers,
Angelo
---
drivers/gpu/drm/mediatek
1 - 100 of 1392 matches
Mail list logo
