On Thu, Sep 11, 2025 at 05:26:25PM +0200, Cyrille Pitchen wrote:
> The Microchip GFX2D GPU is embedded in the SAM9X60 and SAM9X7 SoC family.
> Describe how the GFX2D GPU is integrated in these SoCs, including
> register space, interrupt and clock.
>
> Signed-off-by: Cyrille Pitchen
> ---
> .../d
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Thu, Sep 04, 2025 at 10:01:54PM +0200, Marek Vasut wrote:
> Document the 5" Raspberry Pi 720x1280 DSI panel based on ili9881.
>
> Signed-off-by: Marek Vasut
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Thu, Sep 04, 2025 at 10:01:08PM +0200, Marek Vasut wrote:
> The ILI9881C is a DSI panel, which can be tied to a DSI controller
> using OF graph port/endpoint. Allow the port subnode in the binding.
>
> Signed-off-by: Marek Vasut
Acked-by: Conor Dooley
signature.asc
Desc
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Wed, Aug 20, 2025 at 11:37:24AM +0200, Mike Looijmans wrote:
> I actually planned (I have implemented it locally already for v3) for the
> driver to check the chip type and complain if it doesn't match the
> devicetree. If the wrong device is there, the most likely cause is that the
> input and
On Tue, Aug 19, 2025 at 10:26:15AM +0200, Mike Looijmans wrote:
> On 19-08-2025 09:51, Krzysztof Kozlowski wrote:
> > On 19/08/2025 09:46, Mike Looijmans wrote:
> > > > > +
> > > > > +properties:
> > > > > + compatible:
> > > > > +enum:
> > > > > + - ti,tmds181
> > > > > + - ti,sn65d
On Wed, Aug 13, 2025 at 11:25:42AM +0200, Louis-Alexis Eyraud wrote:
> Add a compatible for the MediaTek MT8365 SoC, that has an integrated
> ARM Mali G52 MC1 GPU and compatible with arm,mali-bifrost.
>
> Signed-off-by: Louis-Alexis Eyraud
Acked-by: Conor Dooley
signature.asc
On Tue, Aug 12, 2025 at 04:51:34PM +0200, Mike Looijmans wrote:
> Add DT binding document for TI TMDS181 and SN65DP159 HDMI retimers.
>
> Signed-off-by: Mike Looijmans
> ---
>
> .../bindings/display/bridge/ti,tmds181.yaml | 104 ++
> 1 file changed, 104 insertions(+)
> create
On Thu, Aug 07, 2025 at 04:45:07PM -0500, Rob Herring (Arm) wrote:
> The "ti,opa362" binding is already supported in simple-bridge.yaml, so
> remove the old binding doc.
>
> Signed-off-by: Rob Herring (Arm)
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Wed, Aug 06, 2025 at 02:48:10PM +0200, Iker Pedrosa wrote:
> Add binding for Sitronix ST7920 display.
>
> Signed-off-by: Iker Pedrosa
> ---
> .../bindings/display/sitronix,st7920.yaml | 55
> ++
> 1 file changed, 55 insertions(+)
>
> diff --git a/Documentation/d
On Thu, Jun 12, 2025 at 05:10:23PM +, Kaustabh Chakraborty wrote:
> On 2025-06-12 15:30, Conor Dooley wrote:
> > On Thu, Jun 12, 2025 at 08:22:41PM +0530, Kaustabh Chakraborty wrote:
> >> Samsung S6E8AA5X01 is an AMOLED MIPI DSI panel controller. Document the
> >>
On Thu, Jun 12, 2025 at 03:47:55PM +, Kaustabh Chakraborty wrote:
> On 2025-06-12 15:32, Conor Dooley wrote:
> > On Thu, Jun 12, 2025 at 08:09:40PM +0530, Kaustabh Chakraborty wrote:
> >> Document the driver for Synaptics TDDI (Touch/Display Integration) panels.
> >&
On Thu, Jun 12, 2025 at 08:09:40PM +0530, Kaustabh Chakraborty wrote:
> Document the driver for Synaptics TDDI (Touch/Display Integration) panels.
> Along with the MIPI-DSI panel, these devices also have an in-built LED
> backlight device and a touchscreen, all packed together in a single chip.
> A
t; different sizes.
>
> Signed-off-by: Kaustabh Chakraborty
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
nesas,r9a09g057-du` compatible
> will be used as a fallback for the RZ/V2N SoC.
>
> Signed-off-by: Lad Prabhakar
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Sun, Jun 08, 2025 at 04:28:16PM +0200, Marek Vasut wrote:
> Document the 7" Raspberry Pi 720x1280 DSI panel based on ili9881.
>
> Signed-off-by: Marek Vasut
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Jun 06, 2025 at 01:45:51PM +0200, Stefan Eichenberger wrote:
> The Winstar wf40eswaa6mnn0 panel is a square 4.0" TFT LCD with a
> resolution of 480x480 pixels.
>
> Signed-off-by: Stefan Eichenberger
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Sun, May 25, 2025 at 07:16:40AM +0200, Krzysztof Kozlowski wrote:
> Lists should have fixed constraints, because binding must be specific in
> respect to hardware. Add missing constraints to number of iommus in
> Mediatek media devices.
>
> Signed-off-by: Krzysztof Kozlowski
'#size-cells', 'panel@0' do not
> match any of the regexes: 'pinctrl-[0-9]+'
> from schema $id:
> http://devicetree.org/schemas/display/bridge/renesas,dsi.yaml#
>
> Also add a panel property to the example.
>
> Signed-off-by: Hugo Villeneuve
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Tue, May 20, 2025 at 12:02:25PM -0400, Hugo Villeneuve wrote:
> On Tue, 20 May 2025 17:00:11 +0100
> Conor Dooley wrote:
>
> > On Tue, May 20, 2025 at 04:58:12PM +0100, Conor Dooley wrote:
> > > On Tue, May 20, 2025 at 11:11:12AM -0400, Hugo Villeneuve wrote:
>
On Tue, May 20, 2025 at 04:58:12PM +0100, Conor Dooley wrote:
> On Tue, May 20, 2025 at 11:11:12AM -0400, Hugo Villeneuve wrote:
> > From: Hugo Villeneuve
> >
> > Allow to inherit valid properties from the dsi-controller. This fixes the
> > following warning w
On Tue, May 20, 2025 at 11:11:12AM -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve
>
> Allow to inherit valid properties from the dsi-controller. This fixes the
> following warning when adding a panel property:
>
> rzg2lc.dtb: dsi@1085: '#address-cells', '#size-cells', 'panel@0' do not
HD (1920x1080) TFT LCD panel
> + - auo,p238han01
> # AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel
>- auo,p320hvn03
> # AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Sun, May 18, 2025 at 10:54:11PM +, Jonas Karlman wrote:
> Rockchip RK3528 SoC has a Mali-450 MP2. Add a compatible for it.
>
> Signed-off-by: Jonas Karlman
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
only used of these bindings.
>
> Signed-off-by: Neil Armstrong
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
> Reviewed-by: Linus Walleij
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
, so extend the existing schema
> validation accordingly.
>
> Signed-off-by: Lad Prabhakar
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
in the binding of two leadtek displays
> to fix that.
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Wed, Apr 16, 2025 at 01:40:15PM +0200, Michal Wilczynski wrote:
>
>
> On 4/15/25 18:38, Conor Dooley wrote:
> > On Mon, Apr 14, 2025 at 08:52:56PM +0200, Michal Wilczynski wrote:
> >> Extend the TH1520 AON firmware bindings to describe the GPU clkgen reset
> >&
On Mon, Apr 14, 2025 at 08:52:56PM +0200, Michal Wilczynski wrote:
> Extend the TH1520 AON firmware bindings to describe the GPU clkgen reset
> line, required for proper GPU clock and reset sequencing.
>
> The T-HEAD TH1520 GPU requires coordinated management of two clocks
> (core and sys) and two
On Tue, Apr 08, 2025 at 05:27:02PM +0200, Kory Maincent wrote:
> Document the compatible value for Saef SFTO340XC panels.
>
> Signed-off-by: Kory Maincent
Acked-by: Conor Dooley
> ---
> Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml | 1 +
> 1 file ch
On Mon, Apr 07, 2025 at 09:31:22PM +0800, Bincai Liu wrote:
> Add compatible string to support mipi for MT8196.
You need to point out in your commit message here and in the mipi
binding patch, why a fallback compatible is not suitable.
Cheers,
Conor.
>
> Signed-off-by: Bincai Liu
> ---
> Docu
On Tue, Apr 08, 2025 at 09:04:28AM +0200, Marcus Folkesson wrote:
> Sitronix ST7571 is a 4bit gray scale dot matrix LCD controller.
>
> Signed-off-by: Marcus Folkesson
Reviewed-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Apr 04, 2025 at 03:50:32PM +0200, Marcus Folkesson wrote:
> Sitronix ST7571 is a 4bit gray scale dot matrix LCD controller.
>
> Signed-off-by: Marcus Folkesson
> ---
> .../bindings/display/sitronix,st7571.yaml | 73
> ++
> 1 file changed, 73 insertions(+)
>
On Tue, Mar 18, 2025 at 03:14:07AM +, Sunny Shen (沈姍姍) wrote:
> On Mon, 2025-02-24 at 19:01 +0000, Conor Dooley wrote:
> > On Sun, Feb 23, 2025 at 05:49:45PM +, Sunny Shen (沈姍姍) wrote:
> > > On Tue, 2025-02-11 at 17:54 +, Conor Dooley wrote:
> > > > On T
On Fri, Mar 07, 2025 at 03:54:47PM +0100, Luca Ceresoli wrote:
> Add the Tianma Micro-electronics P0700WXF1MBAA 7.0" LVDS LCD TFT panel.
>
> Signed-off-by: Luca Ceresoli
Acked-by: Conor Dooley
> ---
> Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2
7.1 variants.
>
> Cc: Krzysztof Kozlowski
> Cc: Conor Dooley
> Cc: Nicolas Saenz Julienne
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Maíra Canal
> ---
> Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 6 --
> 1 file changed, 4 insertions(+), 2 delet
On Sun, Feb 23, 2025 at 05:49:45PM +, Sunny Shen (沈姍姍) wrote:
> On Tue, 2025-02-11 at 17:54 +0000, Conor Dooley wrote:
> > On Tue, Feb 11, 2025 at 10:52:50AM +0800, Sunny Shen wrote:
> > > Add MDP-RSZ hardware description for MediaTek MT8196 SoC
> > > +examples:
On Fri, Feb 14, 2025 at 08:29:22AM +0200, Svyatoslav Ryhel wrote:
> чт, 13 лют. 2025 р. о 22:34 Conor Dooley пише:
> >
> > On Thu, Feb 13, 2025 at 03:56:04PM +0200, Svyatoslav Ryhel wrote:
> > > Add bindings for Solomon SSD2825 MIPI master bridge chip that connects an
>
On Fri, Feb 14, 2025 at 07:25:59AM -0800, Doug Anderson wrote:
> Hi,
>
> On Fri, Feb 14, 2025 at 12:59 AM Jerome Brunet wrote:
> >
> > > One think that's always felt a bit meh to me is this id number stuff,
> > > I just threw in 666 for meme value.
> >
> > :)
> >
> > > The whole thing seems super
On Thu, Feb 13, 2025 at 03:56:04PM +0200, Svyatoslav Ryhel wrote:
> Add bindings for Solomon SSD2825 MIPI master bridge chip that connects an
> application processor with traditional parallel LCD interface and an LCD
> driver with MIPI slave interface. The SSD2825 supports both parallel RGB
> inter
e *adev;
> - int ret;
>
> - adev = mpfs_reset_adev_alloc(clk_dev);
> + adev = devm_auxiliary_device_create(clk_dev, "reset-mpfs",
> + (__force void *)base, 666u);
Moving the boilerplate into a helper makes sense:
Acked-by
On Wed, Feb 12, 2025 at 09:58:41AM +0200, Svyatoslav Ryhel wrote:
> Add bindings for the LM3533 - a complete power source for
> backlight, keypad, and indicator LEDs in smartphone handsets.
> The high-voltage inductive boost converter provides the
> power for two series LED strings display backligh
On Tue, Feb 11, 2025 at 10:52:50AM +0800, Sunny Shen wrote:
> Add MDP-RSZ hardware description for MediaTek MT8196 SoC
>
> Signed-off-by: Sunny Shen
> ---
> .../display/mediatek/mediatek,mdp-rsz.yaml| 46 +++
> 1 file changed, 46 insertions(+)
> create mode 100644
> Documen
On Tue, Feb 11, 2025 at 10:52:51AM +0800, Sunny Shen wrote:
> Add a compatible string for MediaTek MT8196 SoC
$subject and $body don't match here.
>
> Signed-off-by: Sunny Shen
> ---
> .../devicetree/bindings/display/mediatek/mediatek,postmask.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
>
1200 Evaluation
> Kits (EVK).
>
> Signed-off-by: AngeloGioacchino Del Regno
>
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
ot match the number of cores (and number
> of power domains), or are for a different GPU architecture.
>
> Reviewed-by: AngeloGioacchino Del Regno
>
> Signed-off-by: Louis-Alexis Eyraud
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Thu, Feb 06, 2025 at 09:12:59PM +0800, Langyan Ye wrote:
> Add a new compatible for the panel CSOT PNA957QT1-1. This panel uses
> HX83102 IC, so add the compatible to the hx83102 binding files.
>
> Signed-off-by: Langyan Ye
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
with:
>
> Reviewed-by: Douglas Anderson
>
> I would assume this will go through the DT tree, not drm-misc. If this
> is wrong then someone should shout.
idk, probably the whole series should go together via drm-misc.
%subject can change if there's a resubmission, otherwise
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Dec 27, 2024 at 06:30:52PM +0530, Parthiban Nallathambi wrote:
> Some platforms like A100/A133 also uses pll-com clock as additional
> clock source for the display clock. This is not documents both in
> user manual and DE 2.0 specification. These changes are mainly from
> vendor BSP.
>
> S
On Fri, Dec 27, 2024 at 06:30:50PM +0530, Parthiban Nallathambi wrote:
> iommu in a133/a100 does not have reset control. remove it
> from required property to make it optional.
Merge this with patch 2, making the reset required for the existing
devices and not permitted (false) for your new device
eloGioacchino Del Regno
>
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
no Del Regno
>
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
dsim";
>
> Document "fsl,imx7d-mipi-dsim" to fix the following dt-schema warning:
>
> ['fsl,imx7d-mipi-dsim', 'fsl,imx8mm-mipi-dsim'] is too long
>
> Signed-off-by: Fabio Estevam
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Dec 06, 2024 at 05:44:15PM +, Sverdlin, Alexander wrote:
> Hello Conor,
>
> On Fri, 2024-12-06 at 17:14 +0000, Conor Dooley wrote:
> > > Add Texas Instruments' LP8864/LP8866 bindings into LP8860 converting them
> > > into YAML format simultaneously. W
On Mon, Dec 16, 2024 at 05:21:34PM +0100, Luca Ceresoli wrote:
> Add the Tianma Micro-electronics TM070JDHG34-00 7.0" LVDS LCD TFT panel.
>
> Signed-off-by: Luca Ceresoli
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Dec 06, 2024 at 06:07:12PM +0100, A. Sverdlin wrote:
> From: Alexander Sverdlin
>
> Add Texas Instruments' LP8864/LP8866 bindings into LP8860 converting them
> into YAML format simultaneously. While here, drop the index of the "led"
> subnode, this one is neither used nor mandated by the
On Mon, Nov 25, 2024 at 02:33:35AM +0100, Marek Vasut wrote:
> Add Multi-Inno Technology MI0700A2T-30 7" 800x480 LVDS panel
> compatible string.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Conor Dooley
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Mon, Nov 25, 2024 at 10:07:03PM +0530, Parthiban Nallathambi wrote:
> GE8300 in Allwinner A133 have reset control from the ccu.
> Add the resets property as optional one to control it.
There's no specific compatible here for an a133, but the binding
requires one. Where is your dts patch?
>
>
On Wed, Nov 20, 2024 at 02:18:41PM +0800, keith zhao wrote:
> Add the display DT nodes in Starfive JH7110 soc-specific DT file.
>
> Signed-off-by: keith zhao
$subject: "riscv: dts: Add display property"
a) this is jh7110 exclusive, not for all riscv devicetrees
b) you are adding more than a pro
On Wed, Nov 06, 2024 at 10:18:10AM +, Matt Coster wrote:
> On 05/11/2024 18:03, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 03:58:14PM +, Matt Coster wrote:
> >> +/ {
> >> +#address-cells = <2>;
> >> +#size-cells
On Wed, Nov 06, 2024 at 10:18:06AM +, Matt Coster wrote:
> On 05/11/2024 18:06, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 03:58:10PM +, Matt Coster wrote:
> >> This attribute will be required for the BXS-4-64 MC1 and will be enabled in
> >> the DT
On Wed, Nov 06, 2024 at 10:18:01AM +, Matt Coster wrote:
> On 05/11/2024 18:13, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 06:05:54PM +0000, Conor Dooley wrote:
> >> On Tue, Nov 05, 2024 at 03:58:09PM +, Matt Coster wrote:
> >>> The single existing G
On Wed, Nov 06, 2024 at 10:17:53AM +, Matt Coster wrote:
> On 05/11/2024 18:16, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 03:58:08PM +, Matt Coster wrote:
> >> All Imagination GPUs use three clocks: core, mem and sys. All reasonably
> >> modern Imagination
On Wed, Nov 06, 2024 at 10:17:47AM +, Matt Coster wrote:
> On 05/11/2024 18:13, Conor Dooley wrote:
> > On Tue, Nov 05, 2024 at 03:58:07PM +, Matt Coster wrote:
> >> The current compatible strings are not specific enough to constrain the
> >> hardware in d
On Tue, Nov 05, 2024 at 08:19:00AM -0600, Rob Herring wrote:
> On Tue, Nov 05, 2024 at 02:52:29PM +0900, Hironori KIKUCHI wrote:
> > A panel assembly is changed in the recent revision of Anbernic RG35XX
> > Plus, so the `anbernic,rg35xx-plus-panel` identifier is neither suitable
> > nor unique for
On Tue, Nov 05, 2024 at 03:58:08PM +, Matt Coster wrote:
> All Imagination GPUs use three clocks: core, mem and sys. All reasonably
> modern Imagination GPUs also support a single-clock mode where the SoC
> only hooks up core and the other two are derived internally. On GPUs which
> support thi
On Tue, Nov 05, 2024 at 06:05:54PM +, Conor Dooley wrote:
> On Tue, Nov 05, 2024 at 03:58:09PM +, Matt Coster wrote:
> > The single existing GPU (AXE-1-16M) only requires a single power domain.
> > Subsequent patches will add support for BXS-4-64 MC1, which has two power
&
On Tue, Nov 05, 2024 at 03:58:09PM +, Matt Coster wrote:
> The single existing GPU (AXE-1-16M) only requires a single power domain.
> Subsequent patches will add support for BXS-4-64 MC1, which has two power
> domains. Add infrastructure now to allow for this.
>
> Signed-off-by: Matt Coster
>
On Tue, Nov 05, 2024 at 03:58:07PM +, Matt Coster wrote:
> The current compatible strings are not specific enough to constrain the
> hardware in devicetree. For example, the current "img,img-axe" string
> refers to the entire family of Series AXE GPUs. The more specific
> "img,img-axe-1-16m" st
On Tue, Nov 05, 2024 at 03:58:10PM +, Matt Coster wrote:
> This attribute will be required for the BXS-4-64 MC1 and will be enabled in
> the DTS for the TI k3-j721s2 in a subsequent patch; add it now so
> dtbs_check doesn't complain later.
Sounds like the property should be made required for t
tible = "ti,j721s2-gpu", "img,img-bxs-4-64",
> "img,img-rogue";
> +reg = /bits/ 64 <0x4e2000 0x8>;
Can you format this normally please? Drop the #address/size-cells down
to 1 if you're against having 0x0s.
Otherwise,
Reviewed
by: Herve Codina
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
ionale.
>
> Signed-off-by: Fei Shao
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
On Fri, Sep 27, 2024 at 02:27:14AM +, Moudy Ho (何宗原) wrote:
> On Thu, 2024-09-26 at 11:38 +0200, AngeloGioacchino Del Regno wrote:
> > Il 25/09/24 16:34, Conor Dooley ha scritto:
> > > On Wed, Sep 25, 2024 at 04:42:59PM +0800, Macpaul Lin wrote:
> > > >
> >
ror:
> dp-intf@1c113000: power-domains: False schema does not allow [[44, 18]]
And while it is good to have the warning, it would be better to explain
here that there are actually power domains, since the dts could be wrong
here also.
Otherwise,
Acked-by: Conor Dooley
> Fixes: 5474d49b2
On Thu, Sep 26, 2024 at 07:14:46PM +0800, Macpaul Lin wrote:
> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'interrupts' property. The error message was:
>
> infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>
mas/display/panel/samsung,s6e3ha8.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung s6e3ha8 AMOLED DSI panel
> +
> +description: The s6e3ha8 is a 1440x2960 DPI display panel from Samsung Mobile
> + Displays (SMD).
if you respin, please start the text on
On Wed, Sep 25, 2024 at 04:42:59PM +0800, Macpaul Lin wrote:
>
> On 9/25/24 00:00, Conor Dooley wrote:
> > On Tue, Sep 24, 2024 at 01:42:01PM +0200, AngeloGioacchino Del Regno wrote:
> > > Il 24/09/24 12:31, Macpaul Lin ha scritto:
> > > > The display nod
On Tue, Sep 24, 2024 at 06:31:52PM +0800, Macpaul Lin wrote:
> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
> to an excessively long 'interrupts' property. The error message was:
>
> infra-iommu@10315000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>
On Tue, Sep 24, 2024 at 01:42:01PM +0200, AngeloGioacchino Del Regno wrote:
> Il 24/09/24 12:31, Macpaul Lin ha scritto:
> > The display node in mt8195.dtsi was triggering a CHECK_DTBS error due
> > to an excessively long 'clocks' property:
> >display@14f06000: clocks: [[31, 14], [31, 43], [31,
devices.
>
> Signed-off-by: Manikandan Muralidharan
Reviewed-by: Conor Dooley
signature.asc
Description: PGP signature
On Wed, Sep 18, 2024 at 03:00:45AM +, manikanda...@microchip.com wrote:
> On 17/09/24 6:08 pm, Conor Dooley wrote:
> > On Tue, Sep 17, 2024 at 03:16:53AM +,manikanda...@microchip.com wrote:
> >> Hi Conor,
> >>
> >> On 14/08/24 7:29 pm, Conor Dooley wro
On Tue, Sep 17, 2024 at 03:16:53AM +, manikanda...@microchip.com wrote:
> Hi Conor,
>
> On 14/08/24 7:29 pm, Conor Dooley wrote:
> > On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
> >> Add the 'sam9x75-mipi-dsi' compa
On Fri, Sep 13, 2024 at 05:51:56PM +0300, Dzmitry Sankouski wrote:
> чт, 20 июн. 2024 г. в 18:46, Krzysztof Kozlowski :
> >
> > On 18/06/2024 15:59, Dzmitry Sankouski wrote:
> > > maxim,max77705 is MAX77705 pmic binding part
> > >
> > > Signed-off-by: Dzmitry Sankouski
> > > ---
> > > .../devicet
On Fri, Aug 23, 2024 at 09:01:51AM +0800, Andy Yan wrote:
>
> Hi，
>
> 在 2024-08-22 19:59:43，"Cristian Ciocaltea"
> 写道：
> >On 8/22/24 11:41 AM, Conor Dooley wrote:
> >> On Thu, Aug 22, 2024 at 09:01:34AM +0200, Heiko Stübner wrote:
> >>&g
On Fri, Aug 23, 2024 at 12:47:50PM +0200, Heiko Stübner wrote:
> Am Donnerstag, 22. August 2024, 10:41:10 CEST schrieb Conor Dooley:
> > On Thu, Aug 22, 2024 at 09:01:34AM +0200, Heiko Stübner wrote:
> > > @Conor: just for me, did some shift happen in our understanding of dt-
&g
On Thu, Aug 22, 2024 at 09:01:34AM +0200, Heiko Stübner wrote:
> @Conor: just for me, did some shift happen in our understanding of dt-
> best-practices in terms of syscon via phandle vs. syscon via compatible?
>
> Because Rockchip boards are referencing their GRFs via phandes forever
> but simila
Cristian, Heiko,
On Wed, Aug 21, 2024 at 11:38:01PM +0300, Cristian Ciocaltea wrote:
> On 8/21/24 6:07 PM, Conor Dooley wrote:
> > On Tue, Aug 20, 2024 at 11:12:45PM +0300, Cristian Ciocaltea wrote:
> >> On 8/20/24 7:14 PM, Conor Dooley wrote:
> >>> On Tue, Au
On Tue, Aug 20, 2024 at 11:12:45PM +0300, Cristian Ciocaltea wrote:
> On 8/20/24 7:14 PM, Conor Dooley wrote:
> > On Tue, Aug 20, 2024 at 03:37:44PM +0300, Cristian Ciocaltea wrote:
> >> On 8/19/24 7:53 PM, Conor Dooley wrote:
> >>> On Mon, Aug 19, 2024 at 01:29:
On Tue, Aug 20, 2024 at 03:37:44PM +0300, Cristian Ciocaltea wrote:
> On 8/19/24 7:53 PM, Conor Dooley wrote:
> > On Mon, Aug 19, 2024 at 01:29:30AM +0300, Cristian Ciocaltea wrote:
> >> Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI 2.1
> >> Quad-
lower.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
g top-level constraints
> for clocks, clock-names, interrupts, resets, reset-names, renesas,cmms
> and renesas,vsps.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Conor Dooley
> ---
> .../bindings/display/renesas,du.yaml | 26 ---
> 1 file changed,
On Mon, Aug 19, 2024 at 01:29:30AM +0300, Cristian Ciocaltea wrote:
> Rockchip RK3588 SoC integrates the Synopsys DesignWare HDMI 2.1
> Quad-Pixel (QP) TX controller IP.
>
> Since this is a new IP block, quite different from those used in the
> previous generations of Rockchip SoCs, add a dedicate
On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
> Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
> Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
> Controller for the sam9x75 series System-on-Chip (SoC) devices.
>
> Signed-off-by
On Tue, Aug 06, 2024 at 03:33:00PM +0200, Frieder Schrempf wrote:
> From: Frieder Schrempf
>
> The Jenson BL-JT60050-01A is a 7" 1024x600 LVDS display.
>
> Signed-off-by: Frieder Schrempf
Acked-by: Conor Dooley
Cheers,
Conor.
> ---
> Documentation/devicetree/bi
On Tue, Jul 23, 2024 at 05:17:12PM +0200, Marc Gonzalez wrote:
> On 27/06/2024 18:25, Conor Dooley wrote:
>
> > On Thu, Jun 27, 2024 at 01:13:03PM +0200, Marc Gonzalez wrote:
> >
> >> TDP158 is an AC-coupled DVI / HDMI to TMDS level shifting Redriver.
> >> It
1 - 100 of 425 matches
Mail list logo
