Hi,
On Fri, Aug 02, 2019 at 04:21:53PM +0200, Philipp Zabel wrote:
> Hi Guido,
>
> On Fri, 2019-08-02 at 15:39 +0200, Guido Günther wrote:
> > Hi Lucas,
> > On Fri, Jul 05, 2019 at 07:17:21PM +0200, Lucas Stach wrote:
> > > This allows to decouple the cmdbuf s
Hi Lucas,
On Fri, Jul 05, 2019 at 07:17:21PM +0200, Lucas Stach wrote:
> This allows to decouple the cmdbuf suballocator create and mapping
> the region into the GPU address space. Allowing multiple AS to share
> a single cmdbuf suballoc.
Can you tell me where this would apply? I tried 5.2 and
Since
commit 3d1df96ad468 ("drm/imx: merge imx-drm-core and ipuv3-crtc in one module")
imx-ipuv3-crtc.o is built via imxdrm-objs. So there's no need to keep an
extra entry with a non existing config value (CONFIG_DRM_IMX_IPUV3).
Signed-off-by: Guido Günther
---
drivers/gpu/drm/im
nce(struct etnaviv_vram_mapping *mapping);
> void etnaviv_gem_mapping_unreference(struct etnaviv_vram_mapping *mapping);
>
> #endif /* __ETNAVIV_GEM_H__ */
Reviewed-by: Guido Günther
cheers,
-- Guido
> --
> 2.20.1
>
> ___
>vram_node, SUBALLOC_SIZE,
> @@ -64,7 +66,7 @@ etnaviv_cmdbuf_suballoc_new(struct etnaviv_gpu * gpu)
> free_suballoc:
> kfree(suballoc);
>
> - return NULL;
> + return ERR_PTR(ret);
> }
>
> void etnaviv_cmd
dbuf_suballoc = NULL;
> - }
> -
> - if (gpu->mmu) {
> etnaviv_iommu_destroy(gpu->mmu);
> - gpu->mmu = NULL;
> + gpu->initialized = false;
> }
>
> +
Maybe drop this line, otherwise:
Reviewed-by: Guido Günther
Hi,
On Wed, Jul 31, 2019 at 11:43:47AM -0300, Fabio Estevam wrote:
> Hi Guido,
>
> On Wed, Jul 31, 2019 at 11:35 AM Guido Günther wrote:
>
> > The idea is to have
> >
> > "%sabling platform clocks", enable ? "en" : "dis");
> &
Hi,
On Sat, Jul 27, 2019 at 05:04:44AM +0300, Laurent Pinchart wrote:
> Hello,
>
> On Fri, Jul 26, 2019 at 05:01:52PM -0300, Fabio Estevam wrote:
> > Hi Guido,
> >
> > Thanks for your work on this driver!
> >
> > On Wed, Jul 24, 2019 at 12:52 PM Guido G
Hi Laurent,
thanks for having a look.
On Sat, Jul 27, 2019 at 04:57:16AM +0300, Laurent Pinchart wrote:
> Hi Guido,
>
> Thank you for the patch.
>
> On Wed, Jul 24, 2019 at 05:52:25PM +0200, Guido Günther wrote:
> > The Northwest Logic MIPI DSI IP core can be fou
Hi Fabio,
thanks for having a look! I followed most of your comments, there's some
things i'm unsure, see below:
On Fri, Jul 26, 2019 at 05:01:52PM -0300, Fabio Estevam wrote:
> Hi Guido,
>
> Thanks for your work on this driver!
>
> On Wed, Jul 24, 2019 at 12:52 PM Guido
Hi Laurentiu,
On Tue, May 28, 2019 at 10:10:11AM +, Laurentiu Palcu wrote:
> Hi Guido,
>
> On Tue, May 28, 2019 at 11:33:00AM +0200, Guido Günther wrote:
> > Caution: EXT Email
> >
> > Hi Laurentiu,
> > On Tue, May 28, 2019 at 07:03:54AM +, Laurentiu P
This makes the test utilities work with the mxsfb driver without the
necessity of using the -M argument.
Signed-off-by: Guido Günther
---
tests/util/kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/util/kms.c b/tests/util/kms.c
index dd1bbee3..a86bad78 100644
--- a/tests/util
Hi Sam,
On Fri, Jul 26, 2019 at 12:25:29PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> On Fri, Jul 26, 2019 at 11:21:40AM +0200, Guido Günther wrote:
> > If the panel is wrapped in a panel_bridge it gets prepar()ed before the
> > upstream DSI bridge which can cause hangs (e.
This makes it symmetric with the panel init happening in enable().
Signed-off-by: Guido Günther
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
b/drivers/gpu/drm
Most of them had these already but two mere missing. This eases
debugging.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel
pre_enable().
This is also in line with other panel drivers.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
.../gpu/drm/panel/panel-rocktech-jh057n00900.c| 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-rocktech
We were already using the generic functions in our debugfs code, do the
same in jh057n_shutdown. This was suggested by Sam Ravnborg.
Signed-off-by: Guido Günther
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
,disable} consistently'
* Collected Reviewed-By: Thanks Sam!
To: "Guido Günther" ,Purism Kernel Team
,Thierry Reding ,Sam Ravnborg
,David Airlie ,Daniel Vetter
,dri-devel@lists.freedesktop.org,linux-ker...@vger.kernel.org
Guido Günther (4):
drm/panel: jh057n00900: Move pane
Hi Sam,
thanks for your comments!
On Fri, Jul 26, 2019 at 11:23:15AM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> A few comments follows.
>
> Sam
>
> On Wed, Jul 24, 2019 at 05:52:25PM +0200, Guido Günther wrote:
> > The Northwest Logic MIPI DSI IP core can
The bridge might have special requirmentes on the input bus. This
is e.g. used by the imx-nwl bridge.
Signed-off-by: Guido Günther
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
b/drivers/gpu/drm
for mxsfb DRM driver'[0] and 'drm: bridge:
Add NWL MIPI DSI host controller support'[1] on next-20190725.
[0]: https://patchwork.freedesktop.org/series/62822/
[1]: https://patchwork.freedesktop.org/series/64185/
Guido Günther (1):
drm/mxsfb: Read bus flags from bridge if present
drivers/gpu/drm/mxsfb
Most of them had these already but two mere missing. This eases
debugging.
Signed-off-by: Guido Günther
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
b/drivers
pre_enable().
The second patch makes the disable() call symmetric to the above and the third
one just eases debugging.
Guido Günther (3):
drm/panel: jh057n00900: Move panel DSI init to enable()
drm/panel: jh057n00900: Move mipi_dsi_dcs_set_display_off to disable()
drm/panel: jh057n00900: Print
This makes it symmetric with the panel init happening in enable().
Signed-off-by: Guido Günther
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
b/drivers/gpu
pre_enable().
This is also in line with other panel drivers.
Signed-off-by: Guido Günther
---
.../gpu/drm/panel/panel-rocktech-jh057n00900.c| 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c
b/drivers/gpu/drm
The Northwest Logic MIPI DSI IP core can be found in NXPs i.MX8 SoCs.
Signed-off-by: Guido Günther
---
.../bindings/display/bridge/imx-nwl-dsi.txt | 89 +++
1 file changed, 89 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/imx-nwl-dsi.txt
/2019-May/219484.html
[1]: https://patchwork.freedesktop.org/series/62822/
Guido Günther (3):
arm64: imx8mq: add imx8mq iomux-gpr field defines
dt-bindings: display/bridge: Add binding for IMX NWL mipi dsi host
controller
drm/bridge: Add NWL MIPI DSI host controller support
.../bindings
This adds all the gpr registers and the define needed for selecting
the input source in the imx-nwl drm bridge.
Signed-off-by: Guido Günther
---
include/linux/mfd/syscon/imx8mq-iomuxc-gpr.h | 62
1 file changed, 62 insertions(+)
create mode 100644 include/linux/mfd/syscon
This adds initial support for the NWL MIPI DSI Host controller found on
i.MX8 SoCs.
It adds support for the i.MX8MQ but the same IP can be found on
e.g. the i.MX8QXP.
It has been tested on the Librem 5 devkit using mxsfb.
Signed-off-by: Guido Günther
Co-developed-by: Robert Chiras
Hi,
I'm not very familiar with mxsfb, just some things that stood out while
looking at the code:
On Wed, Jun 26, 2019 at 04:32:10PM +0300, Robert Chiras wrote:
> Since version 4 of eLCDIF, there are some registers that can do
> transformations on the input data, like re-arranging the pixel
>
buf old_fmt_buf;
> + struct drm_format_name_buf new_fmt_buf;
> +
> + DRM_DEV_DEBUG_DRIVER(crtc->dev->dev,
> + "Switching pixel format: %s -> %s\n",
> + drm_get_format_name(old_fb->format->f
Hi Robert,
On Tue, Jul 16, 2019 at 04:54:50PM +0200, Guido Günther wrote:
> Hi Robert,
> On Fri, Jul 12, 2019 at 08:15:32AM +, Robert Chiras wrote:
> > Hi Guido,
> >
> > On Jo, 2019-07-11 at 17:04 +0200, Guido Günther wrote:
> > > Hi Robert,
> > >
Hi Robert,
On Fri, Jul 12, 2019 at 08:15:32AM +, Robert Chiras wrote:
> Hi Guido,
>
> On Jo, 2019-07-11 at 17:04 +0200, Guido Günther wrote:
> > Hi Robert,
> > On Wed, Jun 26, 2019 at 04:32:08PM +0300, Robert Chiras wrote:
> > >
> > > This patch-set im
Hi Robert,
On Wed, Jun 26, 2019 at 04:32:08PM +0300, Robert Chiras wrote:
> This patch-set improves the use of eLCDIF block on iMX 8 SoCs (like 8MQ, 8MM
> and 8QXP). Following, are the new features added and fixes from this
> patch-set:
>
> 1. Add support for drm_bridge
> On 8MQ and 8MM, the
Hi,
On Wed, Jun 26, 2019 at 02:41:39PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> On Wed, Jun 26, 2019 at 12:37:47PM +0200, Guido Günther wrote:
> > Fix the omission of a regulators for the recently added panel and make sure
> > all
> > dsi commands start with a co
Hi Sam,
On Tue, Jun 25, 2019 at 11:24:19PM +0200, Sam Ravnborg wrote:
> On Tue, Jun 25, 2019 at 07:05:19PM +0200, Guido Günther wrote:
> > Allow to specify regulators for vcc and iovcc. According to the data
> > sheet the panel wants vcc (2.8V) and iovcc (1.8V) and the
Allow to specify regulators for vcc and iovcc. According to the data
sheet the panel wants vcc (2.8V) and iovcc (1.8V) and there's no startup
dependency between the two.
Signed-off-by: Guido Günther
---
.../drm/panel/panel-rocktech-jh057n00900.c| 41 +++
1 file changed, 41
review comments from Sam Ravnborg:
- Print error on devm_regulator_get() failres
- Fix typos in commit messages
* Print an error on regulator_enable()
* Disable vcc if iovcc fails to enable
Guido Günther (4):
MAINTAINERS: Add Purism mail alias as reviewer for their devkit's
panel
drm
0xBF isn't in any ST7703 data sheet so mark it as unknown. This avoids
confusion on whether there is a missing command in that
dsi_generic_write_seq() call.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 3 ++-
1 file changed, 2
Document the vcc-supply and iovcc-supply properties of the Rocktech
jh057n00900 panel.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
.../bindings/display/panel/rocktech,jh057n00900.txt | 5 +
1 file changed, 5 insertions(+)
diff --git
a/Documentation/devicetree
Add a mail alias as reviewer for the rocktech jh057n00900 panel driver.
Signed-off-by: Guido Günther
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 10359a30ed3c..b7de43a4910d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5133,6 +5133,7 @@ F
Document the vcc-supply and iovcc-supply propertes of the Rocktech
jh057n0090 panel.
Signed-off-by: Guido Günther
---
.../bindings/display/panel/rocktech,jh057n00900.txt | 5 +
1 file changed, 5 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/rocktech
0xBF isn't in any ST7703 data sheet so mark it as unknown. This avoids
confusion on whether there is a missing command in that
dsi_generic_write_seq() call.
Signed-off-by: Guido Günther
---
drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
Allow to specify regulators for vcc and iovcc. According to the data
sheet the panel wants vcc (2.8V) and iovcc (1.8V) and there's no startup
dependency between the two.
Signed-off-by: Guido Günther
---
.../drm/panel/panel-rocktech-jh057n00900.c| 19 +++
1 file changed, 19
Ravnborg
,David Airlie ,Daniel Vetter
,Rob Herring ,Mark Rutland
,Mauro Carvalho Chehab
,"David S. Miller" ,Greg
Kroah-Hartman ,Nicolas Ferre
,"Paul E. McKenney"
,dri-devel@lists.freedesktop.org,devicet...@vger.kernel.org,linux-ker...@vger.kernel.org,Purism
Kernel Team
Add a mail alias as reviewer for the rocktech jh057n00900 panel driver.
Signed-off-by: Guido Günther
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 10359a30ed3c..b7de43a4910d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5133,6 +5133,7 @@ F
Hi,
On Thu, Jun 20, 2019 at 02:18:53PM +0530, Kishon Vijay Abraham I wrote:
> Hi,
>
> On 24/05/19 9:31 PM, Kishon Vijay Abraham I wrote:
> > Hi,
> >
> > On 24/05/19 5:53 PM, Fabio Estevam wrote:
> >> Hi Kishon,
> >>
> >> On Sun, May 12, 2019
once the necessary system controller bits are in via
mixel_dphy_devdata.
Signed-off-by: Guido Günther
Co-developed-by: Robert Chiras
Signed-off-by: Robert Chiras
Reviewed-by: Fabio Estevam
Reviewed-by: Sam Ravnborg
---
drivers/phy/freescale/Kconfig | 10 +
drivers/phy
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
Reviewed-by: Rob Herring
Reviewed-by: Fabio Estevam
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create
kernel.org,linux-arm-ker...@lists.infradead.org,dri-devel@lists.freedesktop.org,Robert
Chiras ,Sam Ravnborg ,Maxime Ripard
Guido Günther (2):
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
.../bindings/phy/mixel,mipi-dsi-phy.txt
Hi,
On Thu, Jun 13, 2019 at 01:57:17PM +0200, Greg Kroah-Hartman wrote:
> When calling debugfs functions, there is no need to ever check the
> return value. The function can work or not, but the code logic should
> never do something different based on this.
>
> Cc: "
Hi,
On Tue, May 28, 2019 at 10:10:11AM +, Laurentiu Palcu wrote:
> Hi Guido,
>
> On Tue, May 28, 2019 at 11:33:00AM +0200, Guido Günther wrote:
> > Caution: EXT Email
> >
> > Hi Laurentiu,
> > On Tue, May 28, 2019 at 07:03:54AM +, Laurentiu P
Hi Laurentiu,
On Tue, May 28, 2019 at 07:03:54AM +, Laurentiu Palcu wrote:
> Hi Shawn, Lucas,
>
> On Tue, May 28, 2019 at 09:38:02AM +0800, Shawn Guo wrote:
> > Caution: EXT Email
> >
> > Hi Lucas,
> >
> > On Mon, May 27, 2019 at 03:36:53PM +0200, Lucas Stach wrote:
> > > We have been
Hi Lucas,
On Mon, May 27, 2019 at 03:36:53PM +0200, Lucas Stach wrote:
> Am Mittwoch, den 08.05.2019, 19:18 +0200 schrieb Guido Günther:
> > Hi,
> > On Thu, Mar 07, 2019 at 11:30:51AM +0100, Guido Günther wrote:
> > > This adds initial support for the NWL MIPI D
Hi,
On Mon, May 27, 2019 at 10:24:02AM +0800, Shawn Guo wrote:
> On Wed, May 08, 2019 at 07:18:27PM +0200, Guido Günther wrote:
> > If somebody is working on DCSS support it'd be cool to know since this
>
> I have some time slots here and will start looking at it, if no one el
lving hs clock
* Switch from dphy_ops to devdata. Other i.MX8 variants
differ in register layout too
* Add Mixel Inc to vendor-prefixes.txt
Guido Günther (2):
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
.../bindings/phy/
once the necessary system controller bits are in via
mixel_dphy_devdata.
Signed-off-by: Guido Günther
Co-developed-by: Robert Chiras
Signed-off-by: Robert Chiras
Reviewed-by: Fabio Estevam
Reviewed-by: Sam Ravnborg
---
drivers/phy/freescale/Kconfig | 10 +
drivers/phy
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
Reviewed-by: Rob Herring
Reviewed-by: Fabio Estevam
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create
Hi Lucas,
On Fri, May 03, 2019 at 01:10:26PM +0200, Guido Günther wrote:
> Hi Lucas,
> On Wed, Apr 17, 2019 at 03:50:15PM +0200, Lucas Stach wrote:
> >
> > Hi all,
> >
> > v1 cover letter:
> >
> > the following patches finally implement one of the
Hi,
On Thu, Mar 07, 2019 at 11:30:51AM +0100, Guido Günther wrote:
> This adds initial support for the NWL MIPI DSI Host controller found on i.MX8
> SoCs.
>
> It adds support for the i.MX8MQ but the same IP core can also be found on e.g.
> i.MX8QXP. I added the necessary hooks t
Hi,
On Tue, May 07, 2019 at 08:12:23PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> Looks good now, stumbled upon a few details I missed in last round.
> With these considered / fixed you can add my
> Reviewed-by: Sam Ravnborg
>
> Sam
>
> > +#define CM(x) (
once the necessary system controller bits are in via
mixel_dphy_devdata.
Signed-off-by: Guido Günther
Co-developed-by: Robert Chiras
Signed-off-by: Robert Chiras
---
drivers/phy/freescale/Kconfig | 10 +
drivers/phy/freescale/Makefile| 1 +
.../phy/freescale
as for timings involving hs clock
* Switch from dphy_ops to devdata. Other i.MX8 variants
differ in register layout too
* Add Mixel Inc to vendor-prefixes.txt
Guido Günther (2):
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
..
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
Reviewed-by: Rob Herring
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create mode 100644 Documentation
Hi Lucas,
On Wed, Apr 17, 2019 at 03:50:15PM +0200, Lucas Stach wrote:
>
> Hi all,
>
> v1 cover letter:
>
> the following patches finally implement one of the longstanding TODO
> items in the etnaviv driver: per-process address spaces. They are only
> enabled for MMUv2, as switching the MMU
Hi,
On Wed, Apr 17, 2019 at 03:50:19PM +0200, Lucas Stach wrote:
> This reworks the MMU handling to make it possible to have multiple
> MMU contexts, not one per GPU. This commit doesn't actually do anything
> with those contexts, aside from giving one of them to each GPU.
>
> The code changes
Hi,
On Tue, Apr 30, 2019 at 10:31:08PM +0200, Sam Ravnborg wrote:
> Hi Guido.
>
> Took a look at this, but feedback is trivial as
> I have no experience with PHYs so use only
> the feedback you consider relevant.
They all made sense so I've incorporated them for v10.
>
> Sam
>
> > diff
Hi Fabio,
On Tue, Apr 30, 2019 at 01:24:45PM -0300, Fabio Estevam wrote:
> Hi Guido,
>
> On Tue, Apr 30, 2019 at 11:40 AM Guido Günther wrote:
> >
> > This adds support for the Mixel DPHY as found on i.MX8 CPUs but since
> > this is an IP core it will likely be found
once the necessary system controller bits are in via
mixel_dphy_devdata.
Co-authored-by: Robert Chiras
Signed-off-by: Guido Günther
---
drivers/phy/freescale/Kconfig | 11 +
drivers/phy/freescale/Makefile| 1 +
.../phy/freescale/phy-fsl-imx8-mipi-dphy.c| 506
desktop.org,Robert
Chiras ,Sam Ravnborg ,Maxime Ripard
Guido Günther (2):
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +
drivers/phy/freescale/Kconfig |
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
Reviewed-by: Rob Herring
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create mode 100644 Documentation
RROR(dev, "mipi_dsi_attach failed. Is host ready?");
> + DRM_DEV_ERROR(dev, "mipi_dsi_attach failed. Is host ready?\n");
> drm_panel_remove(>panel);
> return ret;
> }
>
> - DRM_DEV_INFO(dev, "%ux%u@
Hi,
On Wed, Apr 03, 2019 at 10:11:00AM -0700, Joe Perches wrote:
> On Wed, 2019-04-03 at 18:17 +0200, Thierry Reding wrote:
> > On Mon, Apr 01, 2019 at 12:35:32PM +0200, Guido Günther wrote:
> > > v4 fixes up the DT binding example and uses a wider cc list since I
> > >
t;size = (u64)SZ_1G * 4 - SZ_4K;
> domain->ops = _iommuv2_ops;
>
> ret = etnaviv_iommuv2_init(etnaviv_domain);
> --
Reviewed-By: Guido Günther
Cheers and sorry for the extreme delay,
-- Guido
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
Hi,
On Mon, Jan 07, 2019 at 04:02:33PM +0100, Lucas Stach wrote:
[..snip..]
> I've certainly seen the timeout handler working on GC7000, but with the
> GC7000 support being relatively lightly tested right now, I wouldn't
> bet on us handling all corner cases correctly.
>
> If this is an issue on
uence
(including sleeps) were provided by the vendor. Sleeps were reduced
considerably though to speed up initialization.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 13 +
driver
>backlight->dev);
* Add /* Sentinel */ in jh057n_of_match
* Drop jh057n->enabled
* Drop drm_display_info_set_bus_formats
* Kconfig: Depend on BACKLIGHT_CLASS_DEVICE which somehow got lost
* Move jh057n_enable close to jh057n_disable
Guido Günther (3):
dt-bindings: Add vendor prefix for R
Add ROCKTECH DISPLAYS LIMITED (https://rocktech.com.hk) LCD panel
supplier.
Signed-off-by: Guido Günther
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation
The Rocktec jh057n00900 is a 5.5" MIPI DSI video mode panel with a
720x1440 resolution and a built in backlight.
Signed-off-by: Guido Günther
---
.../display/panel/rocktech,jh057n00900.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644
Document
Hi Andreas,
On Thu, Mar 28, 2019 at 06:04:49PM +0100, Andreas Färber wrote:
> Am 27.03.19 um 09:19 schrieb Guido Günther:
> > Add vendor prefix "mixel" for Mixel Inc. Will be used for a MIPI DSI
> > PHY driver.
>
> Nit: s/driver/binding/ (to not be Linux specific)
&
Hi Rob,
On Thu, Mar 28, 2019 at 11:57:29AM -0500, Rob Herring wrote:
> On Wed, Mar 27, 2019 at 09:20:00AM +0100, Guido Günther wrote:
> > Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ.
> >
> > Signed-off-by: Guido Günther
> >
once the necessary system controller bits are in via
mixel_dphy_devdata.
Co-authored-by: Robert Chiras
Signed-off-by: Guido Günther
---
drivers/phy/freescale/Kconfig | 11 +
drivers/phy/freescale/Makefile| 1 +
.../phy/freescale/phy-fsl-imx8-mipi-dphy.c| 506
sensible, check for errors
* Use ad hoc forumulas for timings involving hs clock
* Switch from dphy_ops to devdata. Other i.MX8 variants
differ in register layout too
* Add Mixel Inc to vendor-prefixes.txt
Guido Günther (2):
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver f
Add support for the MIXEL DPHY IP as found on NXP's i.MX8MQ SoCs.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mixel
once the necessary system controller bits are in via
mixel_dphy_devdata.
Co-authored-by: Robert Chiras
Signed-off-by: Guido Günther
---
drivers/phy/freescale/Kconfig | 11 +
drivers/phy/freescale/Makefile| 1 +
.../phy/freescale/phy-fsl-imx8-mipi-dphy.c| 506
..@vger.kernel.org,devicet...@vger.kernel.org,linux-arm-ker...@lists.infradead.org,dri-devel@lists.freedesktop.org,Robert
Chiras ,Sam Ravnborg ,Maxime Ripard
Guido Günther (3):
dt-bindings: Add vendor prefix for Mixel Inc
dt-bindings: phy: Add documentation for mixel dphy
phy: Add driver fo
Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mixel
Add vendor prefix "mixel" for Mixel Inc. Will be used for a MIPI DSI
PHY driver.
Signed-off-by: Guido Günther
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Doc
Hi,
On Mon, Mar 25, 2019 at 11:10:47AM -0300, Fabio Estevam wrote:
> On Mon, Mar 25, 2019 at 11:06 AM Guido Günther wrote:
>
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.txt
> > @@ -0,0 +1,18 @@
> > +Ro
Some examples were missing the unit names triggering
Warning (unit_address_vs_reg): .../panel: node has a reg or ranges property,
but no unit name
warnings when used verbatim in DTs and running dtc with W=1.
Signed-off-by: Guido Günther
---
.../devicetree/bindings/display/panel/innolux
Add vendor prefix "mixel" for Mixel Inc. Will be used for a MIPI DSI
PHY driver.
Signed-off-by: Guido Günther
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Doc
The Rocktec jh057n00900 is a 5.5" MIPI DSI video mode panel with a
720x1440 resolution and a built in backlight.
Signed-off-by: Guido Günther
---
.../display/panel/rocktech,jh057n00900.txt | 18 ++
1 file changed, 18 insertions(+)
create mode 100644
Document
set: Add proper space around '*'
* Drop superfluous put_device(>backlight->dev);
* Add /* Sentinel */ in jh057n_of_match
* Drop jh057n->enabled
* Drop drm_display_info_set_bus_formats
* Kconfig: Depend on BACKLIGHT_CLASS_DEVICE which somehow got lost
* Move jh057n_enable close
ulations
* Use LP clock rate where sensible, check for errors
* Use ad hoc forumulas for timings involving hs clock
* Switch from dphy_ops to devdata. Other i.MX8 variants
differ in register layout too
* Add Mixel Inc to vendor-prefixes.txt
Guido Günther (3):
dt-bindings: Add vendor prefix for M
Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
.../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/mixel
once the necessary system controller bits are in via
mixel_dphy_devdata.
Co-authored-by: Robert Chiras
Signed-off-by: Guido Günther
---
drivers/phy/freescale/Kconfig | 11 +
drivers/phy/freescale/Makefile| 1 +
.../phy/freescale/phy-fsl-imx8-mipi-dphy.c| 506
uence
(including sleeps) were provided by the vendor. Sleeps were reduced
considerably though to speed up initialization.
Signed-off-by: Guido Günther
Reviewed-by: Sam Ravnborg
---
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 13 +
driver
Add ROCKTECH DISPLAYS LIMITED (https://rocktech.com.hk) LCD panel
supplier.
Signed-off-by: Guido Günther
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation
Hi,
On Fri, Feb 08, 2019 at 11:55:41AM +, Robert Chiras wrote:
[..snip..]
> > > version of eLCDIF with Raydium RM67191 DSI panel on mScale850D
> > > (i.MX8MQ). And I tried using this driver but there is no signal on
> > > the
> > > screen, even through the register values are all identical.
Add vendor prefix "mixel" for Mixel Inc. Will be used for a MIPI DSI
PHY driver.
Signed-off-by: Guido Günther
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Doc
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