Hi Thierry
When I'm preparing v3 series, I meet some trobules from your comment,
wish you could give some advise? ;)
å¨ 2015/8/10 18:00, Thierry Reding åé:
> On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
> [...]
>> edp: edp at ff97 {
> [...]
>>
Hi Thierry,
å¨ 2015/8/10 21:17, Thierry Reding åé:
> On Mon, Aug 10, 2015 at 08:59:44PM +0800, Yakir Yang wrote:
>> Hi Thierry,
>>
>> å¨ 2015/8/10 18:00, Thierry Reding åé:
>>> On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
>>> [...]
edp: edp at ff97 {
>>>
Hi Heiko,
å¨ 2015/8/10 20:08, Heiko Stübner åé:
> Hi Yakir,
>
> Am Samstag, 8. August 2015, 11:54:38 schrieb Yakir Yang:
+static int rockchip_dp_init(struct rockchip_dp_device *dp)
+{
+ struct device *dev = dp->dev;
+ struct device_node *np = dev->of_node;
+ int
Hi Thierry,
å¨ 2015/8/10 18:00, Thierry Reding åé:
> On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
> [...]
>> edp: edp at ff97 {
> [...]
>> hsync-active-high = <0>;
>> vsync-active-high = <0>;
>> interlaced = <0>;
On Mon, Aug 10, 2015 at 08:59:44PM +0800, Yakir Yang wrote:
> Hi Thierry,
>
> å¨ 2015/8/10 18:00, Thierry Reding åé:
> >On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
> >[...]
> >> edp: edp at ff97 {
> >[...]
> >> hsync-active-high = <0>;
> >>
Hi Yakir,
Am Samstag, 8. August 2015, 11:54:38 schrieb Yakir Yang:
> >> +static int rockchip_dp_init(struct rockchip_dp_device *dp)
> >> +{
> >> + struct device *dev = dp->dev;
> >> + struct device_node *np = dev->of_node;
> >> + int ret;
> >> +
> >> + dp->grf =
On Sat, Aug 08, 2015 at 11:54:38AM +0800, Yakir Yang wrote:
[...]
> edp: edp at ff97 {
[...]
> hsync-active-high = <0>;
> vsync-active-high = <0>;
> interlaced = <0>;
These look like they should come from the display mode definition
Hi Hekio,
å¨ 2015/8/8 6:46, Heiko Stübner åé:
> Hi Yakir,
>
>
> I think this Rockchip portion is missing a devicetree binding.
Oh, thanks, I would complete it in next ;)
> You have the ability to power down the actual edp phy by using
> grf_edp_iddq_en from GRF_SOC_CON12. This is similar
Hi Yakir,
I think this Rockchip portion is missing a devicetree binding.
You have the ability to power down the actual edp phy by using
grf_edp_iddq_en from GRF_SOC_CON12. This is similar to how the
rk3288 usb-phy gets put into a deeper state. So maybe you could
provide a phy driver
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
---
Changes in v2: None
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile
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