Hi Christian!
> Well let's face it AGP is a total headache to maintain and dead for at least
> 10+ years.
>
> We have a lot of x86 specific stuff in the architecture independent graphics
> memory management
> to get the caching right, abusing the DMA API on multiple occasions, need to
>
On Mon, May 11, 2020 at 1:17 PM Christian König
wrote:
>
> AGP is deprecated for 10+ years now and not used any more on modern hardware.
>
> Old hardware should continue to work in PCI mode.
Might want to clarify that there is no loss of functionality here.
Something like:
"There is no loss of
Am 11.05.20 um 21:55 schrieb John Paul Adrian Glaubitz:
Hi Christian!
Well let's face it AGP is a total headache to maintain and dead for at least
10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics
memory management
to get the caching right, abusing the
https://bugzilla.kernel.org/show_bug.cgi?id=207693
Bug ID: 207693
Summary: amdgpu: RX 5500 XT boost frequency out of spec
Product: Drivers
Version: 2.5
Kernel Version: 5.6.12
Hardware: All
OS: Linux
Tree:
On Mon, May 11, 2020 at 4:25 PM Rui Salvaterra wrote:
>
>
>
> A segunda, 11/05/2020, 21:21, Alex Deucher escreveu:
>>
>>
>>
>> Note there is no loss of functionality here, at least on radeon
>> hardware. It just comes down to which MMU gets used for access to
>> system memory, the AGP MMU on
On Fri, Apr 24, 2020 at 6:26 AM Ricardo Cañuelo
wrote:
>
> This converts the DT binding for the Analogix DP bridge used in
> the Exynos 5 and Rockchip RK3288/RK3399 SoCs to yaml.
>
> Changes from the original binding:
> - phy and phy-names aren't defined as 'required' (rk3399-evb.dts doesn't
>
On Mon, May 11, 2020 at 5:42 PM Alex Deucher wrote:
>
> On Mon, May 11, 2020 at 3:18 AM Paul Menzel wrote:
> >
> > Fix all occurrences with the commands below.
> >
> > $ git grep -l equnce drivers/gpu/ | xargs sed -i 's/equnce/equence/g'
> >
> > Cc: Alex Deucher
> > Cc: Christian König
> >
On Mon, May 11, 2020 at 8:29 AM Daniel Vetter wrote:
>
> On Mon, May 11, 2020 at 5:24 PM Rob Clark wrote:
> >
> > On Mon, May 11, 2020 at 2:36 AM Daniel Vetter
> > wrote:
> > >
> > > I honestly don't exactly understand what's going on here, but the
> > > current code is wrong for sure: It
On Monday, May 11, 2020, 4:27:55 PM, Alex Deucher wrote:
> On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir wrote:
>>
>> On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
>> > Hi guys,
>>
>> > Well let's face it AGP is a total headache to maintain and dead for at
>> > least 10+ years.
>>
On Fri, Apr 24, 2020 at 05:33:44PM +0200, Maxime Ripard wrote:
> The firmware running on the RPi VideoCore can be used to discover and
> change the various clocks running in the BCM2711. Since devices will
> need to use them through the DT, let's add a pretty simple binding.
>
> Cc: Michael
>Is the "| 0" really adding value here?
As far as I can see, it is present in every other config.
___
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Sat, May 09, 2020 at 05:16:12PM -0700, Andrew Morton wrote:
> On Fri, 1 May 2020 15:20:44 -0300 Jason Gunthorpe wrote:
>
> > From: Jason Gunthorpe
> >
> > There is no reason for a user to select this or not directly - it should
> > be selected by drivers that are going to use the feature,
Quoting Douglas Anderson (2020-05-07 14:34:55)
> The ti-sn65dsi86 MIPI DSI to eDP bridge chip has 4 pins on it that can
> be used as GPIOs in a system. Each pin can be configured as input,
> output, or a special function for the bridge chip. These are:
> - GPIO1: SUSPEND Input
> - GPIO2: DSIA
Am 11.05.20 um 22:24 schrieb John Paul Adrian Glaubitz:
> On 5/11/20 10:12 PM, Christian König wrote:
>> I unfortunately only have an x86 Mac to test this on, but as far as I know
>> the Radeon
>> AGP support for PowerPC is disabled for years already because it didn't
>> worked reliable.
>
> I
Add panel binding for NEC NL10276BC13-01C.
Signed-off-by: Maksim Melnikov
---
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
On Mon, May 11, 2020 at 3:03 PM Konrad Dybcio wrote:
>
> >Is the "| 0" really adding value here?
>
> As far as I can see, it is present in every other config.
Ah, I forgot about that.
Nothing to see here.
___
dri-devel mailing list
On Fri, May 08, 2020 at 04:40:09PM +0200, Arnd Bergmann wrote:
> CONFIG_DEVICE_PRIVATE cannot be selected in configurations
> without ZONE_DEVICE:
>
> WARNING: unmet direct dependencies detected for DEVICE_PRIVATE
> Depends on [n]: ZONE_DEVICE [=n]
> Selected by [y]:
> - DRM_NOUVEAU_SVM
A segunda, 11/05/2020, 21:21, Alex Deucher escreveu:
>
>
> Note there is no loss of functionality here, at least on radeon
> hardware. It just comes down to which MMU gets used for access to
> system memory, the AGP MMU on the chipset or the MMU built into the
> GPU. On powerpc hardware, AGP
The NL10276BC13-01C is a 6.5" 1024x768 XGA TFT LCD panel with LVDS interface.
It is used for industrial purposes in devices such as HMI.
Signed-off-by: Maksim Melnikov
---
drivers/gpu/drm/panel/panel-simple.c | 28
1 file changed, 28 insertions(+)
diff --git
发件人："Ruhl, Michael J"
发送日期：2020-05-08 23:45:07
收件人：Bernard Zhao ,Alex Deucher
,"Christian König" ,"David
(ChunMing) Zhou" ,David Airlie ,Daniel
Vetter ,Tom St Denis ,Sam Ravnborg
,Ori Messinger
,"amd-...@lists.freedesktop.org"
,"dri-devel@lists.freedesktop.org"
This patchset adds support for NEC NL10276BC13-01C panel.
Maksim Melnikov (2):
drm/panel-simple: add support for NEC NL10276BC13-01C panel
dt-bindings: display: panel: Add NEC NL10276BC13-01C panel bindings
.../bindings/display/panel/panel-simple.yaml | 2 ++
On Fri, May 1, 2020 at 2:52 PM Konrad Dybcio wrote:
>
> Signed-off-by: Konrad Dybcio
> ---
> drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c | 70
> 1 file changed, 70 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c
>
On Fri, Apr 24, 2020 at 01:26:34PM +0200, Ricardo Cañuelo wrote:
> This converts the DT binding for the Analogix DP bridge used in
> the Exynos 5 and Rockchip RK3288/RK3399 SoCs to yaml.
>
> Changes from the original binding:
> - phy and phy-names aren't defined as 'required' (rk3399-evb.dts
This just limits the BPC for MST connectors to a maximum of 8 from
nv50_mstc_get_modes(), instead of doing so during
nv50_msto_atomic_check(). This doesn't introduce any functional changes
yet (other then userspace now lying about the max bpc, but we can't
support that yet anyway so meh). But,
We'll need the core channel initialized and ready by the time that we
start creating modesetting objects, so that we can call the
NV507D_GET_CAPABILITIES method to make the hardware expose it's
modesetting capabilities for later probing.
So, when loading the driver prepare the core channel from
Currently, the nv50_mstc_mode_valid() function is happy to take any and
all modes, even the ones we can't actually support sometimes like
interlaced modes.
Luckily, the only difference between the mode validation that needs to
be performed for MST vs. SST is that eventually we'll need to check
On Sun, 26 Apr 2020 20:58:55 +0200, Paul Cercueil wrote:
> Convert the ingenic,uart.txt to a new ingenic,uart.yaml file.
>
> A few things were changed in the process:
> - the dmas and dma-names properties are now required.
> - the ingenic,jz4770-uart and ingenic,jz4775-uart compatible strings now
On Wed, May 6, 2020 at 11:32 AM Sam Ravnborg wrote:
>
> Hi Dmitry
>
> On Sat, Apr 18, 2020 at 08:06:58PM +0300, Dmitry Osipenko wrote:
> > In some case, like a DRM display code for example, it's useful to silently
> > check whether port node exists at all in a device-tree before proceeding
> >
On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir wrote:
>
> On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
> > Hi guys,
>
> > Well let's face it AGP is a total headache to maintain and dead for at
> > least 10+ years.
>
> > We have a lot of x86 specific stuff in the architecture
On 5/11/20 10:05 PM, Alex Deucher wrote:
>>> For Nouveau I'm not 100% sure, but from the code it of hand looks like we
>>> can do it similar to Radeon.
>>>
>>> Please comment what you think about this.
>>
>> I would be against such a move as AGP graphics is still used by people
>> running the
We advertise being able to set interlaced modes, so let's actually make
sure to do that. Otherwise, we'll end up hanging the display engine due
to trying to set a mode with timings adjusted for interlacing without
telling the hardware it's actually an interlaced mode.
Signed-off-by: Lyude Paul
Right now, we make the mistake of allowing interlacing on all
connectors. Nvidia hardware does not always support interlacing with DP
though, so we need to make sure that we don't allow interlaced modes to
be set in such situations as otherwise we'll end up accidentally hanging
the display HW.
Currently, nouveau doesn't actually bother to try probing whether or not
it can actually handle interlaced modes over DisplayPort. As a result,
on volta and later we'll end up trying to set an interlaced mode even
when it's not supported and cause the front end for the display engine
to hang.
So,
Hello Dave,
On Monday, May 11, 2020, 4:43:01 PM, Dave Airlie wrote:
> On Tue, 12 May 2020 at 06:28, Alex Deucher wrote:
>>
>> On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir wrote:
>> Note there is no loss of functionality here, at least on radeon
>> hardware. It just comes down to which MMU gets
On Sun, Apr 26, 2020 at 08:58:51PM +0200, Paul Cercueil wrote:
> Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml.
>
> In the process, some compatible strings now require a fallback, as the
> corresponding SoCs are pin-compatible with their fallback variant.
>
> Signed-off-by:
On Mon, May 11, 2020 at 4:02 PM John Paul Adrian Glaubitz
wrote:
>
> Hi Christian!
>
> > Well let's face it AGP is a total headache to maintain and dead for at
> > least 10+ years.
> >
> > We have a lot of x86 specific stuff in the architecture independent
> > graphics memory management
> > to
On Mon, May 11, 2020 at 3:18 AM Paul Menzel wrote:
>
> Fix all occurrences with the commands below.
>
> $ git grep -l equnce drivers/gpu/ | xargs sed -i 's/equnce/equence/g'
>
> Cc: Alex Deucher
> Cc: Christian König
> Cc: David (ChunMing) Zhou
> Cc: amd-...@lists.freedesktop.org
>
On Tue, Apr 28, 2020 at 04:12:21PM +0200, Paul Cercueil wrote:
> This one patch will need a V2, I messed up with the clocks.
Looks fine otherwise.
>
> -Paul
>
>
> Le dim. 26 avril 2020 à 20:58, Paul Cercueil a écrit
> :
> > Convert the ingenic,lcd.txt to a new ingenic,lcd.yaml file.
> >
> >
On Mon, May 11, 2020 at 6:42 PM Lyude Paul wrote:
> diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
> b/drivers/gpu/drm/nouveau/nouveau_connector.c
> index 43bcbb6d73c4..6dae00da5d7e 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_connector.c
> +++
https://bugzilla.kernel.org/show_bug.cgi?id=201505
Jan Ziak (http://atom-symbol.net) (0xe2.0x9a.0...@gmail.com) changed:
What|Removed |Added
Status|NEW
On 5/11/20 10:12 PM, Christian König wrote:
> I unfortunately only have an x86 Mac to test this on, but as far as I know
> the Radeon
> AGP support for PowerPC is disabled for years already because it didn't
> worked reliable.
I have a current Debian unstable running on an iBook G4 with Radeon
On Tue, 12 May 2020 at 06:28, Alex Deucher wrote:
>
> On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir wrote:
> >
> > On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
> > > Hi guys,
> >
> > > Well let's face it AGP is a total headache to maintain and dead for at
> > > least 10+ years.
>
Applied. thanks!
Alex
On Sat, May 9, 2020 at 5:05 AM Jason Yan wrote:
>
> Fix the following gcc warning:
>
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c:65:18: warning: ‘crtc_offsets’
> defined but not used [-Wunused-const-variable=]
> static const u32 crtc_offsets[6] =
>
On Sat, 25 Apr 2020 17:40:37 +0200, Johan Jonker wrote:
> A test with the command below gives this error:
>
> arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: gpu@ff40:
> '#cooling-cells', 'power-domains'
> do not match any of the regexes: 'pinctrl-[0-9]+'
>
> With the conversion to yaml it
On Sun, Apr 26, 2020 at 08:58:52PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml.
>
> The ingenic,jz4725b-nemc compatible string was added in the process,
> with a fallback to ingenic,jz4740-nemc.
>
> Signed-off-by: Paul Cercueil
> ---
>
On Mon, Apr 27, 2020 at 03:52:44PM +0200, Enric Balletbo i Serra wrote:
> Hi Ricardo,
>
> Thank you for your patch.
>
> On 27/4/20 12:09, Ricardo Cañuelo wrote:
> > This converts the Analogix ANX7814 bridge DT binding to yaml. Port
> > definitions and descriptions were expanded, apart from that
I'm not exactly an expert on this, but looks alright to me.
Acked-by: Roland Scheidegger
Am 05.05.20 um 10:46 schrieb Marek Szyprowski:
> The Documentation/DMA-API-HOWTO.txt states that dma_map_sg returns the
> numer of the created entries in the DMA address space. However the
> subsequent calls
On Wed, Apr 22, 2020 at 11:38:14AM +0530, Krishna Manikandan wrote:
> MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema
> for the device tree bindings for the same.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
>
On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
> Hi guys,
> Well let's face it AGP is a total headache to maintain and dead for at least
> 10+ years.
> We have a lot of x86 specific stuff in the architecture independent
> graphics memory management to get the caching right,
On Mon, 11 May 2020 at 21:43, Dave Airlie wrote:
>
> On Tue, 12 May 2020 at 06:28, Alex Deucher wrote:
> >
> > On Mon, May 11, 2020 at 4:22 PM Al Dunsmuir
> > wrote:
> > >
> > > On Monday, May 11, 2020, 1:17:19 PM, "Christian König" wrote:
> > > > Hi guys,
> > >
> > > > Well let's face it AGP
On Fri, Apr 24, 2020 at 05:35:11PM +0200, Maxime Ripard wrote:
> The HDMI controllers found in the BCM2711 SoC need some adjustments to the
> bindings, especially since the registers have been shuffled around in more
> register ranges.
>
> Cc: Rob Herring
> Cc: devicet...@vger.kernel.org
>
Hi Alex!
On 5/11/20 10:46 PM, Alex Deucher wrote:
>>> Note there is no loss of functionality here, at least on radeon
>>> hardware. It just comes down to which MMU gets used for access to
>>> system memory, the AGP MMU on the chipset or the MMU built into the
>>> GPU. On powerpc hardware, AGP
On Sun, Apr 26, 2020 at 08:58:53PM +0200, Paul Cercueil wrote:
> Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml.
>
> Signed-off-by: Paul Cercueil
> ---
> .../bindings/mtd/ingenic,jz4780-nand.txt | 92
> .../devicetree/bindings/mtd/ingenic,nand.yaml | 133
On Mon, May 11, 2020 at 4:41 PM John Paul Adrian Glaubitz
wrote:
>
> On 5/11/20 10:05 PM, Alex Deucher wrote:
> >>> For Nouveau I'm not 100% sure, but from the code it of hand looks like we
> >>> can do it similar to Radeon.
> >>>
> >>> Please comment what you think about this.
> >>
> >> I would
https://bugzilla.kernel.org/show_bug.cgi?id=207693
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
On Sun, 26 Apr 2020 20:58:50 +0200, Paul Cercueil wrote:
> Convert the ingenic,intc.txt doc file to ingenic,intc.yaml.
>
> Some compatible strings now require a fallback, as the controller
> generally works the same across the SoCs families.
>
> Signed-off-by: Paul Cercueil
> ---
>
On Sun, 26 Apr 2020 20:58:49 +0200, Paul Cercueil wrote:
> Convert the ingenic,cgu.txt doc file to ingenic,cgu.yaml.
>
> The binding documentation has been updated as well. The node can have a
> child node that corresponds to the USB PHY, which happens to be present
> in the middle of the CGU
On Sun, 26 Apr 2020 20:58:54 +0200, Paul Cercueil wrote:
> Convert the i2c-jz4780.txt file to ingenic,i2c.yaml.
>
> Two things were changed in the process:
> - the clock-frequency property can now only be set to the two values
> that can be set by the hardware;
> - the dmas and dma-names
On Mon, May 11, 2020 at 04:59:11PM +0200, Ricardo Cañuelo wrote:
> Hi Rob,
>
> What's your opinion on this?
>
> Some context: It's about bindings that define signed integer properties
> with range checks that go below and above zero. The schema checker fails
> because, apparently, it interprets
On Tue, 12 May 2020 at 09:06, Ilia Mirkin wrote:
>
> On Mon, May 11, 2020 at 6:42 PM Lyude Paul wrote:
> > diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c
> > b/drivers/gpu/drm/nouveau/nouveau_connector.c
> > index 43bcbb6d73c4..6dae00da5d7e 100644
> > ---
On Mon, 11 May 2020 at 19:37, Oded Gabbay wrote:
>
> On Mon, May 11, 2020 at 12:11 PM Daniel Vetter wrote:
> >
> > It's the default.
> Thanks for catching that.
>
> >
> > Also so much for "we're not going to tell the graphics people how to
> > review their code", dma_fence is a pretty core piece
https://bugzilla.kernel.org/show_bug.cgi?id=207665
c3bac...@protonmail.com changed:
What|Removed |Added
Status|NEW |RESOLVED
Am 09.05.20 um 20:51 schrieb Andrey Grodzovsky:
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4
3 files changed, 17
Only v3.3-v5.0 have a different CS0 layout.
v3.3- controllers use the same layout for every CS.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
On 5/10/20 8:47 PM, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
> produced this warning:
>
> WARNING: modpost: missing MODULE_LICENSE() in
> drivers/gpu/drm/panel/panel-visionox-rm69299.o
>
> Introduced by commit
>
>
'exynos_dsi_parse_dt()' takes a reference to 'dsi->in_bridge_node'.
This must be released in the error handling path.
This patch is similar to commit 70505c2ef94b ("drm/exynos: dsi: Remove bridge
node reference in removal")
which fixed the issue in the remove function.
Signed-off-by: Christophe
Add a simple cooling map for the GPU.
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 22
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index
Some OPP tables specify voltage for each frequency. Devfreq can
handle these regulators but they should be get only 1 time to avoid
issue and know who is in charge.
If OPP table is probe don't init regulator.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 19
Signed-off-by: Clément Péron
---
arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
index 3f7ceeb1a767..14257f7476b8 100644
This change adds MDP5 configuration for MSM8x36-based SoCs,
like MSM8936, 8939 and their APQ variants.
The configuration is based on MSM8916's, but adds some notable
features, like ad and pp blocks, along with some register
changes.
changes since v1:
- add an ad block
- add a second mixer @
在 2020/5/9 14:36, Randy Dunlap 写道:
On 5/8/20 11:30 PM, Jason Yan wrote:
Fix the following build warning:
WARNING: modpost: missing MODULE_LICENSE() in
drivers/gpu/drm/panel/panel-visionox-rm69299.o
see include/linux/module.h for more information
Signed-off-by: Jason Yan
---
Add an Operating Performance Points table for the GPU to
enable Dynamic Voltage & Frequency Scaling on the H6.
The voltage range is set with minival voltage set to the target
and the maximal voltage set to 1.2V. This allow DVFS framework to
work properly on board with fixed regulator.
Introduce a boolean to know if opp table has been added.
With this, we can call panfrost_devfreq_fini() in case of error
and release what has been initialised.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 25 -
Introduce a proper panfrost_devfreq to deal with devfreq variables.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 76 -
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 20 +-
drivers/gpu/drm/panfrost/panfrost_device.h | 11 +--
Devfreq cooling device framework is used in Panfrost
to throttle GPU in order to regulate its temperature.
Enable this driver for ARM64 SoC.
Signed-off-by: Clément Péron
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig
Hello,
syzbot found the following crash on:
HEAD commit:e99332e7 gcc-10: mark more functions __init to avoid secti..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13de23a210
kernel config: https://syzkaller.appspot.com/x/.config?x=a45301b663dae85a
On 5/10/2020 8:14 AM, Álvaro Fernández Rojas wrote:
> Tested on Netgear DGND3700v2 (BCM6362 with v2.2 controller).
>
> Signed-off-by: Álvaro Fernández Rojas
Can you fix a couple of things for your future submissions:
- for patch count > 1, please provide a cover letter introducing your
Some SoCs have several clocks defined and the OPP core
needs to know the exact name of the clk to use.
Set the clock name to "core".
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 13 +
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 1 +
2 files
Jian-Hong Pan 於 2020年5月8日 週五 下午2:20寫道：
>
> Maxime Ripard 於 2020年5月8日 週五 上午1:22寫道：
> >
> > On Mon, May 04, 2020 at 02:35:08PM +0800, Jian-Hong Pan wrote:
> > > Maxime Ripard 於 2020年4月29日 週三 上午12:21寫道：
> > > >
> > > > Hi,
> > > >
> > > > On Mon, Apr 27, 2020 at 03:23:42PM +0800, Jian-Hong Pan
These registers are also used on v3.3.
Signed-off-by: Álvaro Fernández Rojas
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index
Don't include not required headers and sort them.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c
b/drivers/gpu/drm/panfrost/panfrost_devfreq.c
Hi Richard.
On Sat, May 09, 2020 at 01:18:34PM +0200, s...@48.io wrote:
> From: Sean Cross
>
> The Innolux N133HSE panel is a 13.3" 1920x1080 panel that contains an
> integrated backlight, and connects via eDP.
>
> It is used in the Kosagi Novena.
Thanks for the patch.
>
> Signed-off-by:
On Sat, 09 May 2020, Noralf Trønnes wrote:
> Add a way to lookup a backlight device based on its name.
> Will be used by a USB display gadget getting the name from configfs.
>
> Cc: Lee Jones
> Cc: Daniel Thompson
> Cc: Jingoo Han
> Reviewed-by: Sam Ravnborg
> Reviewed-by: Daniel Thompson
>
This converts the lms283gf05 backlight driver to use GPIO
descriptors and switches the single PXA Palm Z2 device
over to defining these.
Since the platform data was only used to convey GPIO
information we can delete the platform data header.
Notice that we define the proper active low semantics
While this looks rather nice it is most likely the wrong approach since
it doesn't handles other concurrent evictions.
It would most likely be better to add a check calling
drm_dev_is_unplugged() into amdgpu_bo_move().
Regards,
Christian.
Am 09.05.20 um 20:51 schrieb Andrey Grodzovsky:
Am 09.05.20 um 20:51 schrieb Andrey Grodzovsky:
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/ttm/ttm_bo.c| 22 +-
include/drm/ttm/ttm_bo_driver.h | 2 ++
2 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c
A commit message would be nice, apart from that the patch looks clean to me.
But question for Daniel and others: Is that in general the right approach?
It can happen that device removal is delayed indefinitely if userspace
doesn't close the file descriptors.
Regards,
Christian.
Am 09.05.20
Instead of expecting an error from dev_pm_opp_of_add_table()
do a simple device_property_present() check.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git
From: Richard Marko
Contains updated patches I've received from Marek with the following
changes:
- yaml docs migration
- fixed Fabios email
- panel commit split into two according to checkpatch request
- added connector for panel
Last review also requested more details for panel like timings
On Sat, 9 May 2020 at 18:28, Clément Péron wrote:
>
> Hi Steven,
>
> On Thu, 7 May 2020 at 16:30, Steven Price wrote:
> >
> > On 02/05/2020 23:07, Clément Péron wrote:
> > > Hi Steven,
> > >
> > > On Tue, 14 Apr 2020 at 15:10, Steven Price wrote:
> > >>
> > >> Hi Clément,
> > >>
> > >> On
From: Marek Vasut
Add driver for the ITE IT6251 LVDS-to-eDP bridge.
Signed-off-by: Marek Vasut
Signed-off-by: Richard Marko
Cc: Daniel Vetter
Cc: Sean Cross
To: dri-devel@lists.freedesktop.org
---
drivers/gpu/drm/bridge/Kconfig | 12 +
drivers/gpu/drm/bridge/Makefile | 1 +
From: Richard Marko
Contains updated patches I've received from Marek with the following
changes:
- yaml docs migration
- extended documentation
Tested on a Kosagi Novena laptop with imx6 display controller.
Based on v5.7-rc2, applies to drm-misc-next 5e6ed29d72d2
CC: Marek Vasut
Cc: Sean
From: Sean Cross
The Innolux N133HSE panel is a 13.3" 1920x1080 panel that contains an
integrated backlight, and connects via eDP.
It is used in the Kosagi Novena.
Signed-off-by: Sean Cross
Signed-off-by: Richard Marko
Cc: Shawn Guo
Cc: Fabio Estevam
Cc: Thierry Reding
To:
Sam Ravnborg 于2020年5月10日周日 上午4:06写道：
>
> Hi Dillon.
>
> On Fri, May 08, 2020 at 06:13:43PM +0800, dillon min wrote:
> > Hi Sam,
> >
> > Thanks for your comments, i will rework this panel driver after l3gd20
> > patch submission.
> >
> > Sam Ravnborg 于2020年5月8日周五 下午5:02写道：
> >
> > > Hi Dillon.
Convert busy_count to a simple int protected by spinlock.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 43 +++--
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 10 -
2 files changed, 41 insertions(+), 12 deletions(-)
diff --git
We will later introduce regulators managed by OPP.
Only alloc regulators when it's needed. This also help use
to release the regulators only when they are allocated.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_device.c | 14 +-
This use devfreq variable that will be lock with spinlock in future
patches. We should either introduce a function to access this one
but as devfreq is optional let's just remove it.
Signed-off-by: Clément Péron
---
drivers/gpu/drm/panfrost/panfrost_job.c | 4
1 file changed, 4
Fix all occurrences with the commands below.
$ git grep -l equnce drivers/gpu/ | xargs sed -i 's/equnce/equence/g'
Cc: Alex Deucher
Cc: Christian König
Cc: David (ChunMing) Zhou
Cc: amd-...@lists.freedesktop.org
Signed-off-by: Paul Menzel
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4
S5PV210 can be trivially supported by this driver. Only one of
its FIMC devices (#2) supports the same scaling values as Exynos4, and
it is marked by mainscaler-ext in the DTS (as it is for all of the
Exynos4 devices). It's limits are the same as that of id's 0-2 of
Exynos4 so we don't even need
Tested on Netgear DGND3700v2 (BCM6362 with v2.2 controller).
Signed-off-by: Álvaro Fernández Rojas
---
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 76 +---
1 file changed, 67 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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