On Tue, 2021-03-30 at 11:54 +0200, Robert Foss wrote:
> Hey Liu,
>
> checkpatch --strict lists some nit and a warning. With those fixed
> feel free to add my r-b.
>
> On Wed, 17 Mar 2021 at 04:57, Liu Ying wrote:
> > This patch adds a drm bridge driver for i.MX8qxp LVDS display bridge(LDB)
> >
On Tue, Mar 30, 2021 at 08:04:38PM -0700, Vivek Kasireddy wrote:
> If support for Blob resources is available, then dumb BOs created
> by the driver can be considered as guest Blobs. And, for guest
> Blobs, there is no need to do any transfers or flushes
No. VIRTGPU_BLOB_FLAG_USE_SHAREABLE means
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> Let's make the remove() function strictly the reverse of the probe()
> function so it's easier to reason about.
>
> NOTES:
> - The MIPI calls probably belong in detach() but will be moved in a
>separate patch.
The mipi is incorrectly
Hi Douglas,
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> The drm_bridge_chain_pre_enable() is not the proper opposite of
> drm_bridge_chain_post_disable(). It continues along the chain to
> _before_ the starting bridge. Let's fix that.
>
> Fixes: 05193dc38197 ("drm/bridge: Make the bridge
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> If we just leave the detect() function as NULL then the upper layers
> assume we're always connected. There's no reason for a stub.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Andrzej Hajda
Regards
Andrzej
> ---
>
> (no changes since
Hi Robert,
On Tue, 2021-03-30 at 11:42 +0200, Robert Foss wrote:
> Hey Liu,
>
> checkpatch --strict had some complaints, with those fixed feel free to
> add my r-b.
>
> Reviewed-by: Robert Foss
Thanks for your review.
In the next version, I'll also fix the complaints from
'checkpatch.pl
https://bugzilla.kernel.org/show_bug.cgi?id=212499
--- Comment #1 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 296157
--> https://bugzilla.kernel.org/attachment.cgi?id=296157=edit
kernel .config (kernel 5.12-rc5, A10-9700E)
--
You may reply to this email to add a comment.
You
This patch adds support for Newhaven's NHD-1.8-128160EF display, featuring
an Ilitek ILI9163 controller.
Signed-off-by: Daniel Mack
Acked-by: Daniel Vetter
---
drivers/gpu/drm/tiny/Kconfig | 13 ++
drivers/gpu/drm/tiny/Makefile | 1 +
drivers/gpu/drm/tiny/ili9163.c | 224
This adds documentation for a new ILI9163 based, SPI connected display.
Signed-off-by: Daniel Mack
---
.../display/panel/ilitek,ili9163.yaml | 69 +++
1 file changed, 69 insertions(+)
create mode 100644
Maxime Ripard 于2021年3月24日周三 下午6:53写道：
> Hi
>
> On Mon, Feb 22, 2021 at 09:28:18PM +0800, Kevin Tang wrote:
> > Adds drm support for the Unisoc's display subsystem.
> >
> > This is drm kms driver, this driver provides support for the
> > application framework in Android, Yocto and more.
> >
> >
This is v3 of the series.
Changelog:
v2 -> v3:
* Turn Documentation into yaml format
v3 -> v4:
* Fix reference error in yaml file
v4 -> v5:
* More yaml file documentation fixes
v5 -> v6:
* More yaml file documentation fixes
v6 -> v7:
* Fix ordering of
Some issues where found during static analysis of this driver.
Reported-by: Dan Carpenter
Suggested-by: Dan Carpenter
Signed-off-by: Adrien Grassein
---
drivers/gpu/drm/bridge/lontium-lt8912b.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git
Hi,
This patch fixes issues found by a static checker.
Thanks,
Adrien Grassein (1):
drm/bridge: lt8912b: Fix issues found during static analysis
drivers/gpu/drm/bridge/lontium-lt8912b.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
--
2.25.1
From: Tvrtko Ursulin
RC6 support cannot be simply established by looking at the static device
HAS_RC6() flag. There are cases which disable RC6 at driver load time so
use the status of those check when deciding whether to enumerate the rc6
counter.
Signed-off-by: Tvrtko Ursulin
Reported-by:
This patch adds bindings for i.MX8qm/qxp Control and Status Registers module.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v6->v7:
* Add Rob's R-b tag.
v5->v6:
* Drop 'select' schema. (Rob)
v4->v5:
* Newly introduced in v5. (Rob)
.../devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml |
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v6->v7:
* No change.
v5->v6:
* Add Rob's R-b tag.
v4->v5:
* No change.
v3->v4:
* Add 'fsl,sc-resource' property. (Rob)
v2->v3:
* Drop 'fsl,syscon' property. (Rob)
* Mention
Hi,
This is the v7 series to add some DRM bridge drivers support
for i.MX8qm/qxp SoCs.
The bridges may chain one by one to form display pipes to support
LVDS displays. The relevant display controller is DPU embedded in
i.MX8qm/qxp SoCs.
The DPU KMS driver can be found at:
This patch adds RGB666_1X30_CPADLO, RGB888_1X30_CPADLO, RGB666_1X36_CPADLO
and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp pixel combiner.
The RGB pixels with padding low per component are transmitted on a 30-bit
input bus(10-bit per component) from a display controller or a 36-bit
output
This patch adds a drm bridge driver for i.MX8qm/qxp pixel combiner.
The pixel combiner takes two output streams from a single display
controller and manipulates the two streams to support a number
of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured
as either one screen, two
This patch adds bindings for i.MX8qm/qxp display pixel link.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* Add Rob's R-b tag.
v1->v2:
* Use graph schema. (Laurent)
* Require all four pixel
This patch adds a drm bridge driver for i.MX8qm/qxp display pixel link.
The pixel link forms a standard asynchronous linkage between
pixel sources(display controller or camera module) and pixel
consumers(imaging or displays). It consists of two distinct
functions, a pixel transfer function and a
This patch adds bindings for i.MX8qm/qxp pixel combiner.
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* Add Rob's R-b tag.
v1->v2:
* Use graph schema. (Laurent)
* Use enum instead of oneOf +
This patch adds documentations for RGB666_1X30_CPADLO, RGB888_1X30_CPADLO,
RGB666_1X36_CPADLO and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp
pixel combiner. The RGB pixels with padding low per component are
transmitted on a 30-bit input bus(10-bit per component) from a display
controller
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> The clock framework makes it simple to deal with an optional clock.
> You can call clk_get_optional() and if the clock isn't specified it'll
> just return NULL without complaint. It's valid to pass NULL to
> enable/disable/prepare/unprepare.
On Wed, Mar 31, 2021 at 11:12:38AM +0300, Dan Carpenter wrote:
>644 of_node_put(endpoint);
>645
>646 lt->host_node = of_graph_get_remote_node(dev->of_node, 0, -1);
>647 if (!lt->host_node) {
>648 dev_err(lt->dev, "%s: Failed to get
https://bugzilla.kernel.org/show_bug.cgi?id=212499
Bug ID: 212499
Summary: nouveau locking issue - WARNING: possible circular
locking dependency detected
Product: Drivers
Version: 2.5
Kernel Version: 5.12-rc5
Hardware:
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> A random comment inside a function had "/**" in front of it. That
> doesn't make sense. Remove.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Andrzej Hajda
Regards
Andrzej
> ---
>
> (no changes since v1)
>
>
On Wed, Mar 31, 2021 at 11:17:20AM +0200, Adrien Grassein wrote:
> Hello,
>
> thanks for your review.
>
> I will publish a patch soon.
>
> What tag should I add to my commit to mention that you find bugs
> (Suggested-by for example)?
If there is a bug fix then please could you use Reported-by?
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> The register() / attach() for MIPI happen in the bridge's
> attach(). That means that the inverse belongs in the bridge's
> detach().
As I commented in previous patch, it would be better to fix mipi/bridge
registration order in host and this
On Fri, 26 Mar 2021, Maxime Ripard wrote:
> Hi,
>
> On Fri, Mar 26, 2021 at 11:47:58AM +0200, Jani Nikula wrote:
>> On Tue, 23 Mar 2021, Ankit Nautiyal wrote:
>> > Currently the FRL training mode (Concurrent, Sequential) and
>> > training type (Normal, Extended) are not defined properly and
>> >
Hi Robert,
On Tue, 2021-03-30 at 11:59 +0200, Robert Foss wrote:
> Hey Liu,
>
> checkpatch --strict lists some nits and a warning. I think the kconfig
> warning can be ignored. With the rest fixed, feel free to add my r-b.
>
> Reviewed-by: Robert Foss
Thanks for your review.
Will fix those
Hi Maxime,
Maxime Ripard 于2021年3月24日周三 下午7:10写道：
> Hi,
>
> On Mon, Feb 22, 2021 at 09:28:20PM +0800, Kevin Tang wrote:
> > Adds DPU(Display Processor Unit) support for the Unisoc's display
> subsystem.
> > It's support multi planes, scaler, rotation, PQ(Picture Quality) and
> more.
> >
> > Cc:
Le mer. 31 mars 2021 à 12:29, Dan Carpenter a écrit :
>
> On Wed, Mar 31, 2021 at 11:38:22AM +0200, Adrien Grassein wrote:
> > Some issues where found during static analysis of this driver.
> >
> > Reported-by: Dan Carpenter
> > Suggested-by: Dan Carpenter
> > Signed-off-by: Adrien Grassein
>
Hi,
This patch fixes issues found by a static checker.
Thanks,
Adrien Grassein (1):
drm/bridge: lt8912b: Fix issues found during static analysis
drivers/gpu/drm/bridge/lontium-lt8912b.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
--
2.25.1
Some issues where found during static analysis of this driver.
Reported-by: Dan Carpenter
Suggested-by: Dan Carpenter
Signed-off-by: Adrien Grassein
---
drivers/gpu/drm/bridge/lontium-lt8912b.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git
Hi Robert,
On Tue, 2021-03-30 at 11:46 +0200, Robert Foss wrote:
> Hey Liu,
>
> checkpatch --strict is listing some nits for this patch, with those
> fixed feel free to add my r-b.
>
> Reviewed-by: Robert Foss
Thanks for your review.
Will fix those nits in the next version.
Liu Ying
Hi Robert,
On Tue, 2021-03-30 at 12:05 +0200, Robert Foss wrote:
> Hey Liu,
>
> checkpatch --strict lists some nits for this patch with those and the
> below warning fixed, feel free to add my r-b.
Thanks for your review.
Will fix those nits in the next version.
Regarding the warning you
Hi Geert,
On Tue, 30 Mar 2021 09:36:57 +0200 Geert Uytterhoeven
wrote:
>
> On Mon, Mar 29, 2021 at 4:16 AM Stephen Rothwell
> wrote:
> > Today's linux-next merge of the drm tree got a conflict in:
> >
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> >
> > between commits:
> >
> >
This patch adds a drm bridge driver for i.MX8qxp pixel link to display
pixel interface(PXL2DPI). The PXL2DPI interfaces the pixel link 36-bit
data output and the DSI controller’s MIPI-DPI 24-bit data input, and
inputs of LVDS Display Bridge(LDB) module used in LVDS mode, to remap
the pixel color
This patch adds a drm bridge driver for i.MX8qm LVDS display bridge(LDB)
which is officially named as pixel mapper. The LDB has two channels.
Each of them supports up to 30bpp parallel input color format and can
map the input to VESA or JEIDA standards. The two channels can be used
Add myself as the maintainer of DRM bridge drivers for i.MX SoCs.
Reviewed-by: Robert Foss
Signed-off-by: Liu Ying
---
v6->v7:
* Add Robert's R-b tag.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* No change.
v2->v3:
* No change.
v1->v2:
* No change.
MAINTAINERS | 10 ++
1
This patch adds a drm bridge driver for i.MX8qxp LVDS display bridge(LDB)
which is officially named as pixel mapper. The LDB has two channels.
Each of them supports up to 24bpp parallel input color format and can map
the input to VESA or JEIDA standards. The two channels cannot be used
This patch adds a helper to support LDB drm bridge drivers for
i.MX SoCs. Helper functions supported by this helper should
implement common logics for all LDB modules embedded in i.MX SoCs.
Tested-by: Marcel Ziswiler # Colibri iMX8X,
LT170410-2WHC, LP156WF1
Reviewed-by: Robert Foss
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB).
Reviewed-by: Rob Herring
Signed-off-by: Liu Ying
---
v6->v7:
* No change.
v5->v6:
* No change.
v4->v5:
* No change.
v3->v4:
* Add Rob's R-b tag.
v2->v3:
* Drop 'fsl,syscon' property. (Rob)
* Mention the CSR module controls
Hi
Am 31.03.21 um 08:56 schrieb Kuo-Hsiang Chou:
Message-ID: <20201228030823.294147-1-kuohsiang_c...@aspeedtech.com>
-Original Message-
From: Thomas Zimmermann [mailto:tzimmerm...@suse.de]
Sent: Monday, March 29, 2021 5:17 PM
To: Kuo-Hsiang Chou ;
dri-devel@lists.freedesktop.org;
https://bugzilla.kernel.org/show_bug.cgi?id=211425
--- Comment #15 from Andreas (icedragon...@web.de) ---
I setup the automatic power management for the GPU/display down to 3 minutes.
After the 3 minutes the desktop manager blanks the display. I pressed a key to
wake up, but the monitor stays
Hello,
thanks for your review.
I will publish a patch soon.
What tag should I add to my commit to mention that you find bugs
(Suggested-by for example)?
Thanks;
Le mer. 31 mars 2021 à 10:14, Dan Carpenter a écrit :
>
> On Wed, Mar 31, 2021 at 11:12:38AM +0300, Dan Carpenter wrote:
> >644
Hi Maxime,
Maxime Ripard 于2021年3月24日周三 下午7:13写道：
> On Mon, Feb 22, 2021 at 09:28:21PM +0800, Kevin Tang wrote:
> > From: Kevin Tang
> >
> > Adds MIPI DSI Controller
> > support for Unisoc's display subsystem.
> >
> > Cc: Orson Zhai
> > Cc: Chunyan Zhang
> > Signed-off-by: Kevin Tang
> >
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> We prepared the panel in pre_enable() so we should unprepare it in
> post_disable() to match.
>
> This becomes important once we start using pre_enable() and
> post_disable() to make sure things are powered on (and then off again)
> when
On Thu, 25 Mar 2021, Jani Nikula wrote:
> On Wed, 24 Mar 2021, Anshuman Gupta wrote:
>> HDCP DP 2.2 errata is part of HDCP DP 2.3 specs
>> as well.
>>
>> Anshuman Gupta (2):
>> drm/i915/hdcp: Add DP HDCP2.2 timeout to read entire msg
>> drm/hdcp: DP HDCP2.2 errata LC_Send_L_Prime=16
>>
>>
Message-ID: <20201228030823.294147-1-kuohsiang_c...@aspeedtech.com>
-Original Message-
From: Thomas Zimmermann [mailto:tzimmerm...@suse.de]
Sent: Monday, March 29, 2021 5:17 PM
To: Kuo-Hsiang Chou ;
dri-devel@lists.freedesktop.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH V3]
Le mer. 31 mars 2021 à 11:27, Dan Carpenter a écrit :
>
> On Wed, Mar 31, 2021 at 11:17:20AM +0200, Adrien Grassein wrote:
> > Hello,
> >
> > thanks for your review.
> >
> > I will publish a patch soon.
> >
> > What tag should I add to my commit to mention that you find bugs
> > (Suggested-by for
On Wed, Mar 31, 2021 at 11:38:22AM +0200, Adrien Grassein wrote:
> Some issues where found during static analysis of this driver.
>
> Reported-by: Dan Carpenter
> Suggested-by: Dan Carpenter
> Signed-off-by: Adrien Grassein
> ---
> drivers/gpu/drm/bridge/lontium-lt8912b.c | 20
Hi,
> -#define MAX_INLINE_CMD_SIZE 96
> +#define MAX_INLINE_CMD_SIZE 112
Separate patch please.
> --- a/include/uapi/linux/virtio_gpu.h
> +++ b/include/uapi/linux/virtio_gpu.h
> @@ -409,6 +409,7 @@ struct virtio_gpu_set_scanout_blob {
> __le32 width;
> __le32 height;
>
Hello Adrien Grassein,
The patch 30e2ae943c26: "drm/bridge: Introduce LT8912B DSI to HDMI
bridge" from Mar 26, 2021, leads to the following static checker
warning:
drivers/gpu/drm/bridge/lontium-lt8912b.c:638 lt8912_parse_dt()
warn: 'endpoint' isn't an ERR_PTR
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> As of commit 5186421cbfe2 ("drm: Introduce epoch counter to
> drm_connector") the drm_get_edid() function calls
> drm_connector_update_edid_property() for us. There's no reason for us
> to call it again.
>
> Signed-off-by: Douglas Anderson
W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> Now that we have the patch ("drm/edid: Use the cached EDID in
> drm_get_edid() if eDP") we no longer need to maintain our own
> cache. Drop this code.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Andrzej Hajda
Regards
Andrzej
> ---
>
>
https://bugzilla.kernel.org/show_bug.cgi?id=211501
Jan Klos (honza.k...@gmail.com) changed:
What|Removed |Added
CC||honza.k...@gmail.com
Drop duplicate fields pdev and id from dsi_pll_Nnm instances. Reuse
those fields from the provided msm_dsi_phy.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c| 72 +--
The src_truthtable config is not used for some of phys, which use other
means of configuring the master/slave usecases. Inline this function
with the goal of removing src_pll_id argument in the next commit.
Signed-off-by: Dmitry Baryshkov
Tested-by: Stephen Boyd # on sc7180 lazor
---
Use devm_of_clk_add_hw_provider() to register provided clocks. This
allows dropping the remove function alltogether.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 22 +-
1
Add devm_clk_hw_register_divider() - devres version of
clk_hw_register_divider().
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Acked-by: Stephen Boyd
---
include/linux/clk-provider.h | 17 +
1 file changed, 17 insertions(+)
diff --git
Restructure MSM DSI PHY drivers. What started as an attempt to grok the
overcomplicated PHY drivers, has lead up to the idea of merging PHY and
PLL code, reducing abstractions, code duplication, dropping dead code,
etc.
The patches were mainly tested on RB5 (sm8250, 7nm) and DB410c (apq8016,
Hi,
This patch fixes issues found by a static checker.
Thanks,
Adrien Grassein (1):
drm/bridge: lt8912b: Fix issues found during static analysis
drivers/gpu/drm/bridge/lontium-lt8912b.c | 27 +++-
1 file changed, 17 insertions(+), 10 deletions(-)
--
2.25.1
Some issues where found during static analysis of this driver.
Reported-by: Dan Carpenter
Suggested-by: Dan Carpenter
Signed-off-by: Adrien Grassein
---
drivers/gpu/drm/bridge/lontium-lt8912b.c | 27 +++-
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git
On Tue, Mar 30, 2021 at 05:28:19PM +0100, Robin Murphy wrote:
> On 2021-03-30 14:58, Will Deacon wrote:
> > On Tue, Mar 30, 2021 at 02:19:38PM +0100, Robin Murphy wrote:
> > > On 2021-03-30 14:11, Will Deacon wrote:
> > > > On Tue, Mar 16, 2021 at 04:38:22PM +0100, Christoph Hellwig wrote:
> > > >
Le mer. 31 mars 2021 à 13:36, Dan Carpenter a écrit :
>
> On Wed, Mar 31, 2021 at 01:21:37PM +0200, Adrien Grassein wrote:
> > - lt->data_lanes = of_property_count_u32_elems(endpoint, "data-lanes");
> > + data_lanes = of_property_count_u32_elems(endpoint, "data-lanes");
> >
Am 31.03.21 um 14:25 schrieb Rodrigo Siqueira:
DC invokes DC_FPU_START/END in multiple parts of the code; this can
create a situation where we invoke this FPU operation in a nested way.
For avoiding this situation, this commit adds a mechanism where
dc_fpu_begin/end manages the access to
On Wed, 31 Mar 2021 14:33:18 +0800, Liu Ying wrote:
> This patch adds bindings for i.MX8qm/qxp Control and Status Registers module.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Liu Ying
> ---
> v6->v7:
> * Add Rob's R-b tag.
>
> v5->v6:
> * Drop 'select' schema. (Rob)
>
> v4->v5:
> * Newly
Hello,
On 10/02/2021 03:52, Jordan Crouse wrote:
Most a6xx targets have security issues that were fixed with new versions
of the microcode(s). Make sure that we are booting with a safe version of
the microcode for the target and print a message and error if not.
v2: Add more informative error
Hi,
On Wed, Mar 31, 2021 at 3:12 AM Andrzej Hajda wrote:
>
>
> W dniu 30.03.2021 o 04:53, Douglas Anderson pisze:
> > Now that we have the patch ("drm/edid: Use the cached EDID in
> > drm_get_edid() if eDP") we no longer need to maintain our own
> > cache. Drop this code.
> >
> > Signed-off-by:
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 3 +++
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 6 --
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 6 --
The only PLL using multiple enable sequences is the 28nm PLL, which just
does the single step in the loop. Push that support back into the PLL
code.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
DSI PHY init callback would either map dsi_phy_regulator or dsi_phy_lane
depending on the PHY type. Replace those callbacks with configuration
options governing mapping those regions.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
Move all PLL-related callbacks into struct msm_dsi_phy_cfg. This limits
the amount of data in the struct msm_dsi_pll.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/dsi.h | 6 --
Use devres-enabled version of clock registration functions. This lets us
remove dsi_pll destroy callbacks completely.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/dsi.h | 4 -
These drivers do not use vco_delay variable, so drop it from all of
them.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 3 ---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 4
msm_dsi_pll_set_usecase() function is not used outside of individual DSI
PHY drivers, so drop it in favour of calling the the respective
set_usecase functions directly.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
Add devm_clk_hw_register_mux() - devres-managed version of
clk_hw_register_mux().
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Acked-by: Stephen Boyd
---
drivers/clk/clk-mux.c| 35 +++
include/linux/clk-provider.h | 13 +
2
With the current upstream driver the msm_dsi_phy_type enum does not make
much sense: all DSI PHYs are probed using the dt bindings, the phy type
is not passed between drivers. Use quirks in phy individual PHY drivers
to differentiate minor harware differences and drop the enum.
Signed-off-by:
Make save_state/restore callbacks accept struct msm_dsi_phy rather than
struct msm_dsi_pll. This moves them to struct msm_dsi_phy_ops, allowing
us to drop struct msm_dsi_pll_ops.
Signed-off-by: Dmitry Baryshkov
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
Phy driver already knows the source PLL id basing on the set usecase and
the current PLL id. Stop passing it to the phy_enable call. As a
reminder, dsi manager will always use DSI 0 as a clock master in a slave
mode, so PLL 0 is always a clocksource for DSI 0 and it is always a
clocksource for DSI
10nm and 7nm already do not use these helpers, as they handle setting
slave DSI clocks after enabling VCO. Modify the rest of PHY drivers to
remove unnecessary indirection and drop enable_seq/disable_seq PLL
callbacks.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by:
The 7nm, 10nm and 14nm drivers would store interim data used during
VCO/PLL rate setting in the global dsi_pll_Nnm structure. Move this data
structures to the onstack storage. While we are at it, drop
unused/static 'config' data, unused config fields, etc.
Signed-off-by: Dmitry Baryshkov
On 2021-03-31 00:04, Steev Klimaszewski wrote:
On 3/22/21 4:17 AM, Kalyan Thota wrote:
From: Kalyan Thota
DPU runtime resume will request for a min vote on the AXI bus as
it is a necessary step before turning ON the AXI clock.
The change does below
1) Move the icc path set before requesting
On Tue, 30 Mar 2021 08:15:05 +, Carlis wrote:
> From: "Xuezhi Zhang"
>
> Document support for the Waveshare 2inch LCD module display, which is a
> 240x320 2" TFT display driven by a Sitronix ST7789V TFT Controller.
>
> Signed-off-by: Xuezhi Zhang
> ---
> v2:change compatible name.
>
Morph msm_dsi_pll_save/restore_state() into msm_dsi_phy_save/restore_state(),
thus removing last bits of knowledge about msm_dsi_pll from dsi_manager.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/dsi.h
Instead of setting the variable and then using it just in the one place,
determine vco_delay directly at the PLL configuration time.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Tested-by: Stephen Boyd # on sc7180 lazor
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 12
WARN_ON was introduced by the below commit to catch runtime resumes
that are getting triggered before icc path was set.
"drm/msm/disp/dpu1: icc path needs to be set before dpu runtime resume"
For the targets where the bw scaling is not enabled, this WARN_ON is
a false alarm. Fix the WARN
On Wed, Mar 31, 2021 at 03:15:47PM +1100, Alistair Popple wrote:
> On Wednesday, 31 March 2021 2:56:38 PM AEDT John Hubbard wrote:
> > On 3/30/21 3:56 PM, Alistair Popple wrote:
> > ...
> > >> +1 for renaming "munlock*" items to "mlock*", where applicable. good
> grief.
> > >
> > > At least the
Am 31.03.21 um 14:25 schrieb Rodrigo Siqueira:
To fully isolate FPU operations in a single place, we must avoid
situations where compilers spill FP values to registers due to FP enable
in a specific C file. Note that even if we isolate all FPU functions in
a single file and call its interface
Am 31.03.21 um 15:12 schrieb Bernard Zhao:
Fix sparse warning:
drivers/gpu/drm/ttm/ttm_bo.c:52:1: warning: symbol 'ttm_global_mutex' was not
declared. Should it be static?
drivers/gpu/drm/ttm/ttm_bo.c:53:10: warning: symbol 'ttm_bo_glob_use_count' was
not declared. Should it be static?
I suppose the microcode version check for a650 is incorrect. It checks
for the version 1.95, while the firmware released have major version of 0:
0.91 (vulnerable), 0.99 (fixing the issue).
Lower version requirements to accept firmware 0.99.
Fixes: 8490f02a3ca4 ("drm/msm: a6xx: Make sure the SQE
On Wed, Mar 31, 2021 at 02:57:31PM +0200, Andrzej Hajda wrote:
> >
> > if (!of_device_is_compatible(port_node, "hdmi-connector")) {
> > dev_err(lt->dev, "%s: Failed to get hdmi port\n", __func__);
> > + of_node_put(port_node);
> > ret = -EINVAL;
> > +
Hi,
This patch fixes issues found by a static checker.
Thanks,
Adrien Grassein (1):
drm/bridge: lt8912b: Fix issues found during static analysis
drivers/gpu/drm/bridge/lontium-lt8912b.c | 27 +++-
1 file changed, 17 insertions(+), 10 deletions(-)
--
2.25.1
Some issues where found during static analysis of this driver.
Reported-by: Dan Carpenter
Suggested-by: Dan Carpenter
Signed-off-by: Adrien Grassein
---
drivers/gpu/drm/bridge/lontium-lt8912b.c | 27 +++-
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git
On Wed, Mar 31, 2021 at 01:21:37PM +0200, Adrien Grassein wrote:
> - lt->data_lanes = of_property_count_u32_elems(endpoint, "data-lanes");
> + data_lanes = of_property_count_u32_elems(endpoint, "data-lanes");
> of_node_put(endpoint);
> + if (data_lanes < 0) {
> +
Hi,
This patch fixes issues found by a static checker:
- Bad handling of handling of of_* return values.
Thanks,
Adrien Grassein (1):
drm/bridge: lt8912b: fix incorrect handling of of_* return values
drivers/gpu/drm/bridge/lontium-lt8912b.c | 32 +---
1 file changed,
A static analysis shows several issues in the driver code at
probing time.
DT parsing errors were bad handled and could lead to bugs:
- Bad error detection;
- Bad release of ressources
Reported-by: Dan Carpenter
Suggested-by: Dan Carpenter
Signed-off-by: Adrien Grassein
Reviewed-by:
On Wed, Mar 31, 2021 at 03:33:13PM +0200, Adrien Grassein wrote:
> A static analysis shows several issues in the driver code at
> probing time.
>
> DT parsing errors were bad handled and could lead to bugs:
> - Bad error detection;
> - Bad release of ressources
>
> Reported-by: Dan Carpenter
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