[PATCH 1/2] drm: Allow drivers to modify plane_state in prepare_fb/cleanup_fb

On Thu, Aug 18, 2016 at 07:00:16PM +0100, Chris Wilson wrote: > The drivers have to modify the atomic plane state during the prepare_fb > callback so they track allocations, reservations and dependencies for > this atomic operation involving this fb. In particular, how else do we > set the

[PATCH] virtio-gpu: Use memdup_user() rather than duplicating its implementation

From: Markus Elfring Date: Thu, 18 Aug 2016 22:35:14 +0200 Reuse existing functionality from memdup_user() instead of keeping duplicate source code. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH v3 03/11] drm/i915: return EACCES for check_cmd() failures

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[Bug 97403] AMDGPU/Iceland DPM not properly working on 4.9-wip

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[Bug 97403] AMDGPU/Iceland DPM not properly working on 4.9-wip

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[git pull] drm fixes

On Thu, Aug 18, 2016 at 4:58 AM, Dave Airlie wrote: > > Hi Linus, > > Pretty quiet so far, a few amdgpu/radeon fixup for pcie pm changes, > and a couple of amdgpu fixes, along with some build fixes, and printk fix. It's missing the intel fixes pile from earlier this week, already pinged Dave

[PATCH 2/2] GPU-DRM-Savage: Less function calls in savage_bci_cmdbuf() after error detection

From: Markus Elfring Date: Thu, 18 Aug 2016 21:28:58 +0200 The kfree() function was called in a few cases by the savage_bci_cmdbuf() function during error handling even if a passed variable contained a null pointer. Adjust jump targets according to the Linux

[PATCH 1/2] GPU-DRM-Savage: Use memdup_user() rather than duplicating

From: Markus Elfring Date: Thu, 18 Aug 2016 18:12:03 +0200 Reuse existing functionality from memdup_user() instead of keeping duplicate source code. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH 0/2] GPU-DRM-Savage: Fine-tuning for savage_bci_cmdbuf()

From: Markus Elfring Date: Thu, 18 Aug 2016 21:38:37 +0200 A few update suggestions were taken into account from static source code analysis. Markus Elfring (2): Use memdup_user() rather than duplicating its implementation Less function calls after error

"Fixes" for page flipping under PRIME on AMD & nouveau

On Thu, Aug 18, 2016 at 4:23 AM, Michel Dänzer wrote: > Maybe the rasterization as two triangles results in bad PCIe bandwidth > utilization. Using the asynchronous DMA engine for these transfers would > probably be ideal, but having the 3D engine rasterize a single rectangle > (either using the

[Bug 97402] AMDGPU/Iceland kernel panic on shutdown

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[Bug 97402] AMDGPU/Iceland kernel panic on shutdown

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[PATCH 2/2] drm/i915: Replace intel_plane->wait_req with plane->fence

Now that we subclass our request from struct fence, we start using the common primitives more freely and so avoid hand-rolling routines already provided for by the helpers. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_atomic_plane.c | 3 -- drivers/gpu/drm/i915/intel_display.c

[PATCH 1/2] drm: Allow drivers to modify plane_state in prepare_fb/cleanup_fb

The drivers have to modify the atomic plane state during the prepare_fb callback so they track allocations, reservations and dependencies for this atomic operation involving this fb. In particular, how else do we set the plane->fence from the framebuffer! Signed-off-by: Chris Wilson Cc: Daniel

[PATCH v4 1/4] drm: extra printk() wrapper macros

We had only DRM_INFO() and DRM_ERROR(), whereas the underlying printk() provides several other useful intermediate levels such as NOTICE and WARNING. So this patch fills out the set by providing both regular and once-only macros for each of the levels INFO, NOTICE, and WARNING, using a common

[PATCH v3 1/5] drm/rockchip: sort registers define by chip's number

On 2016年08月18日 17:11, Daniel Vetter wrote: > On Thu, Aug 18, 2016 at 05:08:14PM +0800, Mark yao wrote: >> >Hi Sean >> > >> >Thanks for send v3 patch for rk3399 vop support. >> > >> >But sorry for that, I had changed my mind, those patches are deprecated, >> >I have new rk3399 patch on my

"Fixes" for page flipping under PRIME on AMD & nouveau

On 18/08/16 05:20 PM, Christian König wrote: > Am 18.08.2016 um 09:52 schrieb Michel Dänzer: >> On 18/08/16 04:41 PM, Christian König wrote: Afaiu the prime importing display gpu generates its own gem buffer handle (prime_fd_to_handle) from that dmabuf, importing scather-gather

[PATCH v3 1/5] drm/rockchip: sort registers define by chip's number

Hi Sean Thanks for send v3 patch for rk3399 vop support. But sorry for that, I had changed my mind, those patches are deprecated, I have new rk3399 patch on my downstream kernel, I will upstream soon. Thanks. On 2016年08月18日 01:20, Sean Paul wrote: > From: Mark Yao > > No functional

[PATCH 2/2] drm/rockchip: Use DRM_DEV_ERROR in vop

On 2016年08月13日 01:00, Sean Paul wrote: > Since we can have multiple vops, use DRM_DEV_ERROR to > make logs easier to process. > > Signed-off-by: Sean Paul looks good for me Acked-by: Mark Yao > --- > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 24 ++-- > 1 file

"Fixes" for page flipping under PRIME on AMD & nouveau

On 18/08/16 04:41 PM, Christian König wrote: >> Afaiu the prime importing display gpu generates its own gem buffer >> handle (prime_fd_to_handle) from that dmabuf, importing scather-gather >> tables to access the dmabuf in system ram. As far as page flipping is >> concerned, so far those gem

[PATCH 3/3] drm/rockchip: Reduce psr flush time to 100ms

3 seconds is a bit too conservative, drop this to 100ms for better power savings. Signed-off-by: Sean Paul --- drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c

[PATCH 2/3] drm/rockchip: Don't key off vblank for psr

Instead of keying off vblank for psr, just flush every time we get an atomic update. This ensures that cursor updates will properly disable psr (without turning vblank on/off), and unifies the paths between fb_dirty and atomic psr enable/disable. Signed-off-by: Sean Paul ---

[PATCH 1/3] drm/rockchip: Remove unnecessary vblank get/put from vop driver

vblank references are handled in the top-level atomic complete function, so no need to grab them again in the vop driver. Signed-off-by: Sean Paul --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 11 --- 1 file changed, 11 deletions(-) diff --git

[PATCH 0/3] drm/rockchip: Improve PSR/VBLANK interaction

Instead of using vblank to trigger psr enable/disable, use the flush timer built for fb_dirty all of the time. This allows us to mitiage the various edge cases, e.g. cursor. non-event updates, etc.. Sean Paul (3): drm/rockchip: Remove unnecessary vblank get/put from vop driver drm/rockchip:

[Bug 97025] flip queue failed: Device or resource busy

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[PATCH 4.7 132/186] drm: Restore double clflush on the last partial cacheline

4.7-stable review patch. If anyone has any objections, please let me know. -- From: Chris Wilson commit 396f5d62d1a5fd99421855a08ffdef8edb43c76e upstream. This effectively reverts commit afcd950cafea6e27b739fe7772cbbeed37d05b8b Author: Chris Wilson

[PATCH 4.4 088/138] drm: Restore double clflush on the last partial cacheline

4.4-stable review patch. If anyone has any objections, please let me know. -- From: Chris Wilson commit 396f5d62d1a5fd99421855a08ffdef8edb43c76e upstream. This effectively reverts commit afcd950cafea6e27b739fe7772cbbeed37d05b8b Author: Chris Wilson

[PATCH v2 0/4] Picture aspect ratio support in DRM layer

Hi, On 09-08-2016 15:55, Shashank Sharma wrote: > This patch series adds 4 patches. > - The first two patches add aspect ratio support in DRM layes > - Next two patches add new aspect ratios defined in CEA-861-F > supported for HDMI 2.0 4k modes. > > Adding aspect ratio support in DRM layer: >

[PATCH] drm: bridge/dw-hdmi: Fix colorspace and scan information registers values

On Thu, Aug 18, 2016 at 03:34:12PM +0100, Jose Abreu wrote: > Colorspace and scan information values were being written in wrong > offsets. This patch corrects this and writes the values at the > offsets specified in the databook. > > Signed-off-by: Jose Abreu > Cc: Carlos Palminha > Cc: David

[PATCH] drm: bridge/dw-hdmi: Fix colorspace and scan information registers values

Colorspace and scan information values were being written in wrong offsets. This patch corrects this and writes the values at the offsets specified in the databook. Signed-off-by: Jose Abreu Cc: Carlos Palminha Cc: David Airlie Cc: Russell King Cc: Daniel

[RESEND PATCH v2 1/3] drm: dw_hdmi: use of_get_i2c_adapter_by_node interface

On Tue, Aug 16, 2016 at 11:26:43PM +0300, Vladimir Zapolskiy wrote: > This change is needed to properly lock I2C bus driver, which serves > DDC. > > The change fixes an overflow over zero of I2C bus driver user counter: > > root at imx6q:~# lsmod > Not tainted > dw_hdmi_ahb_audio 4082 0 -

[PATCH 7/9] drm: Extract drm_property.[hc]

On Thu, Aug 18, 2016 at 12:11:35PM +0100, Emil Velikov wrote: > Hi Daniel, > > On 17 August 2016 at 21:56, Daniel Vetter wrote: > > --- /dev/null > > +++ b/include/drm/drm_property.h > > > +#ifndef __DRM_PROPERTY_H__ > > +#define __DRM_PROPERTY_H__ > > + > > +#include > > +#include > >

Use of copy_from_user in msm_gem_submit.c while holding a spin_lock

On Thu, Aug 18, 2016 at 06:55:12AM -0400, Rob Clark wrote: > On Thu, Aug 18, 2016 at 4:36 AM, Daniel Vetter wrote: > > On Wed, Aug 17, 2016 at 05:29:31PM -0400, Rob Clark wrote: > >> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c > >> index 6cd4af4..4502e4b 100644 > >>

[Bug 97039] The Talos Principle and Serious Sam 3 GPU faults

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[PATCH v3 2/5] dt-bindings: sort Rockchip vop compatible by chip's number

From: Mark Yao Reorder the compatible vop devices to be sorted by chip number in ascending order. Reviewed-by: Tomasz Figa Signed-off-by: Mark Yao [seanpaul added commit description per tfiga's review] Signed-off-by: Sean Paul --- Resending to add devicetree list

[Bug 97039] The Talos Principle and Serious Sam 3 GPU faults

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[PATCH v3 5/5] dt-bindings: add compatible strings for big/little rockchip vops

From: Mark Yao This patch documents the compatible strings for the big and little vop in rockchip's drm driver. Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Reviewed-by:

[PATCH] staging/android: add Doc for SW_SYNC ioctl interface

On Thu 2016-08-11 13:45:53, Gustavo Padovan wrote: > From: Gustavo Padovan > > This interface is hidden from kernel headers and it is intended for use > only for testing. So testers would have to add the ioctl information > internally. This is to prevent misuse of this feature. > > v2: take in

[Bug 97039] The Talos Principle and Serious Sam 3 GPU faults

Serious Sam 3 with it, but let just say that is separate issue for now. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160

IGT on ARM - Build # 137 - Failure!

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[Bug 97039] The Talos Principle and Serious Sam 3 GPU faults

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[PATCH 7/9] drm: Extract drm_property.[hc]

Hi Daniel, On 17 August 2016 at 21:56, Daniel Vetter wrote: > --- /dev/null > +++ b/include/drm/drm_property.h > +#ifndef __DRM_PROPERTY_H__ > +#define __DRM_PROPERTY_H__ > + > +#include > +#include > +#include > + Add the following fwd declaration since we use a pointer to the said struct ?

"Fixes" for page flipping under PRIME on AMD & nouveau

On 18/08/16 08:51 AM, Mario Kleiner wrote: > > That's what the ati-ddx/amdgpu-ddx does at the moment, as it detects the > mismatch in tiling flags and uses the DRI3/Present copy path instead of > the pageflip path. The problem is that the servers Present > implementation doesn't request a vsync'ed

"Fixes" for page flipping under PRIME on AMD & nouveau

On 18/08/16 01:12 AM, Mario Kleiner wrote: > > Intel as display gpu + nouveau for render offload worked nicely > on intel-ddx with page flipping, proper timing, dmabuf fence sync > and all. How about with AMD instead of nouveau in this case? > Turns out that prime + page flipping currently

[Intel-gfx] [PATCH 1/4] drm: add picture aspect ratio flags

On 4 August 2016 at 17:09, Daniel Vetter wrote: > On Thu, Aug 04, 2016 at 03:31:45PM +0100, Emil Velikov wrote: >> On 4 August 2016 at 14:15, Sharma, Shashank >> wrote: >> > On 8/4/2016 5:04 PM, Emil Velikov wrote: >> >> >> >> On 4 August 2016 at 11:16, Sharma, Shashank >> >> wrote: >> >>> >>

[PATCH v3 1/5] drm/rockchip: sort registers define by chip's number

On Thu, Aug 18, 2016 at 05:08:14PM +0800, Mark yao wrote: > Hi Sean > > Thanks for send v3 patch for rk3399 vop support. > > But sorry for that, I had changed my mind, those patches are deprecated, > I have new rk3399 patch on my downstream kernel, I will upstream soon. Wut? Imo merge Sean's

Use of copy_from_user in msm_gem_submit.c while holding a spin_lock

On Wed, Aug 17, 2016 at 05:29:31PM -0400, Rob Clark wrote: > On Wed, Aug 17, 2016 at 3:15 PM, Al Viro wrote: > > On Wed, Aug 17, 2016 at 02:49:32PM -0400, Rob Clark wrote: > >> If there is a copy_from_user() variant that will return an error > >> instead of blocking, I think that is really what I

Use of copy_from_user in msm_gem_submit.c while holding a spin_lock

On Wed, Aug 17, 2016 at 08:31:20PM +0100, Al Viro wrote: > On Wed, Aug 17, 2016 at 03:24:38PM -0400, Rob Clark wrote: > > > hmm, looks like, at least on arm (not sure about arm64), > > > > #define __copy_from_user_inatomic __copy_from_user > > > > ie. copy_from_user() minus the access_ok() and

[PATCH v2 2/2] drm/fence: allow fence waiting to be interrupted by userspace

Op 16-08-16 om 01:05 schreef Gustavo Padovan: > From: Gustavo Padovan > > If userspace is running an synchronously atomic commit and interrupts the > atomic operation during fence_wait() it will hang until the timer expires, > so here we change the wait to be interruptible so it stop immediately

"Fixes" for page flipping under PRIME on AMD & nouveau

Am 18.08.2016 um 09:52 schrieb Michel Dänzer: > On 18/08/16 04:41 PM, Christian König wrote: >>> Afaiu the prime importing display gpu generates its own gem buffer >>> handle (prime_fd_to_handle) from that dmabuf, importing scather-gather >>> tables to access the dmabuf in system ram. As far as

[PATCH v12 2/7] drm/i915/skl: Add support for the SAGV, fix underrun hangs

On Thu, 2016-08-18 at 09:39 +0200, Maarten Lankhorst wrote: > Hey, > > Op 17-08-16 om 21:55 schreef Lyude: > > > > Since the watermark calculations for Skylake are still broken, we're apt > > to hitting underruns very easily under multi-monitor configurations. > > While it would be lovely if

[Bug 97099] Regression in 9ef8537e6 "drm/radeon: don't use fractional dividers on RS[78]80 if SS is enabled" (RV620)

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"Fixes" for page flipping under PRIME on AMD & nouveau

Am 18.08.2016 um 04:32 schrieb Michel Dänzer: > On 18/08/16 08:51 AM, Mario Kleiner wrote: >> There is this other approach from NVidia's Alex Goins for their >> proprietary driver, whose patches landed in the X-Server 1.19 master >> branch a couple of weeks ago. I haven't read his patches in

[Bug 97371] AMDGPU/Iceland amdgpu: failed testing IB on ring 9/10

... URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20160818/ba1edcc1/attachment.html>

"Fixes" for page flipping under PRIME on AMD & nouveau

> Afaiu the prime importing display gpu generates its own gem buffer > handle (prime_fd_to_handle) from that dmabuf, importing scather-gather > tables to access the dmabuf in system ram. As far as page flipping is > concerned, so far those gem buffers / radeon_bo's aren't treated any >

[PATCH] drm/edid: CEA mode 64 1080p100 vsync pulse width incorrect

On Mon, Aug 15, 2016 at 10:31 AM, wrote: > From: Clint Taylor > > In the CEA-861 specification VIC 64 specifies a vsync pulse of 5 and > a backporch of 36. Adjust vsync pulse width to match specification. > > Cc: Ville Syrjälä > Signed-off-by: Clint Taylor Seems to line up with the

[PATCH v4] drm: Introduce DRM_DEV_* log messages

On Tue, Aug 16, 2016 at 9:56 AM, Eric Engestrom wrote: > On Tue, Aug 16, 2016 at 09:18:34AM -0700, Sean Paul wrote: >> On Tue, Aug 16, 2016 at 5:28 AM, Eric Engestrom >> wrote: >> > On Mon, Aug 15, 2016 at 04:18:04PM -0700, Sean Paul wrote: >> >> This patch consolidates all the various log

[PATCH v12 2/7] drm/i915/skl: Add support for the SAGV, fix underrun hangs

Hey, Op 17-08-16 om 21:55 schreef Lyude: > Since the watermark calculations for Skylake are still broken, we're apt > to hitting underruns very easily under multi-monitor configurations. > While it would be lovely if this was fixed, it's not. Another problem > that's been coming from this

[PATCH 2/2] drm/rockchip: Use DRM_DEV_ERROR in vop

On Thu, Aug 18, 2016 at 1:53 AM, Mark yao wrote: > On 2016年08月13日 01:00, Sean Paul wrote: >> >> Since we can have multiple vops, use DRM_DEV_ERROR to >> make logs easier to process. >> >> Signed-off-by: Sean Paul > > > looks good for me > > Acked-by: Mark Yao > Applied to drm-misc >>

[PATCH v2] drm: drop DRIVER_HAVE_IRQ flag for some drivers

Acked-by: Vincent Abriou On 08/16/2016 09:06 AM, Shawn Guo wrote: > Since commit 4984979b9b90 ("drm/irq: simplify irq checks in > drm_wait_vblank"), the drm driver feature flag DRIVER_HAVE_IRQ is only > required for drivers that have an IRQ handler managed by the DRM core. > Some drivers,

Use of copy_from_user in msm_gem_submit.c while holding a spin_lock

On Thu, Aug 18, 2016 at 9:08 AM, Daniel Vetter wrote: > On Thu, Aug 18, 2016 at 06:55:12AM -0400, Rob Clark wrote: >> On Thu, Aug 18, 2016 at 4:36 AM, Daniel Vetter wrote: >> > On Wed, Aug 17, 2016 at 05:29:31PM -0400, Rob Clark wrote: >> >> diff --git a/drivers/gpu/drm/msm/msm_gem.c

[PATCH for v4.8] cec-edid: check for IEEE identifier

The cec_get_edid_spa_location() function did not verify that the IEEE identifier in the Vendor Specific Data Block matched the HDMI-LLC identifier. This could result in the wrong VSDB block being returned. For example, for HDMI 2.0 EDIDs there is also a HDMI Forum VSDB. So check the IEEE

Use of copy_from_user in msm_gem_submit.c while holding a spin_lock

On Thu, Aug 18, 2016 at 4:36 AM, Daniel Vetter wrote: > On Wed, Aug 17, 2016 at 05:29:31PM -0400, Rob Clark wrote: >> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c >> index 6cd4af4..4502e4b 100644 >> --- a/drivers/gpu/drm/msm/msm_gem.c >> +++

[Bug 153121] UVD not responding, trying to reset the VCPU, ATI Mobility Radeon HD 5650

https://bugzilla.kernel.org/show_bug.cgi?id=153121 --- Comment #31 from Kontantin Ivanov --- Created attachment 229241 --> https://bugzilla.kernel.org/attachment.cgi?id=229241=edit 4.8.0-040800rc2 Xorg.0.log Xorg log for 4.8.0 rc2 -- You are receiving this mail because: You are watching the

[Bug 153121] UVD not responding, trying to reset the VCPU, ATI Mobility Radeon HD 5650

https://bugzilla.kernel.org/show_bug.cgi?id=153121 --- Comment #30 from Kontantin Ivanov --- Created attachment 229231 --> https://bugzilla.kernel.org/attachment.cgi?id=229231=edit 4.8.0-040800rc2 dmesg dmesg for 4.8.0 rc2 -- You are receiving this mail because: You are watching the

[Bug 153121] UVD not responding, trying to reset the VCPU, ATI Mobility Radeon HD 5650

https://bugzilla.kernel.org/show_bug.cgi?id=153121 --- Comment #29 from Michel Dänzer --- (In reply to Kontantin Ivanov from comment #28) > DRI_PRIME=1 glxinfo | grep -i opengl | egrep -i '(version|renderer)' > > OpenGL renderer string: Mesa DRI Intel(R) Ironlake Mobile [...] > DRI_PRIME=1

[Bug 153121] UVD not responding, trying to reset the VCPU, ATI Mobility Radeon HD 5650

https://bugzilla.kernel.org/show_bug.cgi?id=153121 Kontantin Ivanov changed: What|Removed |Added Severity|normal |low --- Comment #28 from Kontantin

[git pull] drm fixes

Hi Linus, Pretty quiet so far, a few amdgpu/radeon fixup for pcie pm changes, and a couple of amdgpu fixes, along with some build fixes, and printk fix. Dave. The following changes since commit 4b9eaf33d83d91430b7ca45d0ebf8241da489c92: Merge branch 'akpm' (patches from Andrew) (2016-08-11

[PATCH v6 8/8] drm/rockchip: Add dmc notifier in vop driver

Hi, On 2016年08月18日 02:14, Sean Paul wrote: > On Tue, Aug 16, 2016 at 3:36 PM, Lin Huang wrote: >> when in ddr frequency scaling process, vop can not do >> enable or disable operation, since dcf will base on vop vblank >> time to do frequency scaling and need to get vop irq if there >>

Fw: Re: BUG : unable to handle kernel NULL pointer dereference at 00000148 on a ThinkCentre

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"Fixes" for page flipping under PRIME on AMD & nouveau

On 08/17/2016 07:43 PM, Alex Deucher wrote: > On Wed, Aug 17, 2016 at 12:35 PM, Mario Kleiner > wrote: >> On 08/17/2016 06:27 PM, Christian König wrote: AMD uses copy swaps because radeon/amdgpu kms can't switch the scanout mode from tiled to linear on the fly during flips. >>>

"Fixes" for page flipping under PRIME on AMD & nouveau

On 08/17/2016 07:02 PM, Christian König wrote: > Am 17.08.2016 um 18:35 schrieb Mario Kleiner: >> On 08/17/2016 06:27 PM, Christian König wrote: AMD uses copy swaps because radeon/amdgpu kms can't switch the scanout mode from tiled to linear on the fly during flips. >>> Well I'm not an

[Bug 97260] [bisected] R9 290 low performance in Linux 4.7

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[Bug 97260] [bisected] R9 290 low performance in Linux 4.7

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[Bug 93288] dpm malfunction on radeon grenada r9 390X

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[Bug 93288] dpm malfunction on radeon grenada r9 390X

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[Bug 93288] dpm malfunction on radeon grenada r9 390X

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[drm-intel:drm-intel-next-queued 2/12] drivers/gpu/drm/i915/i915_gem_gtt.o: warning: objtool: i915_get_ggtt_vma_pages()+0x425: function has unreachable instruction

tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued head: 8d970654b767ebe8aeb524d30e27b37c0cb8eaed commit: 6687c9062c46c83e5a07df65015eb4fc9dc76524 [2/12] drm/i915: Rewrite fb rotation GTT handling config: x86_64-randconfig-s3-08172039 (attached as .config) compiler: gcc-6

[Bug 97362] Low performance after suspend on RX 480

https://bugs.freedesktop.org/show_bug.cgi?id=97362 Christoph Haag changed: What|Removed |Added Attachment #125811|0 |1 is obsolete|