https://bugs.freedesktop.org/show_bug.cgi?id=105256
--- Comment #7 from H4nN1baL ---
Just as a constancy and this does not remain in oblivion, this is related to
this another: https://bugs.freedesktop.org/show_bug.cgi?id=102204
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https://bugs.freedesktop.org/show_bug.cgi?id=102204
H4nN1baL changed:
What|Removed |Added
QA Contact|reizemb...@gmail.com|dri-devel@lists.freedesktop
tree: git://people.freedesktop.org/~airlied/linux.git drm-next
head: 128ccceaba8656573b8b0f86d3ab6e38094cc754
commit: f073d78eeb8efd85718e611c15f9a78647751dea [8/10] Merge tag
'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel into
drm-next
reproduce: make htmldocs
Al
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.17
head: f6c3b601bd490eda08c27b03607448abd4b4841b
commit: e1deba285156fb4023bb48f22068de5b60e34e15 [458/491] drm/amd/pp: Use
amdgpu acpi helper functions in powerplay
config: sparc64-allyesconfig (attached as .config)
compiler: spa
https://bugs.freedesktop.org/show_bug.cgi?id=105433
--- Comment #1 from Thomas R. ---
Created attachment 137980
--> https://bugs.freedesktop.org/attachment.cgi?id=137980&action=edit
dmesg of boot, start of X and xrandr
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https://bugs.freedesktop.org/show_bug.cgi?id=105433
Bug ID: 105433
Summary: Unreliable Modesetting on Tonga with two DVI Screens
Product: DRI
Version: DRI git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=104064
taij...@posteo.de changed:
What|Removed |Added
Attachment #137852|0 |1
is obsolete|
https://bugzilla.kernel.org/show_bug.cgi?id=197925
--- Comment #14 from kwka...@gmx.com ---
(In reply to Harry Wentland from comment #13)
> kwkaess, are you talking about the error message when saying "still not
> fixed" or the (arguably more disruptive and important) non-desirable
> behaviors men
Hi Meghana,
On Sat, Mar 10, 2018 at 4:51 PM, Meghana Madhyastha
wrote:
> Split spi messages into chunks of <65535 in the spi subsystem and remove the
> message
> length warning in bcm2835_spi_can_dma. This is so that the messages can be
> transferred
> via dma and that the tinydrm drivers need
Hello Archit,
On Sat, Mar 10, 2018 at 11:23:19AM +0530, Archit Taneja wrote:
> Hi,
>
> On Friday 09 March 2018 07:21 PM, Jacopo Mondi wrote:
> >Hello,
> >after some discussion on the proposed bindings for generic lvds decoder
> > and
> >Thine THC63LVD1024, I decided to drop the THC63 specific
On Sat, Mar 10, 2018 at 04:01:58PM +0100, Christian König wrote:
> Good to have an example how to use HMM with an upstream driver.
I have tried to keep hardware specific bits and overal HMM logic separated
so people can use it as an example without needing to understand NVidia GPU.
I think i can s
Hi Sergei,
On Fri, Mar 09, 2018 at 08:30:36PM +0300, Sergei Shtylyov wrote:
> On 03/09/2018 04:51 PM, Jacopo Mondi wrote:
>
> > The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
> > to the on-chip LVDS encoder output on one side and to HDMI encoder
> > ADV7511w on the other
From: zain wang
There are some different bits between Rockchip and Exynos in register
"AUX_PD". This patch fixes the incorrect operations about it.
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by:
From: Mark Yao
Some encoder have a crc verification check, crc check fail if
input and output data is not equal.
That means encoder input and output need use same color depth,
vop can output 10bit data to encoder, but some panel only support
8bit depth, that would make crc check die.
So pre dit
From: zain wang
If we failed disable psr, it would hang the display until next psr
cycle coming. So we should restore psr->state when it failed.
Cc: Tomasz Figa
Signed-off-by: zain wang
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: En
From: zain wang
There is a race between AUX CH bring-up and enabling bridge which will
cause link training to fail. To avoid hitting it, don't change psr state
while enabling the bridge.
Cc: Tomeu Vizoso
Cc: Sean Paul
Signed-off-by: zain wang
Signed-off-by: Caesar Wang
[seanpaul fixed up the
From: zain wang
Register ANALOGIX_DP_FUNC_EN_1(offset 0x18), Rockchip is different to
Exynos:
on Exynos edp phy,
BIT 7 MASTER_VID_FUNC_EN_N
BIT 6 reserved
BIT 5 SLAVE_VID_FUNC_EN_N
on Rockchip edp phy,
BIT 7 reserved
BIT 6 RK_VID_CAP_FUNC_EN_N
B
From: Tomasz Figa
It looks like the driver subsystem detaches devices from power domains
at shutdown without consent of the drivers. This means that we might have
our power domain turned off behind our back and the only way to avoid
problems is to stop doing any hardware programming at some point
From: Tomasz Figa
Currently PSR flush is triggered from CRTC's .atomic_begin() callback,
which is executed after modeset disables and enables and before plane
updates are committed. Since PSR flush and re-enable can be triggered
asynchronously by external sources (input event, delayed work), it c
Document transparent LVDS to CMOS/TTL decoder that do not require any
configuration.
Signed-off-by: Jacopo Mondi
---
.../bindings/display/bridge/lvds-decoder.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bri
From: zain wang
We currently wait for the panel to mirror our intended PSR state
before continuing on both PSR enter and PSR exit. This is really
only important to do when we're entering PSR, since we want to
be sure the last frame we pushed is being served from the panel's
internal fb before shu
From: Tomasz Figa
The first time after we call rockchip_drm_do_flush() after
rockchip_drm_psr_register(), we go from PSR_DISABLE to PSR_FLUSH. The
difference between PSR_DISABLE and PSR_FLUSH is whether or not we have a
delayed work pending - PSR is off in either state. However
psr_set_state() o
On Fri, Mar 09, 2018 at 12:20:59PM +0100, Lucas Stach wrote:
> All the DRM GEM dma-buf import/export operations are done through the
> virtual DRM master device. As this isn't instanciated from DT anymore
> we need to make sure the DMA ops are set up correctly.
>
> Signed-off-by: Lucas Stach
> --
From: zain wang
There is no register named ANALOGIX_DP_PLL_CTL in Rockchip edp phy reg
list. We should use BIT_4 in ANALOGIX_DP_PD to control the pll power
instead of ANALOGIX_DP_PLL_CTL.
Cc: Douglas Anderson
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
R
From: Tomasz Figa
It is not used anymore after last changes and it was not even correct to
begin with as it assumed a 1:1 relation between a CRTC and encoder,
while in fact a CRTC can be attached to multiple encoders.
Signed-off-by: Tomasz Figa
Signed-off-by: Thierry Escande
Signed-off-by: Enr
On Fri, Mar 09, 2018 at 12:52:40PM +0100, Lucas Stach wrote:
> Hi Russell,
>
> Am Freitag, den 09.03.2018, 11:44 + schrieb Russell King - ARM Linux:
> > Hi Lucas,
> >
> > Please retain my authorship of my patch, which was sent on 23 Oct 2017.
> > The patch you have below is 100% identical to
From: zain wang
Panel would reset its setting when it powers down. It would forget the last
succeeded link training setting. So we can't use the last successful link
training setting to do fast link training. Let's reset fast_train_enable in
analogix_dp_bridge_disable();
Cc: Stéphane Marchesin
From: "Kristian H. Kristensen"
To improve PSR exit latency, we speculatively start exiting when we
receive input events. Occasionally, this may lead to false positives,
but most of the time we get a head start on coming out of PSR. Depending
on how userspace takes to produce a new frame in respon
From: zain wang
Following the correct power up sequence:
dp_pd=ff => dp_pd=7f => wait 10us => dp_pd=00
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
Tested-by: Marek Szyprowski
---
drivers/gpu
From: zain wang
The STRM_VALID bit in register ANALOGIX_DP_SYS_CTL_3 may be unstable,
so we may hit the error log "Timeout of video streamclk ok" since
checked this unstable bit.
In fact, we can go continue and the streamclk is ok if we wait enough time,
it does no effect on display.
Let's change
From: zain wang
According to DP spec v1.3 chap 3.5.1.2 Link Training, Link Policy Maker
must first detect that the HPD signal is asserted high by the Downstream
Device before establishing a link with it.
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: T
From: Sean Paul
Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Sean Paul
Signed-off-by:
From: zain wang
We would meet a short black screen when exit PSR with the full link
training, In this case, we should use fast link train instead of full
link training.
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
Test
From: Douglas Anderson
The code in analogix_dp_transfer() that was supposed to print out:
AUX CH error happened
Was actually dead code. That's because the previous check (whether
the interrupt status indicated any errors) would have hit for all
errors anyway.
Let's combine the two error check
On Fri, Mar 09, 2018 at 02:51:40PM +0100, Jacopo Mondi wrote:
> The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
> to the on-chip LVDS encoder output on one side and to HDMI encoder
> ADV7511w on the other one.
>
> As the decoder does not need any configuration it has been
From: Douglas Anderson
The current user of the analogix power_off is "analogix_dp-rockchip".
That driver does this:
- deactivate PSR
- turn off a clock
Both of these things (especially deactive PSR) should be done before
we turn the PHY power off and turn off analog power. Let's move the
callba
From: Douglas Anderson
Some of the platform-specific stuff in rockchip_dp_poweron() needs to
happen before the generic code. Some needs to happen after. Let's
split the callback in two.
Specifically we can't start doing PSR work until _after_ the whole
controller is up, so don't set the enable
From: Yakir Yang
Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
function, or print the sink PSR error state if we failed to apply the
requested PSR setting.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Yakir Yang
[seanpaul changed timeout loop to a readx poll]
Si
From: zain wang
Add a lock to vop to avoid disabling the crtc while waiting for a line
flag while enabling psr. If we disable in the middle of waiting for the
line flag, we'll end up timing out or worse.
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-o
From: Lin Huang
We should check AUX_EN bit to confirm the AUX CH operation is completed.
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Signed-off-by: Enric Balletbo i Serra
Tested-by: Marek Szyprowski
---
The R-Car V3M Eagle board includes a transparent LVDS decoder, connected
to the on-chip LVDS encoder output on one side and to HDMI encoder
ADV7511w on the other one.
As the decoder does not need any configuration it has been so-far
omitted from DTS. Now that a driver for transparent LVDS decoder
From: Lin Huang
There was a 1ms delay to detect the hpd signal, which is too short to
detect a short pulse. This patch extends this delay to 100ms.
Cc: Stéphane Marchesin
Cc: 征增 王
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Si
From: Ondrej Jirman
Currently the exclusivity is enabled when the rate is set by
the mode setting functions. These functions are called by
mode_set_nofb callback of drm_crc_helper. Then exclusivity
is disabled when tcon is disabled by atomic_disable
callback.
What happens is that mode_set_nofb c
From: Douglas Anderson
The comments in analogix_dp_init_aux() claim that we're disabling aux
channel retries, but then right below it for Rockchip it sets them to
3. If we actually need 3 retries for Rockchip then we could adjust
the comment, but it seems more likely that we want the same retry
From: Lin Huang
AUX errors are caused by many different reasons. We may not know what
happened in aux channel on failure, so let's reset aux channel if some
errors occurred.
Cc: 征增 王
Cc: Douglas Anderson
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Review
From: zain wang
When we enable bridge failed, we have to retry it, otherwise we would get
the abnormal display.
Cc: Stéphane Marchesin
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Balletbo i Serra
Tested-by
From: Tomasz Figa
Currently both rockchip_drm_psr_activate() and _deactivate() only set the
boolean "active" flag without actually making sure that hardware state
complies with it.
Since we are going to extend the usage of this API to properly lock PSR
for the duration of atomic commits, we chan
From: Tomasz Figa
Driver callbacks, such as system suspend or resume can be called any
time, specifically they can be called before the component bind
callback. Let's use dp->adp pointer as a safeguard and skip calling
Analogix entry points if it is an ERR_PTR().
Signed-off-by: Tomasz Figa
Sign
From: zain wang
Enhanced mode is required by the eDP 1.2 specification, and not doing it
early could result in a period of time where we have a link transmitting
idle packets without it. Since there is no reason to disable it, we just
enable it at the beginning of link training and then keep it o
From: Lin Huang
We need to check the dpcd write/read return value to see whether the
write/read was successful
Cc: Kristian H. Kristensen
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Douglas Anderson
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: A
Hi,
This patchset includes cleanups, improvements, and bug fixes for
Rockchip DRM driver and PSR support.
This new version is the same as before removing some of the patches
already applied and fixing the Exynos issue due patch '[v4 15/38]
drm/bridge: analogix_dp: Ensure edp is disabled when shut
Hi Lucas,
Please retain my authorship of my patch, which was sent on 23 Oct 2017.
The patch you have below is 100% identical to that which I sent.
You should also point out, as per the follow-on discussion, that using
clock_gettime() on 32-bit systems will not work once the time it
reports wraps
From: Lin Huang
We need to enable video before analogix_dp_is_video_stream_on(), so
we can get the right video stream status.
Cc: 征增 王
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Bal
Hi,
On 27/02/18 09:11, Andrzej Hajda wrote:
> These bindings allow to describe most known standard USB connectors
> and it should be possible to extend it if necessary.
> USB connectors, beside USB can be used to route other protocols,
> for example UART, Audio, MHL. In such case every device pass
Hello,
after some discussion on the proposed bindings for generic lvds decoder and
Thine THC63LVD1024, I decided to drop the THC63 specific part and just live with
a transparent decoder that does not support any configuration from DT.
Dropping THC63 support to avoid discussion on how to better
From: Lin Huang
When panel is shut down, we should make sure edp can be disabled to avoid
undefined behavior.
Cc: Stéphane Marchesin
Signed-off-by: Lin Huang
Signed-off-by: zain wang
Signed-off-by: Sean Paul
Signed-off-by: Thierry Escande
Reviewed-by: Andrzej Hajda
Signed-off-by: Enric Bal
From: Tomasz Figa
If we change the state first and reschedule later, we might have the
work executed according to previous scheduled time and end up with PSR
re-enabled instantly. Let's cancel the work before changing the state.
While at it, consolidate psr_disable_handler() to just call
rockchi
From: zain wang
It's too early to detect fast link training, if other step after it
failed, we will set fast_link flag to 1, and retry set_bridge again. In
this case we will power down and power up panel power supply, and we
will do fast link training since we have set fast_link flag to 1. In
fac
On Fri, Mar 09, 2018 at 11:12:37AM -0300, Fabio Estevam wrote:
> Hi Russell,
>
> On Fri, Mar 9, 2018 at 8:34 AM, Russell King - ARM Linux
> wrote:
> > On Fri, Mar 09, 2018 at 12:20:59PM +0100, Lucas Stach wrote:
> >> All the DRM GEM dma-buf import/export operations are done through the
> >> virtu
Add transparent LVDS decoder driver.
A transparent LVDS decoder is a DRM bridge device that does not require
any configuration and converts LVDS input to digital CMOS/TTL parallel
data output.
Signed-off-by: Jacopo Mondi
---
drivers/gpu/drm/bridge/Kconfig| 8 +++
drivers/gpu/drm/bridg
Remove chunk splitting in tinydrm_spi_transfer in tinydrm-helpers as the spi
core will split
a buffer into max_dma_len chunks for the spi controller driver to handle,
automatic byte
swapping in tinydrm_spi_transfer as it doesn't have users.
Signed-off-by: Meghana Madhyastha
---
drivers/gpu/drm
Split spi messages into chunks of <65535 in the spi subsystem and remove the
message
length warning in bcm2835_spi_can_dma. This is so that the messages can be
transferred
via dma and that the tinydrm drivers need not split it.
Signed-off-by: Meghana Madhyastha
---
drivers/spi/spi-bcm2835.c |
-Call spi_split_transfers_maxsize in __spi_pump_messages
to split large chunks for spi dma transfers.
-Remove chunk splitting in the tinydrm spi helper (as now the core is
handling the chunk splitting).
Changes in v2:
-Change the order of the two patches in the patchset.
-Undo the spurious blank l
Good to have an example how to use HMM with an upstream driver.
Am 10.03.2018 um 04:21 schrieb jgli...@redhat.com:
This patchset adds SVM (Share Virtual Memory) using HMM (Heterogeneous
Memory Management) to the nouveau driver. SVM means that GPU threads
spawn by GPU driver for a specific user p
https://bugs.freedesktop.org/show_bug.cgi?id=104717
Gregor Münch changed:
What|Removed |Added
Status|RESOLVED|VERIFIED
--- Comment #5 from Gregor Münc
https://bugs.freedesktop.org/show_bug.cgi?id=100289
--- Comment #18 from Michel Dänzer ---
(In reply to OmegaPhil from comment #17)
> The current state is good enough for me - you could counter and say that there
> should be no disconnect event in the first place, [...]
AFAIK that's up to the mo
https://bugs.freedesktop.org/show_bug.cgi?id=105426
i...@yahoo.com changed:
What|Removed |Added
Component|Drivers/Gallium/r600|glsl-compiler
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You are receiving thi
https://bugs.freedesktop.org/show_bug.cgi?id=105426
--- Comment #3 from i...@yahoo.com ---
Created attachment 137961
--> https://bugs.freedesktop.org/attachment.cgi?id=137961&action=edit
terminal log of "MESA_GLSL=dump R600_DEBUG=nosb,vs,ps wine steam.exe"
I'm attaching full log created with
"M
https://bugs.freedesktop.org/show_bug.cgi?id=105051
--- Comment #5 from bugzi...@colorremedies.com ---
Still happens in 4.16.0-0.rc4.git3.1.fc29.x86_64 which is git 1b88accf6a65.
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