tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.19-wip
head: 69c20a808c86d7fd6cd64a9c8cc6b024a88c45fa
commit: fcad2435f489c3510cc95f6a38ff7db2f6292b6f [47/115] drm/amd/powerplay:
Set higher SCLK&MCLK frequency than dpm7 in OD
config: x86_64-randconfig-s2-06141023 (attached as .c
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #6 from Wolfram Sang (w...@the-dreams.de) ---
So, I really posted the patches now. Sorry, I got side-tracked.
They can be found here:
http://patchwork.ozlabs.org/patch/929185/
http://patchwork.ozlabs.org/patch/929186/
I set you on C
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #5 from Wolfram Sang (w...@the-dreams.de) ---
Sure. But reading the original description above, I think the default use case
is to not use hw_i2c. It was just added to try to work around the regression.
And that led to another bug. Or
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.19-wip
head: 69c20a808c86d7fd6cd64a9c8cc6b024a88c45fa
commit: b55f236b433d63a5c4c90c5a40c9694eb5cbff34 [110/115] drm/amdgpu: fix
documentation of amdgpu_mn.c v2
reproduce: make htmldocs
All warnings (new ones prefixed by >>):
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: efd7788c4a440020f2c14a080275859935759af2
commit: ad1a77f3d449b086b26428f0fc4f8ad7e7481b4a [610/619] drm/amdgpu: Update
function level documentation for GPUVM v3
reproduce: make htmldocs
All warnings (new ones prefi
Hi Maruthi,
FYI, the error/warning still remains.
tree: git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head: efd7788c4a440020f2c14a080275859935759af2
commit: 2a6630b1095609b26a205b7c537594f3cde99c0a [114/619] ASoC: AMD: enable
ACP3x drivers build
config: sparc64-allyescon
On Mon, May 28, 2018 at 6:50 PM Kevin Brace wrote:
>
> > Well done on getting this far. Merging this is definitely going to be
> > non-trivial. Being out of tree for so long means you've ended up in a
> > place that will require retracing a bunch of steps to get upstream.
> >
>
> Just to clarify w
On 2018-06-13 09:44, Jordan Crouse wrote:
On Tue, Jun 12, 2018 at 06:17:47PM -0700, Jeykumar Sankaran wrote:
Switch to state based resource management. This patch
overhauls the resource manager and HW allocation methods by
maintaining the global resource pool and allocated hw
blocks in respectiv
On 2018-06-13 09:29, Jordan Crouse wrote:
On Tue, Jun 12, 2018 at 06:17:44PM -0700, Jeykumar Sankaran wrote:
Subclass drm private state for DPU for handling driver
specific data. Adds atomic private object and private object
lock to dpu kms. Provides helper function to retrieve DPU
private data
On Mon, Jun 4, 2018 at 5:11 AM, Michel Dänzer wrote:
>
> Adding dri-devel.
>
Any opinions?
Alex
>
> On 2018-06-01 08:03 PM, Alex Deucher wrote:
>> Use chapter rather than section to align with the rst markup.
>>
>> Signed-off-by: Alex Deucher
>> ---
>> Documentation/gpu/amdgpu.rst | 2 +-
>>
This is a note to let you know that I've just added the patch titled
x86/cpufeature: Remove cpu_has_clflush
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
x86-cpufeature-re
On Tue, Jun 12, 2018 at 06:17:47PM -0700, Jeykumar Sankaran wrote:
> Switch to state based resource management. This patch
> overhauls the resource manager and HW allocation methods by
> maintaining the global resource pool and allocated hw
> blocks in respective drm component states.
>
> Global r
On Tue, Jun 12, 2018 at 06:17:44PM -0700, Jeykumar Sankaran wrote:
> Subclass drm private state for DPU for handling driver
> specific data. Adds atomic private object and private object
> lock to dpu kms. Provides helper function to retrieve DPU
> private data from current atomic state.
>
> Signe
On Wednesday, June 13, 2018 05:45:48 PM Ard Biesheuvel wrote:
> On 18 May 2018 at 16:17, Sinan Kaya wrote:
> > A host bridge is allowed to remap BAR addresses using _TRA attribute in
> > _CRS windows.
> >
> > pci_bus :00: root bus resource [mem 0x8010010-0x8011fff window]
> > (bus add
https://bugs.freedesktop.org/show_bug.cgi?id=10
--- Comment #18 from udo ---
I think that, with two times 3 days of amdgpu-problem free uptime, we can say
that updates firmwares do fix this issue.
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On 08/05/18 08:04, Peter Ujfalusi wrote:
The default-on property - or the def_value via legacy pdata) should be
handled as:
if it is 1, the backlight must be enabled (kept enabled)
if it is 0, the backlight must be disabled (kept disabled)
This only works for the case when default-on is set. If
On Wed, Jun 13, 2018 at 5:08 AM, Sandeep Panda wrote:
> Document the bindings used for the sn65dsi86 DSI to eDP bridge.
>
> Changes in v1:
> - Rephrase the dt-binding descriptions to be more inline with existing
>bindings (Andrzej Hajda).
> - Add missing dt-binding that are parsed by corresp
On 13.06.2018 15:08, Maciej Purski wrote:
> Hi Andrzej,
>
> On 06/08/2018 08:04 AM, Andrzej Hajda wrote:
>> There is no need to flip reset pin twice. Also delays can be changed to
>> values present in vendor's code.
>>
>> Signed-off-by: Andrzej Hajda
> Reviewed-by: Maciej Purski
Finally, thanks
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #4 from Alex Deucher (alexdeuc...@gmail.com) ---
hw_i2c doesn't use bit banging, it uses the hw i2c engine.
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On 06/13/2018 03:10 PM, Peter Zijlstra wrote:
On Wed, Jun 13, 2018 at 12:40:29PM +0200, Thomas Hellstrom wrote:
On 06/13/2018 11:50 AM, Peter Zijlstra wrote:
+
+ lockdep_assert_held(&lock->wait_lock);
+
+ if (owner && hold_ctx && __ww_ctx_stamp_after(hold_ctx, ww_ctx) &&
+
https://bugzilla.kernel.org/show_bug.cgi?id=198713
--- Comment #9 from Jon (j...@moozaad.co.uk) ---
Created attachment 276531
--> https://bugzilla.kernel.org/attachment.cgi?id=276531&action=edit
dmesg for kernel 4.17 showing warnings with traces
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https://bugzilla.kernel.org/show_bug.cgi?id=198713
--- Comment #8 from Jon (j...@moozaad.co.uk) ---
Updated to 4.17 as per (indirect) request :)
Linux mudkip.farm 4.17.1-6-default #1 SMP PREEMPT Tue Jun 12 09:55:31 UTC 2018
(e721478) x86_64 x86_64 x86_64 GNU/Linux
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You are receiving this mai
On Wed, Jun 13, 2018 at 9:38 AM, Stefan Agner wrote:
> It seems to me a rather extreme measure though, given we could fix the
> situation rather easily.
There are dtb's using the fbdev mxsfb driver like for example:
arch/arm/boot/dts/imx28-evk.dts
If we kill the fbdev mxsfb driver then the disp
https://bugzilla.kernel.org/show_bug.cgi?id=198713
--- Comment #7 from Andrey Grodzovsky (andrey.grodzov...@amd.com) ---
Well, the dmesg attached is also from 4.15 kernel so I assumed it's all 4.15.
Anyway, I will Harry from our Display team to take a look at this.
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On Wed, Jun 13, 2018 at 12:40:29PM +0200, Thomas Hellstrom wrote:
> On 06/13/2018 11:50 AM, Peter Zijlstra wrote:
> >
> > > +
> > > + lockdep_assert_held(&lock->wait_lock);
> > > +
> > > + if (owner && hold_ctx && __ww_ctx_stamp_after(hold_ctx, ww_ctx) &&
> > > + ww_ctx->acquired > 0) {
> > >
[adding Sascha and Bartlomiej]
On 13.06.2018 09:17, Marek Vasut wrote:
> On 06/13/2018 09:16 AM, Stefan Agner wrote:
>> On 13.06.2018 01:08, Marek Vasut wrote:
>>> On 06/12/2018 06:01 PM, Fabio Estevam wrote:
On Tue, Jun 12, 2018 at 11:35 AM, Stefan Agner wrote:
> There are two driv
https://bugs.freedesktop.org/show_bug.cgi?id=105145
--- Comment #13 from k.phil...@gmail.com ---
(In reply to Christian König from comment #12)
> Unfortunately yes it is.
That is indeed very unfortunate. It complicates stuff a lot :-(
I'd still like to see a solution that allows to support PAFF wi
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #3 from cerg2010cerg2...@mail.ru ---
I did some more research and it turns out that 2) happens if I change
brightness level right after X starts, even in 4.15 kernel. If I wait a bit,
everything works good, including 4.17.1. Software I
On 06/13/2018 11:50 AM, Peter Zijlstra wrote:
+
+ lockdep_assert_held(&lock->wait_lock);
+
+ if (owner && hold_ctx && __ww_ctx_stamp_after(hold_ctx, ww_ctx) &&
+ ww_ctx->acquired > 0) {
+ WRITE_ONCE(hold_ctx->wounded, true);
+ if (owner != curre
Hi Liviu,
On Tue, Jun 12, 2018 at 02:52:33PM +0100, Liviu Dudau wrote:
Due to the fact that writeback connectors behave in a special way
in DRM (they always report being disconnected) we might confuse some
userspace. Add a client capability for writeback connectors that will
filter them out for
/me wonders what's up with partial Cc's today..
On Wed, Jun 13, 2018 at 09:47:44AM +0200, Thomas Hellstrom wrote:
> The current Wound-Wait mutex algorithm is actually not Wound-Wait but
> Wait-Die. Implement also Wound-Wait as a per-ww-class choice. Wound-Wait
> is, contrary to Wait-Die a preempt
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #2 from Wolfram Sang (w...@the-dreams.de) ---
Okay, these are actually two bug reports meanwhile:
1) 3e5f06bed72fe72166a6778f630241a893f67799 causes a regression when
bit-banging I2C in software and results in keeping the screen black
Hi, Stu:
On Wed, 2018-06-13 at 16:58 +0800, Stu Hsieh wrote:
> Hi, CK:
>
> On Wed, 2018-06-13 at 16:14 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Wed, 2018-06-13 at 16:01 +0800, Stu Hsieh wrote:
> > > Hi, CK:
> > >
> > >
> > > On Wed, 2018-06-13 at 15:13 +0800, CK Hu wrote:
> > > > Hi, Stu:
>
Hi, CK:
On Wed, 2018-06-13 at 16:14 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Wed, 2018-06-13 at 16:01 +0800, Stu Hsieh wrote:
> > Hi, CK:
> >
> >
> > On Wed, 2018-06-13 at 15:13 +0800, CK Hu wrote:
> > > Hi, Stu:
> > >
> > > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > > This patch a
Hi, CK:
On Wed, 2018-06-13 at 16:27 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Wed, 2018-06-13 at 15:56 +0800, Stu Hsieh wrote:
> > Hi, CK:
> >
> > On Wed, 2018-06-13 at 14:13 +0800, CK Hu wrote:
> > > Hi, Stu:
> > >
> > > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > > This patch add th
Hi, CK:
On Wed, 2018-06-13 at 16:05 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Wed, 2018-06-13 at 15:46 +0800, Stu Hsieh wrote:
> > Hi, CK:
> >
> > On Wed, 2018-06-13 at 13:45 +0800, CK Hu wrote:
> > > Hi, Stu:
> > >
> > > Two inline comment.
> > >
> > > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh
On 06/13/2018 09:54 AM, Greg Kroah-Hartman wrote:
On Wed, Jun 13, 2018 at 09:47:44AM +0200, Thomas Hellstrom wrote:
-
+The algorithm (Wait-Die vs Wound-Wait) is chosen using the _is_wait_die
+argument to DEFINE_WW_CLASS(). As a rough rule of thumb, use Wound-Wait iff you
+typically exp
Hi, Stu:
On Wed, 2018-06-13 at 15:56 +0800, Stu Hsieh wrote:
> Hi, CK:
>
> On Wed, 2018-06-13 at 14:13 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > This patch add the connection from RDMA1 to DPI1
> > >
> > > Signed-off-by: Stu Hsieh
> > >
Hi Jani,
The end goal was already achieve by the advice you gave the
DRM_DP_AUX_CHARDEV.I just like to extend my knowledge into DRM such as a
scenario having a kernel version that doesn't have the DRM_DP_AUX_CHARDEV yet.
Would it possible to implement specific DRM_DP_AUX_CHARDEV to it.
Thanks,J
This reverts commit 2c17a4368aad2b88b68e4390c819e226cf320f70.
The offending commit triggers a run-time fault when accessing the panel
element of the sun4i_tcon structure when no such panel is attached.
It was apparently assumed in said commit that a panel is always used with
the TCON. Although it
Hi, Stu:
On Wed, 2018-06-13 at 16:01 +0800, Stu Hsieh wrote:
> Hi, CK:
>
>
> On Wed, 2018-06-13 at 15:13 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > This patch add the connection from RDMA2 to DPI1
> > >
> > > Signed-off-by: Stu Hsieh
> >
https://bugzilla.kernel.org/show_bug.cgi?id=200045
--- Comment #1 from cerg2010cerg2...@mail.ru ---
Ok, actually this is 4.17 issue; on 4.16 hw_i2c=1 fixes the issue completely,
but on 4.17 changing backlight in Xorg (using keys) causes a reboot, fbcon
works fine though.
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https://bugzilla.kernel.org/show_bug.cgi?id=200045
cerg2010cerg2...@mail.ru changed:
What|Removed |Added
Summary|i2c-algo-bit: black screen |black screen on 'radeon'
Hi, CK:
On Wed, 2018-06-13 at 15:35 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > This patch add components DPI1/DSI1/DSI2/DSI3 in comp_init.
> > Because the some parameter for these components initialized
> > in their driver.
> >
> > Signed-off-by: S
Hi, Stu:
On Wed, 2018-06-13 at 15:46 +0800, Stu Hsieh wrote:
> Hi, CK:
>
> On Wed, 2018-06-13 at 13:45 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > Two inline comment.
> >
> > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > This patch add the connection from RDMA0 to DSI3
> > >
> > > Sig
On Wed, Jun 13, 2018 at 3:46 PM, Maxime Ripard
wrote:
> On Tue, Jun 12, 2018 at 10:00:23PM +0200, Jernej Skrabec wrote:
>> TV TCONs are always connected to TV or HDMI encoder, so it doesn't make
>> sense to check if panel or bridge is connected to them.
>>
>> Check if TCON has channel 0 and only t
Hi, CK:
On Wed, 2018-06-13 at 15:13 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > This patch add the connection from RDMA2 to DPI1
> >
> > Signed-off-by: Stu Hsieh
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 8
> > 1 file changed,
Hi, CK:
On Wed, 2018-06-13 at 14:13 +0800, CK Hu wrote:
> Hi, Stu:
>
> On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > This patch add the connection from RDMA1 to DPI1
> >
> > Signed-off-by: Stu Hsieh
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 8
> > 1 file changed,
On Wed, Jun 13, 2018 at 09:47:44AM +0200, Thomas Hellstrom wrote:
> -
>
> +The algorithm (Wait-Die vs Wound-Wait) is chosen using the _is_wait_die
> +argument to DEFINE_WW_CLASS(). As a rough rule of thumb, use Wound-Wait iff
> you
> +typically expect the number of simultaneous competing tr
The current Wound-Wait mutex algorithm is actually not Wound-Wait but
Wait-Die. Implement also Wound-Wait as a per-ww-class choice. Wound-Wait
is, contrary to Wait-Die a preemptive algorithm and is known to generate
fewer backoffs. Testing reveals that this is true if the
number of simultaneous con
For modeset locks we don't expect a high number of contending
transactions so change algorithm from Wait-Die to Wound-Wait.
Signed-off-by: Thomas Hellstrom
---
drivers/gpu/drm/drm_modeset_lock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_modeset_lock.
This is a small fallout from a work to allow batching WW mutex locks and
unlocks.
Our Wound-Wait mutexes actually don't use the Wound-Wait algorithm but
the Wait-Die algorithm. One could perhaps rename those mutexes tree-wide to
"Wait-Die mutexes" or "Deadlock Avoidance mutexes". Another approach
Hi, Stu:
On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> This patch add support for the Mediatek MT2712 DISP subsystem.
> There are two OVL engine and three disp output in MT2712.
>
> Signed-off-by: Stu Hsieh
Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 39
> +++
On Tue, Jun 12, 2018 at 10:00:23PM +0200, Jernej Skrabec wrote:
> TV TCONs are always connected to TV or HDMI encoder, so it doesn't make
> sense to check if panel or bridge is connected to them.
>
> Check if TCON has channel 0 and only then check for connected panel or
> bridges.
>
> Signed-off-
Hi, CK:
On Wed, 2018-06-13 at 13:45 +0800, CK Hu wrote:
> Hi, Stu:
>
> Two inline comment.
>
> On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > This patch add the connection from RDMA0 to DSI3
> >
> > Signed-off-by: Stu Hsieh
> > ---
> > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4
On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> This patch create third crtc by third ddp path
>
> Signed-off-by: Stu Hsieh
Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +++
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 5 +
> drivers/gpu/drm/mediatek/mtk_drm
On Tue, Jun 12, 2018 at 10:00:33PM +0200, Jernej Skrabec wrote:
> Function is useful when drm_of_find_possible_crtcs() can't be used and
> custom parsing is needed. This can happen for example when there is a
> node with multiple muxes between crtc and encoder.
>
> Signed-off-by: Jernej Skrabec
>
Hi, Stu:
On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> This patch add components DPI1/DSI1/DSI2/DSI3 in comp_init.
> Because the some parameter for these components initialized
> in their driver.
>
> Signed-off-by: Stu Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 4
>
Hi,
Thanks for working on this!
On Tue, Jun 12, 2018 at 10:00:13PM +0200, Jernej Skrabec wrote:
> TCON TOP main purpose is to configure whole display pipeline. It
> determines relationships between mixers and TCONs, selects source TCON
> for HDMI, muxes LCD and TV encoder GPIO output, selects TV
LVDS and RGB interfaces are always connected to TCONs which have channel
0. It doesn't make sense to try to init them on TV TCONs.
Add a check if TCON has channel 0 before trying to init LVDS or RGB
interface.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 32 +++
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
diff --git a/include/xen/mem-reservation.h b/include/xen/mem-reservation.h
new file mode 100644
index ..e0939387278d
--- /dev/null
+++ b/include/xen/mem-reservation.h
@@ -0,0 +1,64 @@
+/* SPDX-L
TV TCONs connected to TCON TOP have to enable additional gate in order
to work.
Add support for such TCONs.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 11 +++
drivers/gpu/drm/sun4i/sun4i_tcon.h | 4
2 files changed, 15 insertions(+)
diff --git a/driver
drm_of_find_possible_crtcs() doesn't work when DW HDMI encoder is
connected to TCON (crtc) through mux in TCON TOP.
In that case TCON TOP HDMI mux input port has to be manually traversed
and checked if it matches any known crtc.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_h
DW HDMI PHY driver and PHY clock driver share same registers. Make sure
that DW HDMI PHY setup code doesn't change any clock related bits and
set them to 0 during initialization.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 +-
drivers/gpu/drm/sun4i/sun8i_hdmi_ph
Both mixers have similar capabilities as others SoCs with DE2.
First mixer has 1 VI and 3 UI planes and supports HW scaling on all
planes.
Second mixer has 1 VI and 1 UI planes and also supports HW scaling on
all planes.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2
Function is useful when drm_of_find_possible_crtcs() can't be used and
custom parsing is needed. This can happen for example when there is a
node with multiple muxes between crtc and encoder.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/drm_of.c | 4 ++--
include/drm/drm_of.h | 8 ++
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Extend grant table module API to allow allocating buffers that can
be used for DMA operations and mapping foreign grant references
on top of those.
The resulting buffer is similar to the one allocated by the
PHY is the same as in H3, except it can switch between two clock
parents.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
in
TV TCONs (channel 1 only) are always connected to TV or HDMI encoder.
Because of that, all output endpoints on such TCON node will point to a
encoder which is part of component framework.
Correct current graph traversing algorithm in such way that it doesn't
skip output enpoints with id 0 on TV TC
On 06/13/2018 04:38 AM, Boris Ostrovsky wrote:
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
This is in preparation for adding support of DMA buffer
functionality: make map/unmap related code and structures, used
privately by gntdev, ready for dma-buf e
A64 HDMI PHY is similar to H3 HDMI PHY except it has two possible PLL
clock parents. It is compatible to other HDMI PHYs, like that found in
R40.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(
TV TCONs are always connected to TV or HDMI encoder, so it doesn't make
sense to check if panel or bridge is connected to them.
Check if TCON has channel 0 and only then check for connected panel or
bridges.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 12 +---
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
static void gntdev_print_maps(struct gntdev_priv *priv,
@@ -121,8 +146,27 @@ static void gntdev_free_map(struct grant_map *map)
if (map == NULL)
return;
+#ifdef CONFIG_XEN_GRANT_DMA_ALLOC
+ if (map->d
Current DW HDMI PHY code never prepares and enables PHY clock after it is
created. It's just used as it is. This may work in some cases, but it's
clearly wrong. Fix it by adding proper calls to enable/disable PHY
clock.
Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant")
Signed
On 06/12/2018 06:01 PM, Fabio Estevam wrote:
> On Tue, Jun 12, 2018 at 11:35 AM, Stefan Agner wrote:
>
>> There are two drivers for the LCDIF/MXSFB peripheral. If the DRM
>> and fbdev are compiled in, the registration of the second driver
>> fails:
>> mxs-dma 3300.dma-apbh: initialized
>>
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
This is in preparation for adding support of DMA buffer
functionality: make map/unmap related code and structures, used
privately by gntdev, ready for dma-buf extension, which will re-use
these. Rename corres
On 06/13/2018 04:26 AM, Boris Ostrovsky wrote:
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
static void gntdev_print_maps(struct gntdev_priv *priv,
@@ -121,8 +146,27 @@ static void gntdev_free_map(struct grant_map *map)
if (map == NULL)
return;
+#ifdef CONFIG_X
On 06/13/2018 09:16 AM, Stefan Agner wrote:
> On 13.06.2018 01:08, Marek Vasut wrote:
>> On 06/12/2018 06:01 PM, Fabio Estevam wrote:
>>> On Tue, Jun 12, 2018 at 11:35 AM, Stefan Agner wrote:
>>>
There are two drivers for the LCDIF/MXSFB peripheral. If the DRM
and fbdev are compiled in,
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
One more thing: please add a comment here saying that frames array is
array of PFNs (in Xen granularity), which is what
XENMEM_populate_physmap requires. And remove (or update to name the
actual call you are making) the corresponding c
On 06/12/2018 09:42 AM, Oleksandr Andrushchenko wrote:
int gntdev_dmabuf_imp_release(struct gntdev_dmabuf_priv *priv, u32 fd)
{
- return -EINVAL;
+ struct gntdev_dmabuf *gntdev_dmabuf;
+ struct dma_buf_attachment *attach;
+ struct dma_buf *dma_buf;
+
+ gntdev_
Add all entries needed for HDMI to function properly.
Since R40 has highly configurable pipeline, both mixers and both TCON
TVs are added. Board specific DT should then connect them together
trough TCON TOP muxers to best fit the purpose of the board.
Signed-off-by: Jernej Skrabec
---
arch/arm/
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
1. Create a dma-buf from grant references provided by the foreign
domain. By default dma-buf is backed by system memory pages, but
by providing GNTDEV_DMA_FLAG_XXX flags it can also be created
as
Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
between two clock parents.
Add code which reads second PLL from DT.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 ++
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 20 +++-
2 files cha
TCON description is expanded with R40 TV TCON compatibles. TV TCONs,
which are connected to TCON TOP muxes, such as those on R40 SoC, also
needs additional clock gate to be specified.
Signed-off-by: Jernej Skrabec
---
.../devicetree/bindings/display/sunxi/sun4i-drm.txt | 5 -
1 file
Expand HDMI PHY clock driver to support second clock parent.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 4 +-
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 3 +-
drivers/gpu/drm/sun4i/sun8i_hdmi_phy_clk.c | 90 --
3 files changed, 73 inser
Video PLLs need to be referenced in R40 DT as possible HDMI PHY parent.
Export them.
Reviewed-by: Rob Herring
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.h | 8 ++--
include/dt-bindings/clock/sun8i-r40-ccu.h | 4
2 files changed, 10 insertions(+), 2 delet
Hi Heiko,
On 12/06/18 13:15, Heiko Stuebner wrote:
> From: Sandy Huang
>
> The vop irq is shared between vop and iommu and irq probing in the
> iommu driver moved to the probe function recently. This can in some
> cases lead to a stall if the irq is triggered while the vop driver
> still has it
Current "old" method to find engine worked pretty well for DE2. However,
it doesn't work when TCON TOP is between mixer (engine) and TCON. TCON
TOP has multiple input ports, but current engine search algorithm
expects only one.
This can be fixed by first looking for output port id and selecting
m
sun4i_drv_add_endpoints() has a memory leak since it uses of_node_put()
when remote is equal to NULL and does nothing when remote has a valid
pointer.
Invert the logic to fix memory leak.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
1 file changed, 2 insertions(+
R40 TV TCON is similar to the A83T TV TCON, except that it needs
additional gate to be enabled.
Add support for it.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu/dr
TCON TOP main purpose is to configure whole display pipeline. It
determines relationships between mixers and TCONs, selects source TCON
for HDMI, muxes LCD and TV encoder GPIO output, selects TV encoder
clock source and contains additional TV TCON and DSI gates.
Signed-off-by: Jernej Skrabec
---
Until now, each node has one input port and one output port. However,
with TCON TOP this is no longer true. It has 3 input and 3 output ports.
In order to prepare to this situation, split out the code which checks
all endpoints in input port and adds available components to fifo.
This patch doesn
Display related peripherals need precise clocks to operate correctly.
Allow DE2, TCONs and HDMI to set parent clock.
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu-sun8i-r40.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-s
On 06/13/2018 03:47 AM, Boris Ostrovsky wrote:
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
diff --git a/include/xen/mem-reservation.h
b/include/xen/mem-reservation.h
new file mode 100644
index ..e0939387278d
--- /dev/null
+++ b/include/
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
diff --git a/drivers/xen/gntdev.c b/drivers/xen/gntdev.c
index a09db23e9663..e82660d81d7e 100644
--- a/drivers/xen/gntdev.c
+++ b/drivers/xen/gntdev.c
@@ -48,6 +48,9 @@
#include
#include "gntdev-common.h"
+#ifdef CONFIG_XEN_GNTDEV
This series adds support for R40 HDMI pipeline. It is a bit special
than other already supported pipelines because it has additional unit
called TCON TOP responsible for relationship configuration between
mixers, TCONs and HDMI. Additionally, it has additional gates for DSI
and TV TCONs, TV encoder
TCON TOP is different from other nodes in graph by having 3 input and 3
output ports. Additionally, connection to TV TCON might lead back to
HDMI mux input port, creating loops.
Add support for traversing such graph.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 24 +
R40 DE2 mixers are similar to those found in A83T, except it needs
different clock settings.
Add a compatibles for them.
Signed-off-by: Jernej Skrabec
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree
On 06/13/2018 04:07 AM, Boris Ostrovsky wrote:
On 06/12/2018 09:41 AM, Oleksandr Andrushchenko wrote:
One more thing: please add a comment here saying that frames array is
array of PFNs (in Xen granularity), which is what
XENMEM_populate_physmap requires. And remove (or update to name the
As already described in DT binding, TCON TOP is responsible for
configuring display pipeline. In this initial driver focus is on HDMI
pipeline, so TVE and LCD configuration is not implemented.
Implemented features:
- HDMI source selection
- clock driver (TCON and DSI gating)
- connecting mixers an
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