On Tue, Jul 3, 2018 at 9:03 AM, Noralf Trønnes wrote:
> This switches the CMA helper drivers that use its fbdev emulation over
> to the generic fbdev emulation. It's the first phase of using generic
> fbdev. A later phase will use DRM client callbacks for the
> lastclose/hotplug/remove callbacks.
https://bugzilla.kernel.org/show_bug.cgi?id=200869
--- Comment #1 from Janpieter Sollie (janpieter.sol...@dommel.be) ---
Small update:
When booting the module with the following parameters:
amdgpu si_support=0 gpu_recovery=1 dpm=1 dc=0
I still need to load/unload the module 3 times, but it works
2018년 08월 20일 18:00에 Andrzej Hajda 이(가) 쓴 글:
> On 17.08.2018 03:56, Inki Dae wrote:
>>
>> 2018년 08월 13일 20:17에 Andrzej Hajda 이(가) 쓴 글:
>>> On 07.08.2018 10:53, Inki Dae wrote:
2018년 07월 26일 00:46에 Andrzej Hajda 이(가) 쓴 글:
> From: Maciej Purski
>
> The current implementation assum
https://bugs.freedesktop.org/show_bug.cgi?id=107635
Bug ID: 107635
Summary: Internal display always be blank in mirror, extended
and built-in only display mode
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
https://bugs.freedesktop.org/show_bug.cgi?id=107623
--- Comment #3 from jian-h...@endlessm.com ---
Created attachment 141207
--> https://bugs.freedesktop.org/attachment.cgi?id=141207&action=edit
dmesg of boot into multi-user.target
If I boot system into "multi-user.target", then "systemctl susp
https://bugs.freedesktop.org/show_bug.cgi?id=107261
--- Comment #3 from Ian ---
Huh, I've discovered that I can only reproduce this on Wayland. Are you getting
these messages on X.org at all?
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https://bugs.freedesktop.org/show_bug.cgi?id=107581
--- Comment #7 from Timothy Arceri ---
(In reply to Benjamin Hodgetts from comment #6)
> I haven't tried force_glsl_extensions_warn, but
> MESA_GL_VERSION_OVERRIDE=4.5COMPAT doesn't help. It worked on older versions
> of the game, but has no pos
On Mon, 2018-08-20 at 22:47 +0200, Hans Verkuil wrote:
> On 08/20/2018 08:51 PM, Lyude Paul wrote:
> > On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> > > From: Hans Verkuil
> > >
> > > If aux->transfer == NULL, then just return without doing
> > > anything. In that case the function is
Currently, vkms needs VBlank to work well. This patch adds another
operation model that make vkms works without VBlank support.
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/vkms/vkms_crtc.c | 10 ++
drivers/gpu/drm/vkms/vkms_drv.c | 12 ++--
drivers/gpu/drm/vkms/vkms_drv.
Hi Jacopo,
On Tuesday, 21 August 2018 00:49:41 EEST Laurent Pinchart wrote:
> From: Jacopo Mondi
>
> DU channels not equipped with a DPLL use an SoC internal (provided by
> the CPG) or external clock source combined with a DU internal divider to
> generate the desired output dot clock frequency.
From: Jacopo Mondi
DU channels not equipped with a DPLL use an SoC internal (provided by
the CPG) or external clock source combined with a DU internal divider to
generate the desired output dot clock frequency.
The current clock selection procedure does not fully exploit the ability
of external
Hi, thanks for the patch. Perhaps can get rid of vmw_kms_resume
and vmw_kms_suspend, otherwise looks good to me.
>
> convert drm_atomic_helper_suspend/resume() to use
> drm_mode_config_helper_suspend/resume().
>
> suspend_state can be removed from vmw_private as
> it will not be used anymore.
>
Looks good to me based on my limited understanding. Thomas/Sinclair can
could you please review and then we can include this in drm-fixes.
Thanks,
Deepak
>
> arg.version is indirectly controlled by user-space, hence leading to
> a potential exploitation of the Spectre variant 1 vulnerability.
>
On Mon, 2018-08-20 at 22:43 +0200, Hans Verkuil wrote:
> On 08/20/2018 08:59 PM, Lyude Paul wrote:
> > Reviewed-by: Lyude Paul
> >
> > We really need to add support for using this into the MST helpers. A good
> > way to
> > test this would probably be to hook up an aux device to the DP AUX adapte
On 08/20/2018 08:51 PM, Lyude Paul wrote:
> On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
>> From: Hans Verkuil
>>
>> If aux->transfer == NULL, then just return without doing
>> anything. In that case the function is likely called for
>> a non-(e)DP connector.
>>
>> This never happened fo
On 08/20/2018 08:59 PM, Lyude Paul wrote:
> Reviewed-by: Lyude Paul
>
> We really need to add support for using this into the MST helpers. A good way
> to
> test this would probably be to hook up an aux device to the DP AUX adapters we
> create for each MST topology
If you are interested, I hav
Hi Jacopo,
Thank you for the patch.
On Monday, 20 August 2018 18:26:17 EEST Jacopo Mondi wrote:
> From: Jacopo Mondi
>
> DU channels not equipped with a DPLL use an internal (aka SoC provided) or
I'd say "SoC internal (provided by the CPG)"
> external clock source combined with an internal di
Reviewed-by: Lyude Paul
We really need to add support for using this into the MST helpers. A good way to
test this would probably be to hook up an aux device to the DP AUX adapters we
create for each MST topology
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> W
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> Add DisplayPort CEC-Tunneling-over-AUX support to nouveau.
>
> Signed-off-by: Hans Verkuil
> ---
> drivers/gpu/drm/nouveau/nouveau_connector.c | 17 +++--
> 1 file changed, 15 insertions(+), 2 deletions
Reviewed-by: Lyude Paul
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> A big problem with DP CEC-Tunneling-over-AUX is that it is tricky
> to find adapters with a chipset that supports this AND where the
> manufacturer actually connected the HDMI CEC line to the
On Fri, 2018-08-17 at 16:11 +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> If aux->transfer == NULL, then just return without doing
> anything. In that case the function is likely called for
> a non-(e)DP connector.
>
> This never happened for the i915 driver, but the nouveau and amdgpu
> d
https://bugzilla.kernel.org/show_bug.cgi?id=200869
Bug ID: 200869
Summary: UVD cause amdgpu crash on CIK: [amdgpu]] UVD not
responding, trying to reset the VCPU
Product: Drivers
Version: 2.5
Kernel Version: 4.17.17
Hard
https://bugs.freedesktop.org/show_bug.cgi?id=107482
--- Comment #9 from Leo Li ---
Michel's right about xgamma leaving 0 and max per-channel values unmodified, so
the original issue is not-a-bug. Although I'm not sure why there's a difference
between amdgpu and dc, I'll have to look into it.
--
https://bugs.freedesktop.org/show_bug.cgi?id=107627
Vibol changed:
What|Removed |Added
Hardware|Other |x86-64 (AMD64)
OS|All
https://bugs.freedesktop.org/show_bug.cgi?id=107627
Bug ID: 107627
Summary: Freedesktop runtime version 18.08 Mesa cached shaders
result in crashes
Product: Mesa
Version: 18.1
Hardware: Other
OS: All
https://bugs.freedesktop.org/show_bug.cgi?id=107545
--- Comment #5 from Julien Isorce ---
Extract of the 2 attached cs dumps:
User space so before ioctl radeon_cs_ioctl:
0x0290
0x
0xC0016900
0x02A1
Kernel space so in radeon_cs_ioctl:
0x0290
0x000b
0x
0x02a1
Hi Dmitry,
I love your patch! Yet something to improve:
[auto build test ERROR on tegra-drm/drm/tegra/for-next]
[also build test ERROR on v4.18 next-20180820]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
https://bugs.freedesktop.org/show_bug.cgi?id=107545
--- Comment #4 from Julien Isorce ---
Created attachment 141204
--> https://bugs.freedesktop.org/attachment.cgi?id=141204&action=edit
cs_dum_kernel_space.txt
Packet0 not allowed!.
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https://bugs.freedesktop.org/show_bug.cgi?id=107545
--- Comment #3 from Julien Isorce ---
Created attachment 141203
--> https://bugs.freedesktop.org/attachment.cgi?id=141203&action=edit
cs_dump_user_space.txt
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https://bugs.freedesktop.org/show_bug.cgi?id=107545
Julien Isorce changed:
What|Removed |Added
Attachment #141084|0 |1
is obsolete|
I've been experiencing a rather strange looking bug on the P50 I've got
for work. After a number of reboots, nouveau will fail to initialize the
dedicated GPU on the system at boot properly. Things start off with
this disp mthd failure:
...
[2.088505] nouveau :01:00.0: disp: outp 04:0006:0
This series fixes some intermittent issues with bringing up the
dedicated GM107 GPU that I've been observing on my ThinkPad P50. More
details within.
Lyude Paul (2):
drm/nouveau: Fix GM107 disp core chan init on ThinkPad P50
drm/nouveau: Fix GM107 disp dmac chan init on ThinkPad P50
.../drm/
Just like how the P50 will occasionally leave the disp's core channel on
before nouveau starts initializing, it will occasionally do the same
thing with the rest of the dmac channel in addition to the core channel.
Example:
[1.604375] nouveau :01:00.0: disp: outp 04:0006:0f81: no heads (0
https://bugs.freedesktop.org/show_bug.cgi?id=107607
--- Comment #1 from Paul Menzel ---
Created attachment 141201
--> https://bugs.freedesktop.org/attachment.cgi?id=141201&action=edit
Linux 4.18+ messages with drm.debug=0xe
Here is a verbose log. I believe it’s related to DP 1.2 and the MST De
https://bugs.freedesktop.org/show_bug.cgi?id=107607
Paul Menzel changed:
What|Removed |Added
CC||pmenzel+bugs.freedesktop@mo
On 20.08.2018 17:26, Guenter Roeck wrote:
> On Mon, Aug 20, 2018 at 8:15 AM Andrzej Hajda wrote:
>> On 15.08.2018 21:49, Sean Paul wrote:
>>> From: Guenter Roeck
>>>
>>> 0day reports:
>>>
> drivers/gpu/drm/bridge/ti-sn65dsi86.o: In function
>>> `ti_sn_bridge_remove':
> drivers/gpu/drm/bri
Hi Kieran,
Thank you for the patch.
On Monday, 20 August 2018 19:00:44 EEST Kieran Bingham wrote:
> Upcoming implementations of the R-Car DU have removed support for
> interlaced display pipelines. Provide a means to determine this based on
> the feature flags of the hardware configuration struct
Hi Kieran,
Thank you for the patch.
On Monday, 20 August 2018 19:00:43 EEST Kieran Bingham wrote:
> These flags are represented by bit fields. To make this clear, utilise
> the BIT() macro.
>
> Signed-off-by: Kieran Bingham
Reviewed-by: Laurent Pinchart
> ---
> This patch fails checkpatch's
These flags are represented by bit fields. To make this clear, utilise
the BIT() macro.
Signed-off-by: Kieran Bingham
---
This patch fails checkpatch's 80-char limit, due to the line comments
extending across the 80-char boundary on RCAR_DU_FEATURE_EXT_CTRL_REGS
To preserve formatting - this wa
Upcoming implementations of the R-Car DU have removed support for
interlaced display pipelines. Provide a means to determine this based on
the feature flags of the hardware configuration structs.
Signed-off-by: Kieran Bingham
---
This could be a feature to designate that there is no interlaced
The R-Car DU on the D3 and E3 does not support interlaced pipelines,
thus we need to have a means to reject interlaced configurations on
those platoforms.
Provide a new feature flag, and add that flag to all existing devices
which currently support interlaced pipelines.
When D3 and E3 support is
https://bugs.freedesktop.org/show_bug.cgi?id=107482
--- Comment #8 from Michel Dänzer ---
Leo, any ideas what's going on here?
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https://bugzilla.kernel.org/show_bug.cgi?id=200605
--- Comment #5 from Michel Dänzer (mic...@daenzer.net) ---
(In reply to richts from comment #4)
> In the meantime I'm at 4.18.1 and the problem never happened since then.
Glad to hear that! Can you resolve this report accordingly? Thanks.
--
Yo
On 15.08.2018 21:49, Sean Paul wrote:
> From: Guenter Roeck
>
> 0day reports:
>
>>> drivers/gpu/drm/bridge/ti-sn65dsi86.o: In function
> `ti_sn_bridge_remove':
>>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:629: undefined reference to
> `mipi_dsi_detach'
>>> drivers/gpu/drm/bridge/ti-sn65dsi86.c:630: u
https://bugs.freedesktop.org/show_bug.cgi?id=105251
--- Comment #18 from Andrey Grodzovsky ---
(In reply to CheatCodesOfLife from comment #17)
> (In reply to Andrey Grodzovsky from comment #16)
> > Hi everyone, I've tried with latest kernel and latest VEGA10 firmware and
> > wasn't able to reprod
于 2018年8月20日 GMT+08:00 下午7:52:44, Maxime Ripard 写到:
>Hi!
>
>On Wed, Aug 15, 2018 at 08:07:45PM +0800, Icenowy Zheng wrote:
>> The glue in sun4i-drm of dw-hdmi currently doesn't set the clocks of
>> dw-hdmi exclusively, which will lead the display fails to initialize
>in
>> some situations.
>
>Ap
This patch adds the v1.2.12 binary firmware for Cadence MHDP8546 DP bridge.
Damian Kos (1):
linux-firmware: add firmware for mhdp8546
LICENCE.cadence | 63 +++
WHENCE | 9 +++
cadence/mhdp8546.bin | Bin 0 -> 131072 bytes
3 file
Host1x is getting attached to an implicit IOMMU DMA domain if
CONFIG_ARM_DMA_USE_IOMMU=y. Since Host1x driver manages IOMMU by
itself, Host1x device must be detached from the implicit domain using
arch-specific IOMMU-API. Note that this works only for arm32 and not
for arm64, which will remain brok
Host1x is getting attached to an implicit IOMMU DMA domain if
CONFIG_ARM_DMA_USE_IOMMU=y. Since Host1x driver manages IOMMU by
itself, Host1x device must be detached from the implicit domain using
arch-specific IOMMU-API. Note that this works only for arm32 and not
for arm64, which will remain brok
All Tegra DRM devices are getting attached to an implicit IOMMU DMA
domain if CONFIG_ARM_DMA_USE_IOMMU=y. Since Tegra DRM driver manages IOMMU
by itself, the devices must be detached from the implicit domain using
arch-specific IOMMU-API. Note that this works only for arm32 and not for
arm64, which
Add binary firmware for Cadence MHDP8546 DP bridge.
Release version: 1.2.12
Signed-off-by: Damian Kos
---
LICENCE.cadence | 63 +++
WHENCE | 9 +++
cadence/mhdp8546.bin | Bin 0 -> 131072 bytes
3 files changed, 72 insertions(+)
https://bugs.freedesktop.org/show_bug.cgi?id=102322
--- Comment #53 from Andrey Grodzovsky ---
Created attachment 141198
--> https://bugs.freedesktop.org/attachment.cgi?id=141198&action=edit
add_debug_info2.patch
Try this patch instead, i might be missing some prints in the first one.
In the l
Hi Alex,
On Mon, Aug 20, 2018 at 02:24:05PM +0100, Alexandru Gheorghe wrote:
When we want to writeback to memory in NV12 format we need to program
the RGB2YUV coefficients.
Currently, we don't program the coefficients and the NV12 doesn't work
at all.
This patchset fixes that by programming a s
When we want to writeback to memory in NV12 format we need to program
the RGB2YUV coefficients.
Currently, we don't program the coefficients and the NV12 doesn't work
at all.
This patchset fixes that by programming a sane default(bt709, limited
range) as rgb2yuv coefficients.
In the long run, pro
On Mon, Aug 20, 2018 at 01:38:59PM +0100, Ayan Halder wrote:
> On Mon, Aug 20, 2018 at 12:03:19PM +0100, Liviu Dudau wrote:
> > On Fri, Aug 17, 2018 at 06:33:04PM +0100, Ayan Kumar Halder wrote:
> > > For multi-planar formats, while calculating offsets in planes with index
> > > greater than 0
> >
Am 20.08.2018 um 08:05 schrieb Huang Rui:
On Fri, Aug 17, 2018 at 06:38:16PM +0800, Koenig, Christian wrote:
Am 17.08.2018 um 12:08 schrieb Huang Rui:
I continue to work for bulk moving that based on the proposal by Christian.
Background:
amdgpu driver will move all PD/PT and PerVM BOs into id
From: Jamie Fox
Mali-DP650 supports warming up the SMMU translations, by sending
requsts to the SMMU before a buffer is read.
There are two modes supported:
- PARTIAL: could be enabled when the buffer is composed of 4K or 64K
pages, the display hardware will send a configurable number of
re
On Mon, Aug 20, 2018 at 12:03:19PM +0100, Liviu Dudau wrote:
> On Fri, Aug 17, 2018 at 06:33:04PM +0100, Ayan Kumar Halder wrote:
> > For multi-planar formats, while calculating offsets in planes with index
> > greater than 0
> > (ie second plane, third plane, etc), one needs to divide (src_x * cp
Hi,
On Mon, 2018-08-20 at 11:56 +0200, Maxime Ripard wrote:
> On Tue, Aug 07, 2018 at 10:31:30PM +0200, Paul Kocialkowski wrote:
> > Hi,
> >
> > Le mardi 07 août 2018 à 22:18 +0200, Daniel Vetter a écrit :
> > > On Tue, Aug 07, 2018 at 09:39:19PM +0200, Paul Kocialkowski wrote:
> > > > Initializi
https://bugs.freedesktop.org/show_bug.cgi?id=100697
Kai changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
Hi!
On Wed, Aug 15, 2018 at 08:07:45PM +0800, Icenowy Zheng wrote:
> The glue in sun4i-drm of dw-hdmi currently doesn't set the clocks of
> dw-hdmi exclusively, which will lead the display fails to initialize in
> some situations.
Apart from the feedback already given, detailing which situations
On 8/6/2018 11:03 PM, Jordan Crouse wrote:
Failure to load firmware is the primary reason to fail adreno_load_gpu().
Try to load it first before going into the hardware initialization code and
unwinding it. This is important for a6xx because the GMU gets loaded from
the runtime power code and i
On 14.08.2018 12:26, Heiko Stuebner wrote:
> >From a specified output port of one dsi controller this function allows to
> iterate over the list of registered dsi controllers trying to find a second
> instance connected to the same display, like it is used in dual-dsi setups.
As I said earlier it
Hi Tomi,
On Monday, 20 August 2018 14:24:23 EEST Tomi Valkeinen wrote:
> On 19/08/18 13:53, Laurent Pinchart wrote:
> > On Monday, 13 August 2018 14:12:44 EEST Tomi Valkeinen wrote:
> >> On 06/08/18 23:36, Laurent Pinchart wrote:
> >>> The series is based on top of the previously submitted "[PATCH
On 19/08/18 13:53, Laurent Pinchart wrote:
> Hi Tomi,
>
> On Monday, 13 August 2018 14:12:44 EEST Tomi Valkeinen wrote:
>> On 06/08/18 23:36, Laurent Pinchart wrote:
>>> The series is based on top of the previously submitted "[PATCH v2 00/21]
>>> omapdrm: Rework the HPD-related operations" patch s
On Fri, Aug 17, 2018 at 06:33:04PM +0100, Ayan Kumar Halder wrote:
> For multi-planar formats, while calculating offsets in planes with index
> greater than 0
> (ie second plane, third plane, etc), one needs to divide (src_x * cpp) with
> horizontal
> chroma subsampling factor and (src_y * pitch)
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:50:04 EEST Ulrich Hecht wrote:
> Adds LVDS decoder, HDMI encoder and connector for Draak boards.
>
> Signed-off-by: Ulrich Hecht
> Reviewed-by: Laurent Pinchart
I'm afraid I'll have to revoke that, as it applied to the patch be
On 14.08.2018 12:26, Heiko Stuebner wrote:
> From: Nickey Yang
>
> Add the ROCKCHIP DSI controller driver that uses the Synopsys DesignWare
> MIPI DSI host controller bridge and remove the old separate one.
>
> changes:
>
> v2:
>add err_pllref, remove unnecessary encoder.enable & disable
>
-Original Message-
From: dri-devel On Behalf Of Andrey
Grodzovsky
Sent: Friday, August 17, 2018 11:16 PM
To: dri-devel@lists.freedesktop.org
Cc: Koenig, Christian ; amd-...@lists.freedesktop.org
Subject: [PATCH] drm/scheduler: Add stopped flag to drm_sched_entity
The flag will prevent
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:50:01 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka
>
> Signed-off-by: Koji Matsuoka
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Ulrich Hecht
> ---
> arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 +---
> 1 file
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:58 EEST Ulrich Hecht wrote:
> In R-Car D3 and E3, the DU dot clock can be sourced from the LVDS PLL.
> This patch enables that PLL if present.
>
> Based on patch by Koji Matsuoka .
>
> Signed-off-by: Ulrich Hecht
> ---
> dri
https://bugs.freedesktop.org/show_bug.cgi?id=107581
Timothy Arceri changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #5 from Timothy A
https://bugs.freedesktop.org/show_bug.cgi?id=105251
--- Comment #17 from CheatCodesOfLife ---
(In reply to Andrey Grodzovsky from comment #16)
> Hi everyone, I've tried with latest kernel and latest VEGA10 firmware and
> wasn't able to reproduce this problem.
>
> From the logs it seems all of yo
On Fri, Aug 17, 2018 at 06:38:16PM +0800, Koenig, Christian wrote:
> Am 17.08.2018 um 12:08 schrieb Huang Rui:
> > I continue to work for bulk moving that based on the proposal by Christian.
> >
> > Background:
> > amdgpu driver will move all PD/PT and PerVM BOs into idle list. Then move
> > all o
Hi Tomi,
On Monday, 13 August 2018 14:12:44 EEST Tomi Valkeinen wrote:
> On 06/08/18 23:36, Laurent Pinchart wrote:
> > The series is based on top of the previously submitted "[PATCH v2 00/21]
> > omapdrm: Rework the HPD-related operations" patch series. For convenience
> > I've pushed it to my tr
https://bugs.freedesktop.org/show_bug.cgi?id=107612
--- Comment #1 from CheatCodesOfLife ---
Created attachment 141192
--> https://bugs.freedesktop.org/attachment.cgi?id=141192&action=edit
glxinfo |greep OpenGL
forgot to attach this last night.
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https://bugs.freedesktop.org/show_bug.cgi?id=107581
--- Comment #6 from Benjamin Hodgetts ---
I haven't tried force_glsl_extensions_warn, but
MESA_GL_VERSION_OVERRIDE=4.5COMPAT doesn't help. It worked on older versions of
the game, but has no positive effect with the current version of the game (
https://bugs.freedesktop.org/show_bug.cgi?id=107572
--- Comment #15 from Andrew Cook ---
Unigine locked up right at the end of the benchmark, but it also prints a
vmfault
kernel: gmc_v8_0_process_interrupt: 71 callbacks suppressed
kernel: amdgpu :0c:00.0: GPU fault detected: 146 0x0048080c
k
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:57 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka
>
> This patch adds D3 definition for DU and fixes digital RGB routing.
>
> Signed-off-by: Koji Matsuoka
> ---
> drivers/gpu/drm/rcar-du/rcar_du_drv.c | 3 ++-
> drivers/g
On 14.08.2018 12:26, Heiko Stuebner wrote:
> With the regular means of adding the dsi-component in probe it creates
> a race condition with the panel probing, as the panel device only gets
> created after the dsi-bus got created.
>
> When the panel-driver is build as a module it currently fails har
On 17.08.2018 03:56, Inki Dae wrote:
>
> 2018년 08월 13일 20:17에 Andrzej Hajda 이(가) 쓴 글:
>> On 07.08.2018 10:53, Inki Dae wrote:
>>> 2018년 07월 26일 00:46에 Andrzej Hajda 이(가) 쓴 글:
From: Maciej Purski
The current implementation assumes that the only possible peripheral
device for DSI
https://bugs.freedesktop.org/show_bug.cgi?id=107623
--- Comment #1 from jian-h...@endlessm.com ---
Created attachment 141197
--> https://bugs.freedesktop.org/attachment.cgi?id=141197&action=edit
The resume process video
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https://bugzilla.kernel.org/show_bug.cgi?id=199425
--- Comment #18 from Johannes Hirte (johannes.hi...@datenkhaos.de) ---
[183309.195913]
==
[183309.195937] BUG: KASAN: use-after-free in
drm_atomic_helper_wait_for_flip_done+0x212/0x27
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:50:00 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka
>
> This patch corrects that the extal clock used with the fixed value
> is acquired from the device tree.
> Also, it is possible to select extal or dotclkin for R8A77995 and
>
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:59 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka
>
> This patch adds the option to specify a maximal clock and a minimal vertical
> refresh rate.
What is this needed for ?
> Signed-off-by: Koji Matsuoka
> [uli: renamed pro
Hi Jacopo,
Thank you for the patch.
On Monday, 30 July 2018 20:20:14 EEST Jacopo Mondi wrote:
> DU channels not equipped with a DPLL use an internal (aka SoC provided) or
> external clock source combined with an internal divider to generate the
> desired output dot clock frequency.
>
> The curre
https://bugs.freedesktop.org/show_bug.cgi?id=107169
Timothy Arceri changed:
What|Removed |Added
Assignee|mesa-dev@lists.freedesktop. |dri-devel@lists.freedesktop
Hi Jacopo,
Thank you for the patch.
On Monday, 30 July 2018 20:20:13 EEST Jacopo Mondi wrote:
> Rename the 'value' variable, only used to for writing to DMSR register to a
> more precise 'dmsr' name.
>
> Signed-off-by: Laurent Pinchart
> Signed-off-by: Jacopo Mondi
I think this simple change
https://bugs.freedesktop.org/show_bug.cgi?id=107261
--- Comment #2 from Ian ---
I'm seeing a very similar dmesg trace with a 2400G on kernel
4.18.1-arch1-1-ARCH: https://pastebin.com/raw/7CAXdXkD
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https://bugs.freedesktop.org/show_bug.cgi?id=107623
--- Comment #2 from jian-h...@endlessm.com ---
It is nouveau with parameters runpm=0 and noaccel=1 as the driver for NVIDIA
GeForce GTX 1050 Mobile card.
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Hi Ulrich,
Thank you for the patches.
On Tuesday, 14 August 2018 16:49:54 EEST Ulrich Hecht wrote:
> Hi!
>
> This is a prototype extension of the series "R-Car D3 LVDS/HDMI support"
> that includes an up-port of the LVDS PLL support in the BSP.
>
> While this is prototype-quality code, there ar
On Tue, Aug 14, 2018 at 10:36:58AM +0200, Daniel Vetter wrote:
> On Fri, Aug 10, 2018 at 06:50:31PM +0100, Alexandru Gheorghe wrote:
> > DRM_MODE_REFLECT_X and DRM_MODE_REFLECT_Y meaning seems a bit unclear
> > to me, so try to clarify that with a bit of ascii graphics.
> >
> > Signed-off-by: Alex
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:56 EEST Ulrich Hecht wrote:
> Add support for the R-Car D3 (R8A77995) SoC to the R-Car DU driver.
>
> Based on patch by Koji Matsuoka .
>
> Signed-off-by: Ulrich Hecht
> ---
> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 17 +++
Hi Ulrich,
Thank you for the patch.
On Tuesday, 14 August 2018 16:49:55 EEST Ulrich Hecht wrote:
> From: Koji Matsuoka
>
> Signed-off-by: Koji Matsuoka
> ---
> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc
https://bugs.freedesktop.org/show_bug.cgi?id=107623
Bug ID: 107623
Summary: (4.18.3)[drm:hwss_edp_wait_for_hpd_ready [amdgpu]]
*ERROR* hwss_edp_wait_for_hpd_ready: wait timed out!
Product: DRI
Version: unspecified
Hardware:
On Tue, Aug 07, 2018 at 10:31:30PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> Le mardi 07 août 2018 à 22:18 +0200, Daniel Vetter a écrit :
> > On Tue, Aug 07, 2018 at 09:39:19PM +0200, Paul Kocialkowski wrote:
> > > Initializing and registering fbdev requires at least one DRM connector
> > > and wi
On 16.08.2018 20:54, Sean Paul wrote:
> From: Sean Paul
>
> DRM_MIPI_DSI is included via both "select" and "depends on", this is
> trouble waiting to happen since this will result in different behavior
> depending on which is used.
As Thierry said 'select' is for DSI controllers, 'depends on' for
The VENC encoder modifies the requested video mode to match the NTSC or
PAL timings (or reject the video mode completely) in the .set_timings()
operation. This should be performed in the .check_timings() operation
instead. Move the fixup.
Signed-off-by: Laurent Pinchart
Reviewed-by: Sebastian Rei
The bus flags stored in omap_dss_device instances are used to fixup the
video mode before setting it, to honour constraints that can't be
expressed through drm_display_mode. The fixup occurs in the CRTC mode
set operation and the resulting video mode is stored internally in the
CRTC. It is then use
The drm_connector implementation requires access to the omap_dss_device
corresponding to the display, which is passed to its initialization
function and stored internally. Refactoring of the timings operations
will require access to the output omap_dss_device. To prepare for that,
pass it to the co
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