On Tue, Mar 03, 2020 at 08:04:05AM -0500, Jonathan Marek wrote:
> What Xorg prints doesn't mean anything. I don't think there will be errors
> in dmesg, you need to run something that does pageflips as fast as possible
> and see that the refresh rate is still 60. (modetest with -v, glmark-drm are
>
On Mon, Mar 02, 2020 at 10:36:54PM -0500, Jonathan Marek wrote:
> Another thing: did you verify that the panel still runs at 60hz (and not
> dropping frames to 30hz)? IIRC that was the behavior with lower clock.
Yes, the panel is running at 60 HZ according to the Xorg log with
Ville's patch applie
Hi Rob,
> Am 03.03.2020 um 15:58 schrieb Rob Herring :
>
> On Thu, Feb 27, 2020 at 01:56:56PM +0100, H. Nikolaus Schaller wrote:
>> Hi Sam,
>>
>>
>> Or that there will appear good tools soon. E.g. some GUI
>> based editor tool would be very helpful so that you don't have
>> to fight with the ya
在 2020/3/3 22:46, Ville Syrjälä 写道:
On Tue, Mar 03, 2020 at 10:30:14PM +0800, zhangxiaoxu (A) wrote:
在 2020/3/3 21:59, Ville Syrjälä 写道:
That doesn't match how vc_screenbuf_size is computed elsewhere. Also
a lot of places seem to assume that the screenbuf can be larger than
vga_vram_size (e
On 2020-03-03 15:20, Thierry Reding wrote:
> On Mon, Mar 02, 2020 at 10:53:56PM +, Peter Rosin wrote:
>> On 2020-03-02 21:34, Ville Syrjala wrote:
>>> From: Ville Syrjälä
>>>
>>> The currently listed dotclock disagrees with the currently
>>> listed vrefresh rate. Change the dotclock to match
Hi CK,
On 3/3/20 3:52, CK Hu wrote:
> Hi, Enric:
>
> On Mon, 2020-03-02 at 12:01 +0100, Enric Balletbo i Serra wrote:
>> Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
>> replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
>> Those functions will all
On Tue, Mar 03, 2020 at 08:50:28AM -0700, Jeffrey Hugo wrote:
> On Tue, Mar 3, 2020 at 8:43 AM Jordan Crouse wrote:
> >
> > On Mon, Mar 02, 2020 at 09:49:06PM +0100, Sam Ravnborg wrote:
> > > Hi Jordan.
> > >
> > > On Mon, Mar 02, 2020 at 11:23:43AM -0700, Jordan Crouse wrote:
> > > > Convert disp
* Tony Lindgren [200303 15:14]:
> * Tomi Valkeinen [200303 06:03]:
> > On 24/02/2020 21:12, Tony Lindgren wrote:
> > > + if (sysc_soc->soc == SOC_3430) {
> > > + /* Clear DSS_SDI_CONTROL */
> > > + sysc_write(ddata, dispc_offset + 0x44, 0);
> > > +
> > > + /* Clear DSS_PLL
Add assign function in cmdq helper which assign constant value into
internal register by index.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 24 +++-
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
include/linux/soc/mediat
* Tomi Valkeinen [200303 15:36]:
> On 03/03/2020 17:13, Tony Lindgren wrote:
> > Hi,
> >
> > * Tomi Valkeinen [200303 06:03]:
> > > On 24/02/2020 21:12, Tony Lindgren wrote:
> > > > + /* Remap the whole module range to be able to reset dispc
> > > > outputs */
> > > > + devm_iounmap
euler inclusion
category: bugfix
bugzilla: 31340
DTS: NA
CVE: CVE-2020-8649
---
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea000
在 2020/3/3 21:59, Ville Syrjälä 写道:
That doesn't match how vc_screenbuf_size is computed elsewhere. Also
a lot of places seem to assume that the screenbuf can be larger than
vga_vram_size (eg. all the memcpy()s pick the smaller size of the
two).
Yes, in the vga source code, we also pick the sm
On Mon, Mar 2, 2020 at 10:24 PM Gerd Hoffmann wrote:
>
> On Mon, Mar 02, 2020 at 02:14:02PM -0800, Alistair Francis wrote:
> > On Fri, Feb 28, 2020 at 1:57 AM Gerd Hoffmann wrote:
> > >
> > > On Thu, Feb 27, 2020 at 01:04:54PM -0800, Alistair Francis wrote:
> > > > The QEMU model for the Bochs di
Hi,
> Am 03.03.2020 um 16:03 schrieb Ville Syrjälä :
>
>> I haven't looked into the driver code, but would it be
>> possible to specify .clock = 0 (or leave it out) to
>> calculate it bottom up? This would avoid such inconsistencies.
>
> I'm going to remove .vrefresh entirely from the struct.
>
Add clear parameter to let client decide if
event should be clear to 0 after GCE receive it.
Signed-off-by: Dennis YC Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
drivers/soc/mediatek/mtk-cmdq-helper.c | 5 +++--
include/linux/mailbox/mtk-cmdq-mailbox.h | 3 +--
include/linux/soc
On Tue, Mar 3, 2020 at 8:43 AM Jordan Crouse wrote:
>
> On Mon, Mar 02, 2020 at 09:49:06PM +0100, Sam Ravnborg wrote:
> > Hi Jordan.
> >
> > On Mon, Mar 02, 2020 at 11:23:43AM -0700, Jordan Crouse wrote:
> > > Convert display/msm/gmu.txt to display/msm/gmu.yaml and remove the old
> > > text bindin
On Mon, Mar 02, 2020 at 09:15:21PM +0900, David Stevens wrote:
> This change adds a new dma-buf operation that allows dma-bufs to be used
> by virtio drivers to share exported objects. The new operation allows
> the importing driver to query the exporting driver for the UUID which
> identifies the
On Mon, Mar 02, 2020 at 05:00:23PM -0800, Ralph Campbell wrote:
> When memory is migrated to the GPU, it is likely to be accessed by GPU
> code soon afterwards. Instead of waiting for a GPU fault, map the
> migrated memory into the GPU page tables with the same access permissions
> as the source CP
What Xorg prints doesn't mean anything. I don't think there will be
errors in dmesg, you need to run something that does pageflips as fast
as possible and see that the refresh rate is still 60. (modetest with
-v, glmark-drm are examples)
On 3/3/20 7:26 AM, Brian Masney wrote:
On Mon, Mar 02,
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea004000 count:0 mapcount:-127 mapping: (null)
index:0x0
page flags: 0xf()
page
On 02.03.20 09:44, Frieder Schrempf wrote:
> On 26.02.20 17:05, Guido Günther wrote:
>> On Wed, Feb 26, 2020 at 04:54:35PM +0100, Lucas Stach wrote:
>>> On Mi, 2020-02-26 at 15:31 +, Schrempf Frieder wrote:
On 25.02.20 09:13, Frieder Schrempf wrote:
> Hi Lucas,
>
> On 24.02.20
Return error code to client if send message fail,
so that client has chance to error handling.
Signed-off-by: Dennis YC Hsieh
Fixes: 576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper")
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
On 03.03.20 16:59, Guido Günther wrote:
> Hi,
> On Tue, Mar 03, 2020 at 11:43:14AM +, Schrempf Frieder wrote:
>> On 02.03.20 09:44, Frieder Schrempf wrote:
>>> On 26.02.20 17:05, Guido Günther wrote:
On Wed, Feb 26, 2020 at 04:54:35PM +0100, Lucas Stach wrote:
> On Mi, 2020-02-26 at 15
If I have time to kill over the weekend I'll do a new rebase of my Nexus
5 patches (my last rebase was back in August on 5.2, and the panel was
working correctly at 60Hz back then).
Looked at it again and it does look like your glmark was vsynced (glmark
explicitly disables vsync so I guess yo
Hi,
* Tomi Valkeinen [200303 06:03]:
> On 24/02/2020 21:12, Tony Lindgren wrote:
> > + /* Remap the whole module range to be able to reset dispc outputs */
> > + devm_iounmap(ddata->dev, ddata->module_va);
> > + ddata->module_va = devm_ioremap(ddata->dev,
> > +
Some gce hardware shift pc and end address in register to support
large dram addressing.
Implement gce address shift when write or read pc and end register.
And add shift bit in platform definition.
Signed-off-by: Dennis YC Hsieh
---
drivers/mailbox/mtk-cmdq-mailbox.c | 61
Add read_s function in cmdq helper functions which support read value from
register or dma physical address into gce internal register.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++
include/linux/mailbox/mtk-cmdq-mailbox.h |
modetest should be printing "freq: 60.0Hz", so definitely something
wrong there. Though I guess you have another problem since I would
expect the patch to drop it to 30 and not 13.5.
(FYI glmark-x11 isn't vsynced which is why I specifically mentioned
glmark-drm)
On 3/3/20 9:16 PM, Brian Masn
On 2020-03-03 16:05, Thierry Reding wrote:
> On Tue, Mar 03, 2020 at 02:57:45PM +, Peter Rosin wrote:
>>
>> On 2020-03-03 15:20, Thierry Reding wrote:
>>> On Mon, Mar 02, 2020 at 10:53:56PM +, Peter Rosin wrote:
On 2020-03-02 21:34, Ville Syrjala wrote:
> From: Ville Syrjälä
>
Please ignore this patch.
Thanks.
在 2020/3/4 10:10, Zhang Xiaoxu 写道:
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea004000 count:0 mapcount:-127
[to Stephen and Mike]
On 03/03/2020 04:18, CK Hu wrote:
> Hi, Matthias:
>
> On Thu, 2020-02-27 at 19:22 +0100, Matthias Brugger wrote:
>>
>> On 27/02/2020 19:21, Matthias Brugger wrote:
>>>
>>>
>>> On 27/02/2020 19:08, Enric Balletbo i Serra wrote:
From: Matthias Brugger
There is
Add set event function in cmdq helper functions to set specific event.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 15 +++
include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
include/linux/soc/mediatek/mtk-cmdq.h| 9 +
3
On Tue, Mar 03, 2020 at 09:27:50PM -0500, Jonathan Marek wrote:
> modetest should be printing "freq: 60.0Hz", so definitely something wrong
> there. Though I guess you have another problem since I would expect the
> patch to drop it to 30 and not 13.5.
>
> (FYI glmark-x11 isn't vsynced which is wh
On Mon, 2020-03-02 at 22:34 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
>
> Someone tell me which (if either) of the dotclock or vreresh is
> correct?
This dis
Please ignore this patch.
Thanks.
在 2020/3/4 10:02, Zhang Xiaoxu 写道:
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea004000 count:0 mapcount:-127
Add jump function so that client can jump to any address which
contains instruction.
Signed-off-by: Dennis YC Hsieh
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 12
include/linux/soc/mediatek/mtk-cmdq.h | 11 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/soc/m
This patch support gce on mt6779 platform.
Change since v3:
- refine code for local variable usage
- use cmdq error code to consistent with current design
- return error directly after send if error code return
- also modify drm driver which uses cmdq_pkt_wfe api
- add finalize in drm driver
Chan
* Tomi Valkeinen [200303 09:19]:
> On 24/02/2020 21:12, Tony Lindgren wrote:
> > In order to probe display subsystem (DSS) components with ti-sysc
> > interconnect target module without legacy platform data and using
> > devicetree, we need to update dss probing a bit.
> >
> > In the device tree,
Add documentation for the mt6779 gce.
Add gce header file defined the gce hardware event,
subsys number and constant for mt6779.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
.../devicetree/bindings/mailbox/mtk-gce.txt | 8 +-
include/dt-bindings/gce/mt6779-gce.h | 222 +++
add write_s function in cmdq helper functions which
writes value contains in internal register to address
with large dma access support.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++-
include/linux/mailbox/mtk-cmdq-m
On Tue, Mar 03, 2020 at 10:01:59AM -0700, Jordan Crouse wrote:
> On Tue, Mar 03, 2020 at 10:54:05AM -0500, Brian Masney wrote:
> > On Tue, Mar 03, 2020 at 08:50:28AM -0700, Jeffrey Hugo wrote:
> > > On Tue, Mar 3, 2020 at 8:43 AM Jordan Crouse
> > > wrote:
> > > >
> > > > On Mon, Mar 02, 2020 at
Do success callback in channel when shutdown. For those task not finish,
callback with error code thus client has chance to cleanup or reset.
Signed-off-by: Dennis YC Hsieh
---
drivers/mailbox/mtk-cmdq-mailbox.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/
Heiko Stübner wrote on Mon, 02 Mar 2020 17:29:02
+0100:
> Am Montag, 2. März 2020, 16:58:07 CET schrieb Miquel Raynal:
> > Rockchip PX30 SoCs feature a Bifrost Mali GPU.
> >
> > Signed-off-by: Miquel Raynal
> > ---
> > Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 1 +
>
> a
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea004000 count:0 mapcount:-127 mapping: (null)
index:0x0
page flags: 0xf()
page
Hi,
Am Montag, 2. März 2020, 21:34:24 CET schrieb Ville Syrjala:
> From: Ville Syrjälä
>
> The currently listed dotclock disagrees with the currently
> listed vrefresh rate. Change the dotclock to match the vrefresh.
>
> Someone tell me which (if either) of the dotclock or vreresh is
> correct?
add write_s function in cmdq helper functions which
writes a constant value to address with large dma
access support.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++
include/linux/soc/mediatek/mtk-cmdq.h | 14 +++
Add gce v4 hardware support with different thread number and shift.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
---
drivers/mailbox/mtk-cmdq-mailbox.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
b/drivers/mailbox/mtk-cmdq-mailbox.c
index 4dbee
Hi Rohit,
This makes sense to me as gamma was implemented as optional property.
Reviewed-By: "Devarsh Thakkar "
@emil.veli...@collabora.com, @imir...@alum.mit.edu, @Ville Syrjälä, Could you
please ack and help merge this patch if it also look good to you ?
Regards,
Devarsh
> -Original Mess
When syzkaller tests, there is a UAF:
BUG: KASan: use after free in vgacon_invert_region+0x9d/0x110 at addr
8810
Read of size 2 by task syz-executor.1/16489
page:ea004000 count:0 mapcount:-127 mapping: (null)
index:0x0
page flags: 0xf()
page
If the 'name' array in check_vgem() was not initialized to null, the
value of name[4] may be random. Which will cause strcmp(name, "vgem")
failed.
Signed-off-by: Leon He
---
tools/testing/selftests/dmabuf-heaps/dmabuf-heap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/too
Export finalize function to client which helps append eoc and jump
command to pkt. Let client decide call finalize or not.
Signed-off-by: Dennis YC Hsieh
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 1 +
drivers/soc/mediatek/mtk-cmdq-helper.c | 7 ++-
include/linux/soc/mediatek/mtk-cmdq.h
On 03/03/2020 17:49, Tony Lindgren wrote:
* Tony Lindgren [200303 15:14]:
* Tomi Valkeinen [200303 06:03]:
On 24/02/2020 21:12, Tony Lindgren wrote:
+ if (sysc_soc->soc == SOC_3430) {
+ /* Clear DSS_SDI_CONTROL */
+ sysc_write(ddata, dispc_offset + 0x44, 0);
Hi Andrzej,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on drm-exynos/exynos-drm-next drm-intel/for-linux-next
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master v5.6-rc4
next-20200303]
[if your patch is applied to the
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Add clear parameter to let client decide if
> event should be clear to 0 after GCE receive it.
>
> Signed-off-by: Dennis YC Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 2 +-
> drivers/soc/mediatek/mtk-cmdq-help
Hi, Dennis:
On Wed, 2020-03-04 at 10:32 +0800, CK Hu wrote:
> Hi, Dennis:
>
> On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> > Some gce hardware shift pc and end address in register to support
> > large dram addressing.
> > Implement gce address shift when write or read pc and end re
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Add jump function so that client can jump to any address which
> contains instruction.
>
> Signed-off-by: Dennis YC Hsieh
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 12
> include/linux/soc/mediatek/mtk-cm
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Export finalize function to client which helps append eoc and jump
> command to pkt. Let client decide call finalize or not.
>
Reviewed-by: CK Hu
> Signed-off-by: Dennis YC Hsieh
> ---
> drivers/gpu/drm/mediatek/mtk_drm_
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Return error code to client if send message fail,
> so that client has chance to error handling.
>
Reviewed-by: CK Hu
> Signed-off-by: Dennis YC Hsieh
> Fixes: 576f1b4bc802 ("soc: mediatek: Add Mediatek CMDQ helper")
> --
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Do success callback in channel when shutdown. For those task not finish,
> callback with error code thus client has chance to cleanup or reset.
>
Reviewed-by: CK Hu
> Signed-off-by: Dennis YC Hsieh
> ---
> drivers/mailbo
Hi, Dennis:
On Tue, 2020-03-03 at 18:58 +0800, Dennis YC Hsieh wrote:
> Some gce hardware shift pc and end address in register to support
> large dram addressing.
> Implement gce address shift when write or read pc and end register.
> And add shift bit in platform definition.
>
> Signed-off-by: D
On Tue, Mar 3, 2020 at 1:56 AM Gerd Hoffmann wrote:
> Hi,
>
> > struct virtio_gpu_object {
> > struct drm_gem_shmem_object base;
> > uint32_t hw_res_handle;
> > -
> > - struct sg_table *pages;
> > uint32_t mapped;
> > -
> > bool dumb;
> > bool created;
> > };
A resource will be a shmem based resource or a (planned)
vram based resource, so it makes sense to factor out common fields
(resource handle, dumb).
v2: move mapped field to shmem object
Signed-off-by: Gurchetan Singh
---
drivers/gpu/drm/virtio/virtgpu_drv.h| 13 +++
drivers/gpu/drm
This function can be reused for hostmem objects.
v2: move virtio_gpu_is_shmem() check to virtio_gpu_cleanup_object()
Signed-off-by: Gurchetan Singh
---
drivers/gpu/drm/virtio/virtgpu_drv.h| 2 +-
drivers/gpu/drm/virtio/virtgpu_object.c | 32 +++--
2 files changed, 20 in
On 2020-02-12 at 15:59:37 +0530, Ramalingam C wrote:
> Combined HDCP patches together. Few for DRM SRM handling and few
> more for hdcp2.2 compliance fix at I915.
>
> v2:
> minor changes in i915 related 3 patches.
>
> Ramalingam C (5):
> drm/hdcp: optimizing the srm handling
> drm/hdcp: fix
When migrating system memory to GPU memory, check that SVM has been
enabled. Even though most errors can be ignored since migration is
a performance optimization, return an error because this is a violation
of the API.
Signed-off-by: Ralph Campbell
---
drivers/gpu/drm/nouveau/nouveau_svm.c | 5 +
When memory is migrated to the GPU, it is likely to be accessed by GPU
code soon afterwards. Instead of waiting for a GPU fault, map the
migrated memory into the GPU page tables with the same access permissions
as the source CPU page table entries. This preserves copy on write
semantics.
Signed-of
When nouveau processes GPU faults, it checks to see if the fault address
falls within the "unmanaged" range which is reserved for fixed allocations
instead of addresses chosen by the core mm code. If start is greater than
or equal to svmm->unmanaged.limit, then limit will also be greater than
svmm-
find_vma_intersection(mm, start, end) only guarantees that end is greater
than or equal to vma->vm_start but doesn't guarantee that start is
greater than or equal to vma->vm_start. The calculation for the
intersecting range in nouveau_svmm_bind() isn't accounting for this and
can call migrate_vma_s
Originally patch 4 was targeted for Jason's rdma tree since other HMM
related changes were queued there. Now that those have been merged,
these patches just contain changes to nouveau so they could go through
any tree. I guess Ben Skeggs' tree would be appropriate.
Changes since v2:
Added patches
On Sun, 01 Mar 2020 22:22:25 +
Chris Wilson wrote:
> Quoting Steven Rostedt (2020-03-01 18:18:16)
> > On Sun, 1 Mar 2020 15:52:47 +
> > Chris Wilson wrote:
> >
> > > To facilitate construction of per-client event ringbuffers, in
> > > particular for a per-client debug and error repor
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By ma
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By ma
Hi Andrzej,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on drm-exynos/exynos-drm-next drm-intel/for-linux-next
tegra-drm/drm/tegra/for-next drm-tip/drm-tip linus/master v5.6-rc4
next-20200303]
[cannot apply to drm/drm-next
The X1 Extreme is one of the systems that lies about which backlight
interface that it uses in its VBIOS as PWM backlight controls don't work
at all on this machine. It's possible that this panel could be one of
the infamous ones that can switch between PWM mode and DPCD backlight
control mode, but
On 3/3/20 4:42 AM, Jason Gunthorpe wrote:
On Mon, Mar 02, 2020 at 05:00:23PM -0800, Ralph Campbell wrote:
When memory is migrated to the GPU, it is likely to be accessed by GPU
code soon afterwards. Instead of waiting for a GPU fault, map the
migrated memory into the GPU page tables with the sa
Hi "Thomas,
I love your patch! Yet something to improve:
[auto build test ERROR on drm-exynos/exynos-drm-next]
[also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip linus/master
v5.6-rc4 next-20200303]
[cannot apply to tegra-drm/drm/tegra/for-next]
[if your patch is applied t
On Tue, 2020-02-11 at 13:33 -0500, Lyude Paul wrote:
> The whole point of using OUIs is so that we can recognize certain
> devices and potentially apply quirks for them. Normally this should work
> quite well, but there appears to be quite a number of laptop panels out
> there that will fill the OU
On Tue, 2020-02-11 at 13:33 -0500, Lyude Paul wrote:
> - if (!intel_dp_aux_display_control_capable(intel_connector))
> + /*
> + * There are a lot of machines that don't advertise the backlight
> + * control interface to use properly in their VBIOS, :\
> + */
> + if (dev_
On Thu, Feb 27, 2020 at 2:28 AM Christian König
wrote:
>
> Am 26.02.20 um 17:46 schrieb Bas Nieuwenhuizen:
> > On Wed, Feb 26, 2020 at 4:29 PM Jason Ekstrand wrote:
> >> On Wed, Feb 26, 2020 at 4:05 AM Daniel Vetter wrote:
> >>> On Wed, Feb 26, 2020 at 10:16:05AM +0100, Christian König wrote:
>
Vulkan WSI user of the new API:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037
On Tue, Mar 3, 2020 at 1:03 PM Jason Ekstrand wrote:
>
> Explicit synchronization is the future. At least, that seems to be what
> most userspace APIs are agreeing on at this point. However, most of
Explicit synchronization is the future. At least, that seems to be what
most userspace APIs are agreeing on at this point. However, most of our
Linux APIs (both userspace and kernel UAPI) are currently built around
implicit synchronization with dma-buf. While work is ongoing to change
many of th
Hi Sam,
Thank you for the patch.
On Sun, Feb 16, 2020 at 07:15:11PM +0100, Sam Ravnborg wrote:
> With panel-timing converted, now convert the single
> remaining .txt user in panel/ of panel-timing to DT schema.
>
> v2:
> - Drop Thierry as maintainer, as this is not a general panel binding
>
Hi Sam,
Thank you for the patch.
On Sun, Feb 16, 2020 at 07:15:13PM +0100, Sam Ravnborg wrote:
> RFC only - not tested yet!
>
> The panel-dpi compatible is a fallback that
> allows the DT to specify the timing.
>
> When matching panel-dpi expect the device tree to include the
> timing informati
Hi,
Thanks for your patch, everything lgtm.
Reviewed-by: Rodrigo Siqueira
On 03/02, Melissa Wen wrote:
> The dpp2_get_optimal_number_of_taps function is never used. Removing just for
> code cleaning up.
>
> Signed-off-by: Melissa Wen
> ---
> .../gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c | 78
On Mon, 2020-03-02 at 15:30 +0200, Laurent Pinchart wrote:
> Hi Pankaj,
>
> Thank you for the patch.
>
> On Mon, Mar 02, 2020 at 06:26:46PM +0530, Pankaj Bharadiya wrote:
> > nouveau_drm pointer is not getting used anymore in
> > nv50_mstm_{register,destroy}_connector functions, hence remove it.
Hi Sam,
On Tue, Feb 18, 2020 at 11:16:38PM +0100, Sam Ravnborg wrote:
> On Tue, Feb 18, 2020 at 02:13:45PM -0600, Rob Herring wrote:
> > On Sun, Feb 16, 2020 at 12:15 PM Sam Ravnborg wrote:
> > >
> > > Add data-mapping property that can be used to specify
> > > the media format used for the conne
Hi Sam,
On Sat, Feb 29, 2020 at 07:13:20PM +0100, Sam Ravnborg wrote:
> On Sun, Feb 16, 2020 at 07:15:08PM +0100, Sam Ravnborg wrote:
> > This set of patches convert display-timing.txt to DT schema.
> > To do that add a panel-timing.yaml file that include all the
> > panel-timing properties and us
Hi Sam,
Thank you for the patch.
On Sun, Feb 16, 2020 at 07:15:10PM +0100, Sam Ravnborg wrote:
> Add display-timings.yaml - that references panel-timings.yaml.
> display-timings.yaml will be used for display bindings
> when they are converted to meta-schema format.
>
> For now the old display-ti
On Tue, Mar 03, 2020 at 10:26:27AM +0200, Pekka Paalanen wrote:
> On Fri, 28 Feb 2020 17:31:35 +0100
> Niklas Söderlund wrote:
>
> > Bayer formats are used with cameras and contain green, red and blue
> > components, with alternating lines of red and green, and blue and green
> > pixels in differ
On 2/25/20 08:17, Jani Nikula wrote:
> On Tue, 25 Feb 2020, "Gustavo A. R. Silva" wrote:
>> The current codebase makes use of the zero-length array language
>> extension to the C90 standard, but the preferred mechanism to declare
>> variable-length types such as these ones is a flexible array m
On Mon, Mar 02, 2020 at 08:39:37PM -0800, Kees Cook wrote:
> On Wed, Feb 19, 2020 at 10:22:29PM -0800, Kees Cook wrote:
> > Variables declared in a switch statement before any case statements
> > cannot be automatically initialized with compiler instrumentation (as
> > they are not part of any exec
Hi Andrzej,
On Tue, 3 Mar 2020 at 12:02, Andrzej Pietrasiewicz
wrote:
> +static struct drm_framebuffer *
> +rockchip_fb_create(struct drm_device *dev, struct drm_file *file,
> + const struct drm_mode_fb_cmd2 *mode_cmd)
> +{
> + struct drm_afbc_framebuffer *afbc_fb;
> +
On Tue, Mar 03, 2020 at 10:54:05AM -0500, Brian Masney wrote:
> On Tue, Mar 03, 2020 at 08:50:28AM -0700, Jeffrey Hugo wrote:
> > On Tue, Mar 3, 2020 at 8:43 AM Jordan Crouse wrote:
> > >
> > > On Mon, Mar 02, 2020 at 09:49:06PM +0100, Sam Ravnborg wrote:
> > > > Hi Jordan.
> > > >
> > > > On Mon,
Hi Andrzej,
On Tue, 3 Mar 2020 at 12:01, Andrzej Pietrasiewicz
wrote:
> * Returns:
> * Pointer to a &drm_framebuffer on success or an error pointer on failure.
> */
> struct drm_framebuffer *
> -drm_gem_fb_create_with_funcs(struct drm_device *dev, struct drm_file *file,
> -
Hi Andrzej,
On Tue, 3 Mar 2020 at 12:01, Andrzej Pietrasiewicz
wrote:
>
> Consolidating framebuffer creation into one function will make it easier
> to transition to generic afbc-aware helpers.
>
I'd suggest keeping the refactor a bit simpler.
Say - first folds the functions together. Then do the
Hi Andrzej,
On Tue, 3 Mar 2020 at 12:01, Andrzej Pietrasiewicz
wrote:
>
> The new struct contains afbc-specific data.
>
> The new function can be used by drivers which support afbc to complete
> the preparation of struct drm_afbc_framebuffer. It must be called after
> allocating the said struct a
This reverts commit ff57c6513820efe945b61863cf4a51b79f18b592.
With the commit ff57c6513820 ("drm: kirin: Fix for hikey620
display offset problem") we added support for handling LDI
overflows by resetting the hardware.
However, its been observed that when we do hit the LDI overflow
condition, the
Hi,
On Tue, Mar 03, 2020 at 11:43:14AM +, Schrempf Frieder wrote:
> On 02.03.20 09:44, Frieder Schrempf wrote:
> > On 26.02.20 17:05, Guido Günther wrote:
> >> On Wed, Feb 26, 2020 at 04:54:35PM +0100, Lucas Stach wrote:
> >>> On Mi, 2020-02-26 at 15:31 +, Schrempf Frieder wrote:
> On
On 03/03/2020 17:13, Tony Lindgren wrote:
Hi,
* Tomi Valkeinen [200303 06:03]:
On 24/02/2020 21:12, Tony Lindgren wrote:
+ /* Remap the whole module range to be able to reset dispc outputs */
+ devm_iounmap(ddata->dev, ddata->module_va);
+ ddata->module_va = devm_ioremap(dda
Hi Lucas,
On Tue, Mar 03, 2020 at 12:55:04PM +0100, Lucas Stach wrote:
> On Mo, 2020-03-02 at 20:13 +0100, Guido Günther wrote:
> > At least GC7000 fails to enter runtime suspend for long periods of time
> > since
> > the MC becomes busy again even when the FE is idle. The rest of the series
> > m
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