On Tue, Mar 21, 2023 at 03:52:11PM -0600, Jeffrey Hugo wrote:
> > > +
> > > +Request field descriptions:
> > > +
> > > +| req_id- request ID. A request FIFO element and a response FIFO element
> > > with
> > > +| the same request ID refer to the same command.
> > > +
> > > +| seq_id-
Tested-by: Sui Jingfeng
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Remove all codepaths that implement fbdev output directly on GEM
buffers. Always allocate a shadow buffer in system memory and set
up deferred I/O for mmap.
The fbdev code that operated directly on GEM buffers was used by
On Tue Mar 21, 2023 at 8:55 PM CET, Frank Oltmanns wrote:
> My apologies, I wasn’t patient enough.
Frank, there's no need to apologize, in my judgement. You weren't
impatient, we simply happened to run into a coordination problem for
which, I think, neither of us was particularly to blamew. Take
No functional modification involved.
Reported-by: Abaci Robot
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4585
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/modules/power/power_helpers.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Variable dppclk_delay_subtotal is not effectively used, so delete it.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.c:1004:15:
warning: variable 'dppclk_delay_subtotal' set but not used.
Reported-by: Abaci Robot
Link:
Hi Matt,
On Tue, Mar 21, 2023 at 05:10:51PM -0700, Matt Roper wrote:
> On Wed, Mar 22, 2023 at 12:20:09AM +0100, Andi Shyti wrote:
> > From: Paulo Zanoni
> >
> > In multitile systems IRQ need to be reset and enabled per GT.
>
> At the moment we're not enabling multi-tile support on any
In the process of renaming all instances of 'dev_priv' to 'i915',
start using 'i915' within the 'drm_i915_file_private' structure.
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 22 ++---
drivers/gpu/drm/i915/i915_drm_client.c | 2 +-
On Wed, Mar 22, 2023 at 12:20:09AM +0100, Andi Shyti wrote:
> From: Paulo Zanoni
>
> In multitile systems IRQ need to be reset and enabled per GT.
At the moment we're not enabling multi-tile support on any platforms
yet. Xe_HP SDV has pretty much already served its purpose as an early
Xe_HP
Quoting Maxime Ripard (2022-11-04 06:17:17)
> Hi,
>
> This is a follow-up to a previous series that was printing a warning
> when a mux has a set_parent implementation but is missing
> determine_rate().
>
> The rationale is that set_parent() is very likely to be useful when
> changing the rate,
From: Paulo Zanoni
In multitile systems IRQ need to be reset and enabled per GT.
Signed-off-by: Paulo Zanoni
Cc: Tvrtko Ursulin
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/i915_irq.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git
Hi Matt,
> > We occasionally see the PCI device in a non-accessible state at the
> > point the driver is loaded. When this happens, all BAR accesses will
> > read back as 0x. Rather than reading registers and
> > misinterpreting their (invalid) values, let's specifically check for
> >
On 2023-01-25 14:53, Jonathan Kim wrote:
In order to inspect waves from the saved context at any point during a
debug session, the debugger must be able to preempt queues to trigger
context save by suspending them.
On queue suspend, the KFD will copy the context save header information
so
On Tue, Mar 21, 2023 at 06:09:35PM +0100, Andi Shyti wrote:
> From: Matt Roper
>
> We occasionally see the PCI device in a non-accessible state at the
> point the driver is loaded. When this happens, all BAR accesses will
> read back as 0x. Rather than reading registers and
>
On 3/21/2023 7:31 AM, Bagas Sanjaya wrote:
On Mon, Mar 20, 2023 at 09:11:07AM -0600, Jeffrey Hugo wrote:
+AIC100 defines a number of MHI channels for different purposes. This is a list
+of the defined channels, and their uses.
+
+| QAIC_LOOPBACK
+| Channels 0 & 1
+| Valid for AMSS
+| Any data
On 2023-01-25 14:53, Jonathan Kim wrote:
Allow the debugger to set wave behaviour on to either normally operate,
halt at launch, trap on every instruction, terminate immediately or
stall on allocation.
v2: add gfx11 support and remove deprecated launch mode options
Signed-off-by: Jonathan Kim
On 2023-01-25 14:53, Jonathan Kim wrote:
This operation allows the debugger to override the enabled HW
exceptions on the device.
On debug devices that only support the debugging of a single process,
the HW exceptions are global and set through the SPI_GDBG_TRAP_MASK
register.
Because they are
The DSI compatible changed between patchset revisions, but that wasn't
reflected in the bindings. Fix it.
Fixes: 430e11f42bff ("dt-bindings: display: msm: Add qcom, sm8350-mdss binding")
Signed-off-by: Konrad Dybcio
---
.../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 2 +-
1
On 2023-01-25 14:53, Jonathan Kim wrote:
The debugger must be notified by any debugger subscribed exception
that comes from hardware interrupts.
If a debugger session exits, any exceptions it subscribed to may still
have interrupts in the interrupt ring buffer or KGD/KFD pipeline.
To prevent
On Tue Mar 21, 2023 at 5:50 PM CET, Roman Beranek wrote:
> > Also, how was it tested/confirmed?
>
> By counting Vblank interrupts (GIC 118).
Sorry, that was perhaps too abbreviated. To test this change, I set up
an A64 board running kmscube on DSI-1 and verified that the rate of
Vblank IRQs
On 17.03.2023 16:06, Neil Armstrong wrote:
> Add the Display Port controller subnode to the MDSS node.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 79
>
> 1 file changed, 79 insertions(+)
>
> diff --git
On Tue, Mar 21, 2023 at 12:38 AM Rob Herring wrote:
>
> .../bindings/auxdisplay/holtek,ht16k33.yaml | 2 +-
Acked-by: Miguel Ojeda
Cheers,
Miguel
Hi Maxime,
On 2023-03-21 at 15:57:39 +0100, Maxime Ripard wrote:
> Hi,
>
> On Sun, Mar 19, 2023 at 05:07:04PM +0100, Frank Oltmanns wrote:
>> Set the required PLL rate by adjusting the dotclock rate when calling
>> clk_set_rate() when using DSI.
>>
>> According to the Allwinners A64’s BSP code,
On 3/20/23 19:09, Zack Rusin wrote:
> From: Zack Rusin
>
> virtualbox implemented an incomplete version of the svga device which
> they decided to drop soon after the initial release. The device was
> always broken in various ways and never supported by vmwgfx.
>
> vmwgfx should refuse to load
Hi,
thanks for testing the patchset.
Am 21.03.23 um 16:23 schrieb Sui jingfeng:
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Remove all codepaths that implement fbdev output directly on GEM
buffers. Always allocate a shadow buffer in system memory and set
up deferred I/O for mmap.
The fbdev
Quoting Matti Vaittinen (2023-03-20 22:45:52)
> Morning Stephen,
>
> On 3/20/23 21:23, Stephen Boyd wrote:
> > Quoting Matti Vaittinen (2023-03-18 23:36:20)
> >>>
> >>> I think you would have an easier time if you just copied and renamed
> >>> them into the kunit folder as an preparation series.
Am 17.03.23 um 15:45 schrieb Alex Deucher:
On Thu, Mar 16, 2023 at 7:09 PM Stefano Stabellini
wrote:
On Thu, 16 Mar 2023, Juergen Gross wrote:
On 16.03.23 14:53, Alex Deucher wrote:
On Thu, Mar 16, 2023 at 9:48 AM Juergen Gross wrote:
On 16.03.23 14:45, Alex Deucher wrote:
On Thu, Mar 16,
Hi Mikhail,
Am 20.03.23 um 13:05 schrieb Mikhail Gavrilov:
Hi,
after enabling KASAN literally I was bombarded with messages about
slab-use-after-free in drm_sched_get_cleanup_job.
mhm, interesting.
All messages has similar backtrace:
[ 1138.492091]
clang with W=1 reports
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c:56:35: error:
unused function 'vmw_overlay' [-Werror,-Wunused-function]
static inline struct vmw_overlay *vmw_overlay(struct drm_device *dev)
^
This function is not used, so remove it.
A kzalloc()+memcpy() can be optimized in a single kmemdup().
This saves a few cycles because some memory doesn't need to be zeroed.
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git
> Although we now sanitycheck MMIO access during driver load to make sure
> the MMIO BAR isn't returning all 0x, there have been a few cases
> where (temporarily?) unreliable MMIO access has happened after GPU
> resets or power events. We'll often notice this on our next GT register
>
> We occasionally see the PCI device in a non-accessible state at the
> point the driver is loaded. When this happens, all BAR accesses will
> read back as 0x. Rather than reading registers and
> misinterpreting their (invalid) values, let's specifically check for
> 0x in a
From: Matt Roper
Although we now sanitycheck MMIO access during driver load to make sure
the MMIO BAR isn't returning all 0x, there have been a few cases
where (temporarily?) unreliable MMIO access has happened after GPU
resets or power events. We'll often notice this on our next GT
From: Matt Roper
We occasionally see the PCI device in a non-accessible state at the
point the driver is loaded. When this happens, all BAR accesses will
read back as 0x. Rather than reading registers and
misinterpreting their (invalid) values, let's specifically check for
0x
Hi,
just copy pasting Matt's original cover letter:
We're periodically facing problems in CI where all registers read back
as 0x. In general this is what happens when the CPU is unable
to communicate with a PCI device, so the transaction autocompletes with
all F's as a placeholder.
Hello,
syzbot found the following issue on:
HEAD commit:f3594f0204b7 Add linux-next specific files for 20230321
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=161552eec8
kernel config: https://syzkaller.appspot.com/x/.config?x=f22105589e896af1
Hello,
syzbot found the following issue on:
HEAD commit:fe15c26ee26e Linux 6.3-rc1
git tree: git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git
for-kernelci
console output: https://syzkaller.appspot.com/x/log.txt?x=11bc9c16c8
kernel config:
Hello Maxime,
On Tue Mar 21, 2023 at 3:56 PM CET, Maxime Ripard wrote:
>
> This is similar to
> https://lore.kernel.org/all/20230319160704.9858-2-fr...@oltmanns.dev/
>
> What's the story there?
Yes, Frank Oltmanns wrote me recently in relation to a patch I wrote
~ 3 years ago that addressed the
Hi Jani,
Thanks for looking into this,
[...]
> > +#define COND (__raw_uncore_read32(uncore, FORCEWAKE_MT) != ~0)
> > + if (wait_for(COND, 2000) == -ETIMEDOUT) {
>
> I guess this somewhat reimplements intel_wait_for_register_fw()?
Thanks!
Andi
> > + drm_err(>drm, "Device is
Tested-by: Sui Jingfeng
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Export the fb_info release code as drm_fb_helper_release_info(). Will
help with cleaning up failed fbdev probing.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
Acked-by: Zack Rusin
---
Tested-by: Sui Jingfeng
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Consolidate all handling of CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM by
making the module parameter optional in drm_fb_helper.c.
Without the config option, modules can set smem_start in struct
fb_info for internal usage, but not
I have tested this patch on my loongson mips64el machine,
not seeing any weird happens.
Tested-by: Sui Jingfeng
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Rename symbols to match the style of other fbdev-emulation source
code. No functional changes.
Signed-off-by: Thomas Zimmermann
Hi Randy,
On Tue, Mar 21, 2023 at 4:10 PM Randy Dunlap wrote:
> On 3/21/23 00:34, Geert Uytterhoeven wrote:
> > On Tue, Mar 21, 2023 at 6:38 AM Randy Dunlap wrote:
> >> On 3/20/23 01:21, Geert Uytterhoeven wrote:
> >>> Below is the list of build error/warning regressions/improvements in
> >>>
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Remove all codepaths that implement fbdev output directly on GEM
buffers. Always allocate a shadow buffer in system memory and set
up deferred I/O for mmap.
The fbdev code that operated directly on GEM buffers was used by
drivers based on GEM DMA
On 21/03/2023 15:02, Johan Hovold wrote:
On Mon, Mar 06, 2023 at 11:07:12AM +0100, Johan Hovold wrote:
I had reasons to look closer at the MSM DRM driver error handling and
realised that it had suffered from a fair amount of bit rot over the
years.
Unfortunately, I started fixing this in my
On 21/03/2023 15:28, Jayesh Choudhary wrote:
>
>
> On 21/03/23 18:08, Krzysztof Kozlowski wrote:
>> On 21/03/2023 13:02, Jayesh Choudhary wrote:
> +type: boolean
> +description:
> + Set if the HPD line on the bridge isn't hooked up to anything or is
> +
On 06/03/2023 12:07, Johan Hovold wrote:
In case of early initialisation errors and on platforms that do not use
the DPU controller, the deinitilisation code can be called with the kms
pointer set to NULL.
Fixes: f026e431cf86 ("drm/msm: Convert to Linux IRQ interfaces")
Cc:
The thread is:
https://gitlab.freedesktop.org/wayland/wayland-protocols/-/issues/87
Hiya,
On 3/21/23 00:34, Geert Uytterhoeven wrote:
> Hi Randy,
>
> On Tue, Mar 21, 2023 at 6:38 AM Randy Dunlap wrote:
>> On 3/20/23 01:21, Geert Uytterhoeven wrote:
>>> Below is the list of build error/warning regressions/improvements in
>>> v6.3-rc3[1] compared to v6.2[2].
>>>
>>> Summarized:
On 3/6/23 01:06, Geert Uytterhoeven wrote:
> With gcc-5 and CONFIG_UBSAN_SHIFT=y:
>
> drivers/gpu/drm/msm/msm_mdss.c: In function 'msm_mdss_enable':
> drivers/gpu/drm/msm/msm_mdss.c:296:2: error: case label does not reduce
> to an integer constant
> case DPU_HW_VER_800:
>
On 3/21/2023 4:34 AM, Oded Gabbay wrote:
On Mon, Mar 20, 2023 at 5:11 PM Jeffrey Hugo wrote:
Add the QAIC driver uapi file and core driver file that binds to the PCIe
device. The core driver file also creates the accel device and manages
all the interconnections between the different parts of
On 06/03/2023 12:07, Johan Hovold wrote:
In case of early initialisation errors and on platforms that do not use
the DPU controller, the deinitilisation code can be called with the kms
pointer set to NULL.
Fixes: 98659487b845 ("drm/msm: add support to take dpu snapshot")
Cc:
Hi,
On Sun, Mar 19, 2023 at 05:07:04PM +0100, Frank Oltmanns wrote:
> Set the required PLL rate by adjusting the dotclock rate when calling
> clk_set_rate() when using DSI.
>
> According to the Allwinners A64's BSP code, a TCON divider of 4 has to
> be used and the PLL rate needs to be set to
Hi,
On Mon, Mar 20, 2023 at 05:16:36PM +0100, Roman Beranek wrote:
> In the case of DSI output, the value of SUN4I_TCON0_DCLK_DIV (4) does
> not represent the actual dotclock divider, PLL_MIPI instead runs at
> (bpp / lanes )-multiple [1] of the dotclock. [2] Setting 4 as dotclock
> divder thus
On 06/03/2023 12:07, Johan Hovold wrote:
Make sure to free the DRM device also in case of early errors during
bind().
Fixes: 2027e5b3413d ("drm/msm: Initialize MDSS irq domain at probe time")
Cc: sta...@vger.kernel.org # 5.17
Cc: Dmitry Baryshkov
Signed-off-by: Johan Hovold
Can we
On 3/21/23 02:49, Melissa Wen wrote:
> O 03/20, Randy Dunlap wrote:
>>
>>
>> On 3/20/23 16:46, Melissa Wen wrote:
>>> On 03/17, Lee Jones wrote:
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/vkms/vkms_composer.c:41: warning: Function parameter or
member
On Tue, 07 Mar 2023, Jani Nikula wrote:
> On Tue, 07 Mar 2023, Jani Nikula wrote:
>> On Thu, 02 Mar 2023, Arun R Murthy wrote:
>>> Enable SDP error detection configuration, this will set CRC16 in
>>> 128b/132b link layer.
>>> For Display version 13 a hardware bit31 in register VIDEO_DIP_CTL is
On 06/03/2023 12:07, Johan Hovold wrote:
Move the include of of_address.h to the top of the file where it
belongs.
Signed-off-by: Johan Hovold
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_drv.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--
With best wishes
From: Ville Syrjälä
Tweak the parameters we pass to the cursor size_ok() functions
in preparation for using them to populate the SIZE_HINT property.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_cursor.c | 63 +++--
1 file changed, 32 insertions(+), 31
From: Ville Syrjälä
Advertize more suitable cursor sizes via the new SIZE_HINTS
plane property.
Here are some examples on various platforms:
ivb+:
31 SIZE_HINTS:
flags: immutable blob
blobs:
value:
From: Ville Syrjälä
Add a new immutable plane property by which a plane can advertise
a handful of recommended plane sizes. This would be mostly exposed
by cursor planes as a slightly more capable replacement for
the DRM_CAP_CURSOR_WIDTH/HEIGHT caps, which can only declare
a one size fits all
From: Ville Syrjälä
I was pondering how I'd be able to do non-square cursor
sizes without have a massive list of them in the SIZE_HINTS
blob.
So I came up with this idea of having a 2D bitmap in
there to indicate support for (mostly) POT non-square
sizes..
What does everyone think? Is this
On Tue, Mar 21, 2023 at 6:24 AM Jonas Ådahl wrote:
>
> On Fri, Mar 17, 2023 at 08:59:48AM -0700, Rob Clark wrote:
> > On Fri, Mar 17, 2023 at 3:23 AM Jonas Ådahl wrote:
> > >
> > > On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote:
> > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl
On Tue, Mar 21, 2023 at 02:27:08PM +0100, Neil Armstrong wrote:
> Anyway for this patch, sorry for the delay, but it's looks fine:
>
> Acked-by: Neil Armstrong
Thanks for reviewing!
Johan
On Mon, Mar 20, 2023 at 09:11:07AM -0600, Jeffrey Hugo wrote:
> +AIC100 defines a number of MHI channels for different purposes. This is a
> list
> +of the defined channels, and their uses.
> +
> +| QAIC_LOOPBACK
> +| Channels 0 & 1
> +| Valid for AMSS
> +| Any data sent to the device on this
On 21/03/2023 14:14, Johan Hovold wrote:
On Thu, Mar 09, 2023 at 10:41:18PM +0100, Martin Blumenstingl wrote:
On Mon, Mar 6, 2023 at 11:35 AM Johan Hovold wrote:
[...]
@@ -325,23 +325,23 @@ static int meson_drv_bind_master(struct device *dev, bool
has_components)
ret =
On Fri, Mar 17, 2023 at 08:59:48AM -0700, Rob Clark wrote:
> On Fri, Mar 17, 2023 at 3:23 AM Jonas Ådahl wrote:
> >
> > On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote:
> > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote:
> > > >
> > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700,
On Thu, Mar 09, 2023 at 10:41:18PM +0100, Martin Blumenstingl wrote:
> On Mon, Mar 6, 2023 at 11:35 AM Johan Hovold wrote:
> [...]
> > @@ -325,23 +325,23 @@ static int meson_drv_bind_master(struct device *dev,
> > bool has_components)
> >
> > ret = meson_encoder_hdmi_init(priv);
> I'm
Hi Daniel
On Tue, Mar 21, 2023 at 1:15 PM Daniel Stone wrote:
>
> Hi,
>
> On Tue, 21 Mar 2023 at 12:08, Jani Nikula wrote:
> > On Tue, 21 Mar 2023, Daniel Stone wrote:
> > > There have been some threads - mostly motivated by MacBooks and the
> > > Asahi team - about creating a KMS property to
FWIW, I still think this series is good (minus the UAPI changes) and
would allow us to work on user space HDR support without custom
kernels.
On Fri, Jan 13, 2023 at 5:24 PM Harry Wentland wrote:
>
> This patchset enables the DP and HDMI infoframe properties
> in amdgpu.
>
> The first two
On Tue, Mar 21, 2023 at 12:58:22PM +, Mark Brown wrote:
> On Tue, Mar 21, 2023 at 05:18:03AM -0700, KernelCI bot wrote:
>
> The KernelCI bisection bot found a boot bisection on one of the HP
> ChromeBooks in v5.10.175 triggered by b5005605013d ("drm/i915: Don't use
> BAR mappings for ring
On Mon, Mar 06, 2023 at 11:07:12AM +0100, Johan Hovold wrote:
> I had reasons to look closer at the MSM DRM driver error handling and
> realised that it had suffered from a fair amount of bit rot over the
> years.
>
> Unfortunately, I started fixing this in my 6.2 branch and failed to
> notice
On Tue, Mar 21, 2023 at 05:18:03AM -0700, KernelCI bot wrote:
The KernelCI bisection bot found a boot bisection on one of the HP
ChromeBooks in v5.10.175 triggered by b5005605013d ("drm/i915: Don't use
BAR mappings for ring buffers with LLC"). The system appears to die
very early in boot with no
From: Martin Krastev
LGTM!
Reviewed-by: Martin Krastev
Regards,
Martin
On 21.03.23 г. 4:09 ч., Zack Rusin wrote:
From: Zack Rusin
virtualbox implemented an incomplete version of the svga device which
they decided to drop soon after the initial release. The device was
always broken in
On Fri, Mar 03, 2023 at 05:48:03PM +0100, Johan Hovold wrote:
> As reported by Bjorn, we can end up with an unbalanced runtime PM
> disable count if unbind() is called before the DRM device is opened
> (e.g. if component bind fails due to the panel driver not having been
> loaded yet).
>
> As
On 21/03/2023 13:02, Jayesh Choudhary wrote:
>>
>>> +type: boolean
>>> +description:
>>> + Set if the HPD line on the bridge isn't hooked up to anything or is
>>> + otherwise unusable.
>>
>> It's the property of the panel, not bridge. Unless you want to say that
>> bridge
Add ovl_adaptor driver for MT8195.
Ovl_adaptor is an encapsulated module and designed for simplified
DRM control flow. This module is composed of 8 RDMAs, 4 MERGEs and
an ETHDR. Two RDMAs merge into one layer, so this module support 4
layers.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
MT8195 have two mmsys. Modify drm for MT8195 multi-mmsys support.
The two mmsys (vdosys0 and vdosys1) will bring up two drm drivers,
only one drm driver register as the drm device.
Each drm driver binds its own component. The last bind drm driver
allocates and registers the drm device to drm core.
This is a preparation for adding support for the ovl_adaptor sub driver
Ovl_adaptor is a DRM sub driver, which doesn't have dma dev. Add
dma_dev_get function for getting representative dma dev in ovl_adaptor.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioachino Del Regno
Reviewed-by: CK Hu
Add driver data of mt8195 vdosys1 to mediatek-drm.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 17 -
1 file changed, 16
Add drm ovl_adaptor sub driver. Bring up ovl_adaptor sub driver if
the component exists in the path.
Signed-off-by: Nancy.Lin
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: CK Hu
Tested-by: AngeloGioacchino Del Regno
Tested-by: Bo-Chen Chen
Tested-by: Nícolas F. R. A. Prado
---
Add vdosys1 ETHDR definition.
Signed-off-by: Nancy.Lin
Reviewed-by: Chun-Kuang Hu
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Krzysztof Kozlowski
Tested-by: AngeloGioacchino Del Regno
---
.../display/mediatek/mediatek,ethdr.yaml | 182 ++
1 file changed, 182
ETHDR is a part of ovl_adaptor.
ETHDR is designed for HDR video and graphics conversion in the external
display path. It handles multiple HDR input types and performs tone
mapping, color space/color format conversion, and then combine
different layers, output the required HDR or SDR signal to the
The hardware path of vdosys1 with DPTx output need to go through by several
modules, such as, OVL_ADAPTOR and MERGE.
Add DRM and these modules support by the patches below:
Changes in v30:
- rebase to next-20230321
- fix ethdr dt_binding_check message
Changes in v29:
- rebase to next-20221226
Hi,
On Tue, 21 Mar 2023 at 12:08, Jani Nikula wrote:
> On Tue, 21 Mar 2023, Daniel Stone wrote:
> > There have been some threads - mostly motivated by MacBooks and the
> > Asahi team - about creating a KMS property to express invisible areas.
> > This would be the same thing, and the userspace
Well, this patch looks good to me.
Tested-by: Sui Jingfeng
On 2023/3/20 23:07, Thomas Zimmermann wrote:
Remove the flag prefer_shadow_fbdev from struct drm_mode_config.
Drivers set this flag to enable shadow buffering in the generic
fbdev emulation. Such shadow buffering is now mandatory, so
On Tue, 21 Mar 2023, Daniel Stone wrote:
> Hi,
>
> On Tue, 21 Mar 2023 at 11:24, Jani Nikula wrote:
>> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
>> wrote:
>> > On Tue, Mar 21, 2023 at 11:43 AM Jani Nikula
>> > wrote:
>> >> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
>> >> wrote:
Hi Daniel
On Tue, Mar 21, 2023 at 12:49 PM Daniel Stone wrote:
>
> Hi,
>
> On Tue, 21 Mar 2023 at 11:24, Jani Nikula wrote:
> > On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
> > wrote:
> > > On Tue, Mar 21, 2023 at 11:43 AM Jani Nikula
> > > wrote:
> > >> On Tue, 21 Mar 2023, Michael
Hi,
On Tue, 21 Mar 2023 at 11:24, Jani Nikula wrote:
> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
> wrote:
> > On Tue, Mar 21, 2023 at 11:43 AM Jani Nikula
> > wrote:
> >> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
> >> wrote:
> >> > I would like to know the best approach in the
From: Ye Xingchen
Convert platform_get_resource_byname(),devm_ioremap_resource() to a single
call to devm_platform_ioremap_resource_byname(), as this is exactly what
this function does.
Signed-off-by: Ye Xingchen
---
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 3 +--
1 file changed, 1
On Mon, 20 Mar 2023, Andi Shyti wrote:
> From: Matt Roper
>
> We occasionally see the PCI device in a non-accessible state at the
> point the driver is loaded. When this happens, all BAR accesses will
> read back as 0x. Rather than reading registers and
> misinterpreting their
On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
wrote:
> Hi
>
> On Tue, Mar 21, 2023 at 11:43 AM Jani Nikula
> wrote:
>>
>> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
>> wrote:
>> > Hi all
>> >
>> > I would like to know the best approach in the graphics subsystem how
>> > deal with
The documentation for some of the driver structures in mediatek-drm
was set to be kerneldoc but some code additions didn't actually update
the comments accordingly and this caused triggering some warnings.
Add comments for the remaining undocumented entries; while at it, also
clarify some
Hi
On Tue, Mar 21, 2023 at 11:43 AM Jani Nikula
wrote:
>
> On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
> wrote:
> > Hi all
> >
> > I would like to know the best approach in the graphics subsystem how
> > deal with panels where the display area is different from the visible
> > area
Hi,
On 3/13/23 16:39, Javier Martinez Canillas wrote:
> Hans de Goede writes:
>
> Hello Hans,
>
>> Like the Windows Lenovo Yoga Book X91F/L the Android Lenovo Yoga Book
>> X90F/L has a portrait 1200x1920 screen used in landscape mode,
>> add a quirk for this.
>>
>> When the quirk for the
On Tue, 21 Mar 2023, Michael Nazzareno Trimarchi
wrote:
> Hi all
>
> I would like to know the best approach in the graphics subsystem how
> deal with panels where the display area is different from the visible
> area because the display has a band left and right. I have already
> done the drm
On Mon, Mar 20, 2023 at 5:11 PM Jeffrey Hugo wrote:
>
> Add the QAIC driver uapi file and core driver file that binds to the PCIe
> device. The core driver file also creates the accel device and manages
> all the interconnections between the different parts of the driver.
>
> The driver can be
Hi all
I would like to know the best approach in the graphics subsystem how
deal with panels where the display area is different from the visible
area because the display has a band left and right. I have already
done the drm driver for the panel but from userspace point of view
it's a pain to
Il 21/03/23 06:33, Nancy Lin (林欣螢) ha scritto:
Dear Angelo,
Sorry for late reply.
On Fri, 2023-03-17 at 10:58 +0100, AngeloGioacchino Del Regno wrote:
Il 17/03/23 10:52, Nancy Lin (林欣螢) ha scritto:
On Fri, 2023-03-17 at 10:37 +0100, AngeloGioacchino Del Regno
wrote:
Il 17/03/23 10:03,
O 03/20, Randy Dunlap wrote:
>
>
> On 3/20/23 16:46, Melissa Wen wrote:
> > On 03/17, Lee Jones wrote:
> >> Fixes the following W=1 kernel build warning(s):
> >>
> >> drivers/gpu/drm/vkms/vkms_composer.c:41: warning: Function parameter or
> >> member 'frame_info' not described in
Hi
Am 20.03.23 um 16:23 schrieb Alex Deucher:
On Mon, Mar 20, 2023 at 11:19 AM Thomas Zimmermann wrote:
Hi
Am 20.03.23 um 16:11 schrieb Christian König:
Am 17.03.23 um 10:20 schrieb Thomas Zimmermann:
Hi Christian
Am 17.03.23 um 09:53 schrieb Christian König:
Am 16.03.23 um 10:37
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