Hi Dave, Daniel,
Fixes for 6.4.
The following changes since commit 7877cb91f1081754a1487c144d85dc0d2e2e7fc4:
Linux 6.4-rc4 (2023-05-28 07:49:00 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.4-2023-05-31
for you to
Hi,Doug:
Can you help me merge the V4 seria patch.thanks.
On Thu, May 25, 2023 at 5:32 PM Cong Yang <
yangco...@huaqin.corp-partner.google.com> wrote:
> The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence,
To acquire the voltage and current info from gpu_metrics interface,
but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible,
add new gpu_metrics_v2_4 structure.
Acked-by: Evan Quan
Signed-off-by: Wenyou Yang
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 69 +++
On 2023/5/31 16:31, Dan Carpenter wrote:
On Wed, May 31, 2023 at 12:38:26PM +0800, Su Hui wrote:
Use struct_size() instead of hand writing it.
This is less verbose and more informative.
Signed-off-by: Su Hui
---
drivers/gpu/drm/nouveau/nvif/object.c | 2 +-
1 file changed, 1 insertion(+),
If we switch display and update cursor together, it could lead to
modeset failed because of concurrent access to IO registers.
Add lock protection in DP's edid access to avoid this problem.
Reviewed-by: Thomas Zimmermann
Signed-off-by: Jammy Huang
---
v3 changes:
- Update label name after
On 5/25/2023 4:48 PM, Teres Alexis, Alan Previn wrote:
Considering the only request i have below is touching up of existing comments
(as
far as this patch is concerned), and since the rest of the code looks good,
here is
my R-b - but i hope you can anwser my newbie question at the bottom:
On 5/26/2023 3:57 PM, Teres Alexis, Alan Previn wrote:
On Fri, 2023-05-05 at 09:04 -0700, Ceraolo Spurio, Daniele wrote:
Add a new debugfs to dump information about the GSC. This includes:
alan:snip
Actually everything looks good except for a couple of questions + asks - hope
we can close
On 23/05/2023 10:46, Konrad Dybcio wrote:
[skipped the changelog]
---
Konrad Dybcio (12):
dt-bindings: display/msm: dsi-controller-main: Add SM6350
dt-bindings: display/msm: dsi-controller-main: Add SM6375
dt-bindings: display/msm: sc7180-dpu: Describe SM6350 and SM6375
On 23/05/2023 11:34, Rob Herring wrote:
On Tue, 23 May 2023 09:46:15 +0200, Konrad Dybcio wrote:
Document the SM6350 MDSS.
Signed-off-by: Konrad Dybcio
---
.../bindings/display/msm/qcom,sm6350-mdss.yaml | 214 +
1 file changed, 214 insertions(+)
My bot found
On MTL, for obvious reasons, HuC is only available on the media tile.
We already disable SW support for HuC on the root gt due to the
absence of VCS engines, but we also need to update the getparam to point
to the HuC struct in the media GT.
Signed-off-by: Daniele Ceraolo Spurio
Cc: John
Follow the same logic as DG2, so just a meu binary with no version number.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan Previn
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
Now that each FW has its own reserved area, we can keep them always
pinned and skip the pin/unpin dance on reset. This will make things
easier for the 2-step HuC authentication, which requires the FW to be
pinned in GGTT after the xfer is completed.
Since the vma is now valid for a long time and
The new binaries that support the 2-step authentication contain the
legacy-style binary, which we can use for loading the HuC via DMA. To
find out where this is located in the image, we need to parse the
manifest of the GSC-enabled HuC binary. The manifest consist of a
partition header followed by
Before we add the second step of the MTL HuC auth (via GSC), we need to
have the ability to differentiate between them. To do so, the huc
authentication check is duplicated for GuC and GSC auth, with
GSC-enabled binaries being considered fully authenticated only after
the GSC auth step.
To report
In the previous patch we extracted the offset of the legacy-style HuC
binary located within the GSC-enabled blob, so now we can use that to
load the HuC via DMA if the fuse is set that way.
Note that we now need to differentiate between "GSC-enabled binary" and
"loaded by GSC", so the former case
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
The intel_huc_auth function is also updated to handle both authentication
types.
v2: check that the GuC auth for clear media
The HuC loading and authentication flow is once again changing and a new
"clear-media only" authentication step is introduced. The flow is as
follows:
1) The HuC is loaded via DMA - same as all non-GSC HuC binaries.
2) The HuC is authenticated by the GuC - this is the same step as
performed for
Hi Andi,
> -Original Message-
> From: Andi Shyti
> Sent: Wednesday, May 31, 2023 9:06 PM
> To: lm0963
> Cc: inki@samsung.com; sw0312@samsung.com;
> kyungmin.p...@samsung.com; airl...@gmail.com; dan...@ffwll.ch;
> krzysztof.kozlow...@linaro.org; alim.akh...@samsung.com; dri-
>
e. (Thanks Marek for the suggestion!)
To reproduce the original problem against linux-next 20230531:
- Enable the mipi_dsi node on imx8mp-dhcom-som.dtsi
_dsi {
samsung,burst-clock-frequency = <16000>;
samsung,esc-clock-frequency = <1000>;
+ status = "okay";
On 5/31/23 12:18 PM, Krzysztof Kozlowski wrote:
On 25/05/2023 01:01, Justin Chen wrote:
From: Florian Fainelli
Add a binding document for the Broadcom ASP 2.0 Ethernet
controller.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
v5
- Fix compatible string yaml
On 5/24/23 16:01, Justin Chen wrote:
Add support for the Broadcom ASP 2.0 Ethernet controller which is first
introduced with 72165. This controller features two distinct Ethernet
ports that can be independently operated.
This patch supports:
- Wake-on-LAN using magic packets
- basic ethtool
On 31.05.2023 05:09, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Introduce support for the Adreno A690, found in Qualcomm SC8280XP.
>
> Tested-by: Steev Klimaszewski
> Reviewed-by: Konrad Dybcio
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
Couple of
On 31.05.2023 05:09, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Add Adreno SMMU, GPU clock controller, GMU and GPU nodes for the
> SC8280XP.
>
> Tested-by: Steev Klimaszewski
> Signed-off-by: Bjorn Andersson
> Signed-off-by: Bjorn Andersson
> ---
Reviewed-by: Konrad Dybcio
On 31/05/2023 21:12, Fabio Estevam wrote:
> On 31/05/2023 15:56, Krzysztof Kozlowski wrote:
>
>> This would have sense if you kept original intention, so
>> additionalProperties: false
>>
>> Without it - you just break bindings to hide warning.
>
> I am not sure I understood your suggestion.
>
On 31.05.2023 05:09, Bjorn Andersson wrote:
> From: Bjorn Andersson
>
> Add memory reservation for the zap-shader and enable the Adreno SMMU,
> GPU clock controller, GMU and the GPU nodes for the SC8280XP CRD and the
> Lenovo ThinkPad X13s.
>
> Tested-by: Steev Klimaszewski
> Signed-off-by:
On 5/30/23 01:39, Dmitry Osipenko wrote:
> Change locking policy of mmap() callback, making exporters responsible
> for handling dma-buf reservation locking. Previous locking policy stated
> that dma-buf is locked for both importers and exporters by the dma-buf
> core, which caused a deadlock
https://bugzilla.kernel.org/show_bug.cgi?id=217514
rLy (r...@hotmail.hu) changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
On 5/31/23 12:31, Krzysztof Kozlowski wrote:
On 31/05/2023 21:29, Florian Fainelli wrote:
+required:
+ - reg
+ - brcm,channel
+
+additionalProperties: false
+
+patternProperties:
+ "^mdio@[0-9a-f]+$":
Isn't mdio a property of each ethernet port? Existing users
On 31/05/2023 21:29, Florian Fainelli wrote:
>>> +required:
>>> + - reg
>>> + - brcm,channel
>>> +
>>> +additionalProperties: false
>>> +
>>> +patternProperties:
>>> + "^mdio@[0-9a-f]+$":
>>
>> Isn't mdio a property of each ethernet port? Existing users
>>
On 5/31/23 12:18, Krzysztof Kozlowski wrote:
On 25/05/2023 01:01, Justin Chen wrote:
From: Florian Fainelli
Add a binding document for the Broadcom ASP 2.0 Ethernet
controller.
Signed-off-by: Florian Fainelli
Signed-off-by: Justin Chen
---
v5
- Fix compatible string yaml format to
On 25/05/2023 01:01, Justin Chen wrote:
> From: Florian Fainelli
>
> Add a binding document for the Broadcom ASP 2.0 Ethernet
> controller.
>
> Signed-off-by: Florian Fainelli
> Signed-off-by: Justin Chen
> ---
> v5
> - Fix compatible string yaml format to properly capture what we want
On 31/05/2023 15:56, Krzysztof Kozlowski wrote:
This would have sense if you kept original intention, so
additionalProperties: false
Without it - you just break bindings to hide warning.
I am not sure I understood your suggestion.
Is this what you mean?
diff --git
On 29/05/2023 16:30, Guillaume Ranquet wrote:
> Add mt8195 SoC bindings for hdmi and hdmi-ddc
>
> On mt8195 the ddc i2c controller is part of the hdmi IP block and thus has no
> specific register range, power domain or interrupt, making it simpler
> than the legacy "mediatek,hdmi-ddc" binding.
>
On 31/05/2023 03:43, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Use port-base reference for port@0 and port@1.
>
> This fixes the following schema warning:
>
> imx8mm-evk.dtb: dsi@32e1: ports:port@1:endpoint: Unevaluated properties
> are not allowed ('data-lanes' was unexpected)
>
Force a modeset if the new FB has a different format than the
currently active one. While it might be possible to change between
compatible formats without a full modeset as the format control is
also supposed to be double buffered, the colorspace conversion is
not, so when the CSC changes we need
The buffer pitch may change when switching the buffer on a
atomic update. As the register is double buffered it can be
safely changed while the display is active.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 30 +-
1 file changed, 17
[Public]
> -Original Message-
> From: Alex Deucher
> Sent: Wednesday, May 31, 2023 2:15 PM
> To: Kuehling, Felix
> Cc: Kim, Jonathan ; amd-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Huang, JinHuiEric
>
> Subject: Re: [PATCH 01/33] drm/amdkfd: add debug and runtime
On 5/31/2023 3:07 AM, Dmitry Baryshkov wrote:
On 31/05/2023 06:05, Abhinav Kumar wrote:
On 5/30/2023 7:53 PM, Dmitry Baryshkov wrote:
On Wed, 31 May 2023 at 03:54, Abhinav Kumar
wrote:
With [1] dpu core revision was dropped in favor of using the
compatible string from the device tree
On Fri, May 19, 2023 at 08:36:34PM +0200, Janusz Krzysztofik wrote:
> diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
> index 15ae4d6ba4768..56466afd04307 100644
> --- a/arch/x86/include/asm/pgtable.h
> +++ b/arch/x86/include/asm/pgtable.h
> @@ -654,8 +654,10 @@ static
On Thu, Mar 30, 2023 at 12:04 PM Kim, Jonathan wrote:
>
> [Public]
>
> Hi Felix,
>
> That is correct. The debugger will need sq_int_priv to work.
I'll just apply this for now. We can squash the revert into the
debugger changes once those land.
Alex
>
> Thanks,
>
> Jon
>
> > -Original
On Tue, May 30, 2023 at 3:17 PM Felix Kuehling wrote:
>
> Am 2023-05-25 um 13:27 schrieb Jonathan Kim:
> > Introduce the GPU debug operations interface.
> >
> > For ROCm-GDB to extend the GNU Debugger's ability to inspect the AMD GPU
> > instruction set, provide the necessary interface to allow
Document the 1080x2340 Visionox R66451 AMOLED DSI panel bindings
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Jessica Zhang
---
.../bindings/display/panel/visionox,r66451.yaml| 59 ++
1 file changed, 59 insertions(+)
diff --git
Add support for the 1080x2340 Visionox R66451 AMOLED DSI panel that
comes with the Qualcomm HDK8350 display expansion pack.
The driver will come with display compression (DSC v1.2) enabled by
default.
Signed-off-by: Jessica Zhang
---
Changes in v2:
- Reworded panel bindings commit message for
Add support for the 1080x2340 Visionox R66451 AMOLED DSI panel that
comes with the Qualcomm HDK8350 display expansion pack.
The panel enables display compression (DSC v1.2) by default.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/panel/Kconfig | 9 +
On 5/30/2023 5:33 PM, Teres Alexis, Alan Previn wrote:
On Fri, 2023-05-26 at 17:52 -0700, Ceraolo Spurio, Daniele wrote:
The full authentication via the GSC requires an heci packet submission
to the GSC FW via the GSC CS. The GSC has new PXP command for this
(literally called NEW_HUC_AUTH).
Am Mittwoch, dem 31.05.2023 um 00:06 +0800 schrieb Sui Jingfeng:
> Because it is also platform-dependent, there are environments where don't
> have CLK subsystem support, for example, discreted PCI gpu. So don't rage
> quit if there is no CLK subsystem.
>
> For the GPU in LS7a1000 and LS2k2000,
On Thu, Jun 01, 2023 at 01:44:52AM +0800, Sui Jingfeng wrote:
> Can you receive my email?
>
> I reply several email to you, but Thunderbird told me that may mail is
> returned.
>
> Maybe you could read the content at lore.
I do receive your email (at least some; obviously if there are things
I
On Wed, 31 May 2023 at 20:29, Kuogee Hsieh wrote:
>
>
> On 5/31/2023 10:12 AM, Dmitry Baryshkov wrote:
> > On Wed, 31 May 2023 at 18:41, Kuogee Hsieh wrote:
> >>
> >>
> +if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
> >>> INTF_DSI
> >>>
> +struct drm_bridge
Am Donnerstag, dem 01.06.2023 um 01:29 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/6/1 00:33, Lucas Stach wrote:
> > Hi Sui Jingfeng,
> >
> > Am Mittwoch, dem 31.05.2023 um 00:06 +0800 schrieb Sui Jingfeng:
> > > cached system RAM is coherent on loongson CPUs, and the GPU and DC allways
> > >
On 5/30/2023 4:12 PM, Dmitry Baryshkov wrote:
On 30/05/2023 23:09, Jessica Zhang wrote:
On 5/18/2023 3:17 PM, Jessica Zhang wrote:
On 5/17/2023 5:19 PM, Dmitry Baryshkov wrote:
On 16/05/2023 23:20, Jessica Zhang wrote:
Add support for the 1080x2340 Visionox R66451 AMOLED DSI panel
Hi,
Thanks a lot.
Can you receive my email?
I reply several email to you, but Thunderbird told me that may mail is
returned.
Maybe you could read the content at lore.
```
The recipient's server is busy or down now.
SMTP error, OPEN: Host kernel.org(35.85.114.177) OPEN said 521 5.7.1
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: d4cee89031c80066ec461bb77b5e13a4f37d5fd2 Add linux-next specific
files for 20230531
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202305311652.op9x8xkw-...@intel.com
Error
On 5/31/2023 10:12 AM, Dmitry Baryshkov wrote:
On Wed, 31 May 2023 at 18:41, Kuogee Hsieh wrote:
+if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
INTF_DSI
+struct drm_bridge *bridge;
+
+if (!dpu_enc->dsc) {
This condition is not correct. We should be
Hi,
On 2023/6/1 00:33, Lucas Stach wrote:
Hi Sui Jingfeng,
Am Mittwoch, dem 31.05.2023 um 00:06 +0800 schrieb Sui Jingfeng:
cached system RAM is coherent on loongson CPUs, and the GPU and DC allways
snoop the CPU's cache. write-combine caching property is not suitiable for
us.
As previously
On Wed, May 31, 2023 at 06:27:44PM +0800, Sui Jingfeng wrote:
> As some arch(m68k for example) doesn't have config_pci enabled, drivers[1]
> call pci_clear_master() without config_pci guard can not pass compile test.
>
>drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c:
>In function
https://bugzilla.kernel.org/show_bug.cgi?id=217514
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
On Wed, 31 May 2023 at 18:41, Kuogee Hsieh wrote:
>
>
>
> >> +if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
> >
> > INTF_DSI
> >
> >> +struct drm_bridge *bridge;
> >> +
> >> +if (!dpu_enc->dsc) {
> >
> > This condition is not correct. We should be updating the
Hi,
On 2023/6/1 00:23, Lucas Stach wrote:
Hi Sui Jingfeng,
Am Donnerstag, dem 01.06.2023 um 00:08 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/5/31 03:02, Bjorn Helgaas wrote:
On Wed, May 31, 2023 at 12:06:42AM +0800, Sui Jingfeng wrote:
This patch adds PCI driver support on top of what already
On Wed, May 31, 2023 at 09:28:35AM +0200, Johan Hovold wrote:
> On Tue, May 30, 2023 at 08:09:44PM -0700, Bjorn Andersson wrote:
> > From: Bjorn Andersson
> >
> > Add Adreno SMMU, GPU clock controller, GMU and GPU nodes for the
> > SC8280XP.
> >
> > Tested-by: Steev Klimaszewski
> >
From: Fei Yang
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a
Hi John,
On Wed, May 31, 2023 at 08:59:42AM -0700, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> There were a bunch of defines and structures left over from an API
> update a very long time ago. Remove them.
>
> Signed-off-by: John Harrison
> ---
>
https://bugzilla.kernel.org/show_bug.cgi?id=217514
--- Comment #1 from rLy (r...@hotmail.hu) ---
Created attachment 304362
--> https://bugzilla.kernel.org/attachment.cgi?id=304362=edit
amdgpu_error
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are
https://bugzilla.kernel.org/show_bug.cgi?id=217514
Bug ID: 217514
Summary: [amdgpu] system doesn't boot after linux-firmware
2023-05-23 ffe1a41e
Product: Drivers
Version: 2.5
Hardware: All
OS: Linux
Hi Sui Jingfeng,
Am Mittwoch, dem 31.05.2023 um 00:06 +0800 schrieb Sui Jingfeng:
> cached system RAM is coherent on loongson CPUs, and the GPU and DC allways
> snoop the CPU's cache. write-combine caching property is not suitiable for
> us.
>
As previously mentioned in the Mesa MR, I don't
Hi,
On 2023/6/1 00:23, Lucas Stach wrote:
Hi Sui Jingfeng,
Am Donnerstag, dem 01.06.2023 um 00:08 +0800 schrieb Sui Jingfeng:
Hi,
On 2023/5/31 03:02, Bjorn Helgaas wrote:
On Wed, May 31, 2023 at 12:06:42AM +0800, Sui Jingfeng wrote:
This patch adds PCI driver support on top of what already
Hi Sui Jingfeng,
Am Donnerstag, dem 01.06.2023 um 00:08 +0800 schrieb Sui Jingfeng:
> Hi,
>
> On 2023/5/31 03:02, Bjorn Helgaas wrote:
> > On Wed, May 31, 2023 at 12:06:42AM +0800, Sui Jingfeng wrote:
> > > This patch adds PCI driver support on top of what already have. Take the
> > > GC1000 in
Hi Yang,
kernel test robot noticed the following build warnings:
[auto build test WARNING on next-20230530]
url:
https://github.com/intel-lab-lkp/linux/commits/Yang-Li/drm-i915-remove-unreachable-code/20230531-101832
base: next-20230530
patch link:
https://lore.kernel.org/r
On Tue 30 May 2023 at 17:56, Neil Armstrong wrote:
> On 30/05/2023 10:08, Jerome Brunet wrote:
>> On Tue 30 May 2023 at 09:38, Neil Armstrong
>> wrote:
>>
>>> Exposing should not be done in a single commit anymore due to
>>> dt-bindings enforced rules.
>>>
>>> Prepend PRIV to the private CLK
Okey, that sound fine.
On 2023/5/31 21:37, Maxime Ripard wrote:
+Maxime Ripard
Maxime Ripard
--
Jingfeng
Hi,
On 2023/5/31 03:02, Bjorn Helgaas wrote:
On Wed, May 31, 2023 at 12:06:42AM +0800, Sui Jingfeng wrote:
This patch adds PCI driver support on top of what already have. Take the
GC1000 in LS7A1000/LS2K1000 as the first instance of the PCI device driver.
There is only one GPU core for the
From: John Harrison
There were a bunch of defines and structures left over from an API
update a very long time ago. Remove them.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 33 -
1 file changed, 33 deletions(-)
diff --git
+ if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
INTF_DSI
+ struct drm_bridge *bridge;
+
+ if (!dpu_enc->dsc) {
This condition is not correct. We should be updating the DSC even if
there is one.
+ bridge =
Hi Yang,
kernel test robot noticed the following build errors:
[auto build test ERROR on next-20230530]
url:
https://github.com/intel-lab-lkp/linux/commits/Yang-Li/drm-i915-remove-unreachable-code/20230531-101832
base: next-20230530
patch link:
https://lore.kernel.org/r
On Tue, 30 May 2023, Jani Nikula wrote:
> Rebase of https://patchwork.freedesktop.org/series/116813/
>
> Move struct drm_edid conversions forward.
>
> There are still some drm_edid_raw() stragglers, but this nudges things
> forward nicely.
>
> Jani Nikula (13):
> drm/edid: parse display info
Hi,
On Wed, May 31, 2023 at 1:00 AM Johan Hovold wrote:
>
> A recent commit started taking the GMU lock in the GPU destroy path,
> which on GPU initialisation failure is called before the GMU and its
> lock have been initialised.
>
> Make sure that the GMU has been initialised before taking the
Hi,
Thanks a lot, will be fixed at next version.
On 2023/5/31 02:58, Bjorn Helgaas wrote:
s/usperspace/userspace/ (in subject)
On Wed, May 31, 2023 at 12:06:43AM +0800, Sui Jingfeng wrote:
cached system RAM is coherent on loongson CPUs, and the GPU and DC allways
snoop the CPU's cache.
On 5/31/2023 4:45 PM, Christian König wrote:
> Am 31.05.23 um 08:20 schrieb Chen, Guchun:
>> [Public]
>>
>>> -Original Message-
>>> From: amd-gfx On Behalf Of Ma
>>> Jun
>>> Sent: Wednesday, May 31, 2023 1:31 PM
>>> To: amd-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
>
> Hi Biju,
>
> On Wed, May 31, 2023 at 2:53 PM Biju Das
> wrote:
> > > > * This function creates and returns an I2C ancillary client whose
> > > > I2C address
> > > > * is retrieved
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
From: Sukrut Bellary
[ Upstream commit 60ecaaf54886b0642d5c4744f7fbf1ff0d6b3e42 ]
smatch warning -
1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
2) drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:6901
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
From: Sukrut Bellary
[ Upstream commit 60ecaaf54886b0642d5c4744f7fbf1ff0d6b3e42 ]
smatch warning -
1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
2) drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:6901
Hi Laurent,
Thanks for the feedback.
> Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
>
> On Wed, May 31, 2023 at 12:53:18PM +, Biju Das wrote:
> > > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device
> > > API On Wed, May 31, 2023 at 09:34:06AM
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
From: Sukrut Bellary
[ Upstream commit 60ecaaf54886b0642d5c4744f7fbf1ff0d6b3e42 ]
smatch warning -
1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
2) drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:6901
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
Hi Biju,
On Wed, May 31, 2023 at 2:53 PM Biju Das wrote:
> > > * This function creates and returns an I2C ancillary client whose I2C
> > > address
> > > * is retrieved from the platform firmware based on the given slave
> > > name. If
> > > * aux_device_name is not NULL, the ancillary's device
From: Sukrut Bellary
[ Upstream commit 60ecaaf54886b0642d5c4744f7fbf1ff0d6b3e42 ]
smatch warning -
1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
2) drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:6901
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
From: Maya Matuszczyk
[ Upstream commit 1aa7f416175619e0286fddc5fc44e968b06bf2aa ]
It turned out that Aya Neo Air Plus had a different board name than
expected.
This patch changes Aya Neo Air's quirk to account for that, as both
devices share "Air" in DMI product name.
Tested on Air claiming
From: Sukrut Bellary
[ Upstream commit 60ecaaf54886b0642d5c4744f7fbf1ff0d6b3e42 ]
smatch warning -
1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
2) drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:6901
From: Helge Deller
[ Upstream commit d703797380c540bbeac03f104ebcfc364eaf47cc ]
Flush caches after changing gatt entries and calculate entry according
to SBA requirements.
Signed-off-by: Helge Deller
Signed-off-by: Sasha Levin
---
drivers/char/agp/parisc-agp.c | 15 ++-
1 file
From: Maya Matuszczyk
[ Upstream commit 1aa7f416175619e0286fddc5fc44e968b06bf2aa ]
It turned out that Aya Neo Air Plus had a different board name than
expected.
This patch changes Aya Neo Air's quirk to account for that, as both
devices share "Air" in DMI product name.
Tested on Air claiming
Hi Laurent,
On Wed, May 31, 2023 at 3:37 PM Laurent Pinchart
wrote:
> On Wed, May 31, 2023 at 02:51:48PM +0200, Geert Uytterhoeven wrote:
> > On Wed, May 31, 2023 at 10:59 AM Laurent Pinchart wrote:
> > > On Mon, May 29, 2023 at 09:00:43AM +, Biju Das wrote:
> > > > > Subject: Re: [PATCH v5
I've been using that email address for contributions for a while but it
seems I never added it to mailmap.
Signed-off-by: Maxime Ripard
---
.mailmap | 1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index a289b25ea2c7..c14eefed259c 100644
--- a/.mailmap
+++ b/.mailmap
@@
Hi Geert,
On Wed, May 31, 2023 at 02:51:48PM +0200, Geert Uytterhoeven wrote:
> On Wed, May 31, 2023 at 10:59 AM Laurent Pinchart wrote:
> > On Mon, May 29, 2023 at 09:00:43AM +, Biju Das wrote:
> > > > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
> > > > And why do
On Wed, May 31, 2023 at 12:53:18PM +, Biju Das wrote:
> > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
> > On Wed, May 31, 2023 at 09:34:06AM +, Biju Das wrote:
> > > > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device
> > > > API On Mon, May
Hi Laurent,
On Wed, May 31, 2023 at 10:59 AM Laurent Pinchart
wrote:
> On Mon, May 29, 2023 at 09:00:43AM +, Biju Das wrote:
> > > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
> > > And why do you need this ?
> >
> > As per Krzysztof [2],
> >
> > The DT schema
Hi Laurent,
Thanks for the feedback.
> Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device API
>
> Hi Biju,
>
> On Wed, May 31, 2023 at 09:34:06AM +, Biju Das wrote:
> > > Subject: Re: [PATCH v5 01/11] i2c: Enhance i2c_new_ancillary_device
> > > API On Mon, May 29, 2023 at
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