.
Moving the layers into the crtc facilitates binding them to the crtc
explicitly, by setting the corresponding bit in their .possible_crtcs
fields right after the crtc is initialized. This is done in a later
patch.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_
from the sun4i-drm module to the sun4i-tcon module to avoid
circular dependencies between the two modules. This is because sun4i-drm
also calls into sun4i-tcon.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/Makefile | 4 ++--
drivers/gpu/drm/sun4i/sun4i_drv.c
sunxi_rgb2yuv_coef is a table of RGB-to-YUV conversion coefficients.
They are programmed into the hardware, and can be declared constant.
Reported-by: Priit Laes <pl...@plaes.org>
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 2 +-
1 fil
The number of defined planes in sun4i_layer is unknown to other parts
of the sun4i drm driver. Since the return value of sun4i_layers_init
is a list of layers, make it return 1 more empty layer as an end of
list guard value.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm
.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_rgb.c | 27 +--
drivers/gpu/drm/sun4i/sun4i_rgb.h | 2 +-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 +-
3 files changed, 11 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i
to set it for overlay planes.
We also fix the value set for the RGB encoder, by referencing the
crtc set in sun4i_drv.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 9 +
drivers/gpu/drm/sun4i/sun4i_layer.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i
d tcon to
sun4i_crtc.
Please have a look. Notably, I do not have hardware to test patch 8,
though I do not expect any problems.
Still to come is the actual work of supporting many display pipelines.
Regards
ChenYu
Chen-Yu Tsai (11):
drm/sun4i: Make sunxi_rgb2yuv_coef constant
drm/sun4
be to pass the pointers in through
sun4i_crtc_init as parameters. This would make it easier to support
multiple display pipelines layer on.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 12 +---
drivers/gpu/drm/sun4i/sun4i_crtc.h | 3 ++-
2 files c
the pointer in through
sun4i_layers_init as a parameter. This would make it easier to support
multiple display pipelines layer on.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_layer.c | 8 +++-
drivers/gpu/drm/sun4i/sun4i_layer.h | 1 +
2 files changed, 4 inse
through the returned layers
to find the primary and cursor layers. And drop the pointer from the
sun4i_drv structure.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 25 +
drivers/gpu/drm/sun4i/sun4i_drv.h | 1 -
drivers/gpu/drm
The way drm_of_find_possible_crtcs is it tries to match the
remote-endpoint of the given node's various endpoints to all the
crtc's .port field. Thus we need to set drm_crtc.port to the output
port node of the underlying TCON.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm
tcons/crtcs.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index c6f47222e8fc..32ed5fdf0c4d 100644
--- a/drivers/g
>> >
>> > On Wednesday 07 Dec 2016 10:26:25 Chen-Yu Tsai wrote:
>> > > On Wed, Dec 7, 2016 at 1:29 AM, Maxime Ripard wrote:
>> > > > On Thu, Nov 24, 2016 at 07:22:31PM +0800, Chen-Yu Tsai wrote:
>> > > >> The panels shipped with Al
On Sun, Feb 12, 2017 at 1:43 AM, Priit Laes wrote:
> From: Jonathan Liu
>
This needs a commit message about why these need to be enabled, like
"Most Allwinner tablets use the same design of a dumb LCD panel coupled
with a PWM controlled backlight."
Also the
On Mon, Feb 13, 2017 at 5:16 PM, Maxime Ripard
wrote:
> Hi,
>
> On Sat, Feb 11, 2017 at 07:43:59PM +0200, Priit Laes wrote:
>> Added basic display pipeline consisting of tcon, display backend and
>> frontend blocks.
>>
>> Signed-off-by: Priit Laes
.
This requires the patch "drm/sun4i: Move drm_mode_config_cleanup call
to main driver", which splits out drm_mode_config_cleanup from
sun4i_framebuffer_free so we can call it separately.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 16 +++
and 2 fix up
possible memory and object leakage, but unless the user keeps unloading
and loading the modules, it won't leak past a few times.
Regards
ChenYu
Chen-Yu Tsai (7):
drm/sun4i: Move drm_mode_config_cleanup call to main driver
drm/sun4i: Fix up error path cleanup for master bind
ray. Change it to sizeof(*layers) to avoid wasting a lot of memory.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_layer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c
b/drivers/gpu/drm/sun4i/sun4i_laye
drm_vblank_init can fail due to insufficient memory. Ignoring the error
and proceeding may cause the kernel to dereference an invalid pointer
when vblank is enabled.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 6 +-
1 file changed, 5 insertions
The assignment found in the main loop in sun4i_layers_init:
struct sun4i_layer *layer = layers[i];
is useless as it gets overwritten by the next line:
layer = sun4i_layer_init_one(drm, plane);
Drop the assignment.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drive
-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_layer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c
b/drivers/gpu/drm/sun4i/sun4i_layer.c
index 92ecc967dcb1..41bc0f860f5c 100644
--- a/drivers/gpu/drm/sun4i/sun4i_layer.c
+++ b/drivers/g
sun4i_crtc_init can fail for a number of reasons. Instead of returning
a NULL pointer when it fails, pass back the encountered error using
ERR_PTR.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_crtc.c | 4 ++--
drivers/gpu/drm/sun4i/sun4i_drv.c | 4 ++--
2
drm_mode_config_cleanup is the complement of drm_mode_config_init, which
is called in the bind function of sun4i_drv. drm_mode_config_cleanup
should be put in the unbind function to match.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 1 +
d
On Tue, Oct 18, 2016 at 4:46 PM, Maxime Ripard
wrote:
> The planes can do more than what was previously exposed. Add support for
> them.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/sun4i/sun4i_backend.c | 20
> drivers/gpu/drm/sun4i/sun4i_layer.c | 6 ++
> - add back the HDMI driver
> - many bug fixes
> v4:
> - drivers/clk/sunxi/Makefile was missing (Emil Velikov)
> v3:
> - add the hardware cursor
> - simplify and fix the DE2 init sequences
> - generation for all SUNXI SoCs (An
Hi,
On Fri, Oct 21, 2016 at 4:36 PM, Jean-Francois Moine wrote:
> This patch adds I2S support to sun8i SoCs as the A83T and H3.
>
> Signed-off-by: Jean-Francois Moine
> ---
> Note: This driver is closed to the sun4i-i2s except that:
> - it handles the H3
If it's close to sun4i-i2s, you should
On Mon, Oct 24, 2016 at 10:40 PM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Oct 21, 2016 at 11:15:32AM +0800, Chen-Yu Tsai wrote:
>> On Tue, Oct 18, 2016 at 4:46 PM, Maxime Ripard
>> wrote:
>> > The planes can do more than what was previously exposed. Add support for
&
In the loop on .timings, we should check .num_timings to see if it's the
only mode specified, not .num_modes, which should be used with .modes.
Fixes: cda553725c92 ("drm/panel: simple: Set appropriate mode type")
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/panel/panel-simple.c
On Tue, Oct 25, 2016 at 4:09 PM, Archit Taneja
wrote:
> Hi,
>
> On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
>>
>> Some rgb-to-vga bridges have an enable GPIO, either directly tied to
>> an enable pin on the bridge IC, or indirectly controlling a power
&
On Tue, Oct 25, 2016 at 4:13 PM, Archit Taneja
wrote:
>
>
> On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
>>
>> The Hummingbird A31 board has a RGB-to-VGA bridge which converts RGB
>> output from the LCD interface to VGA signals.
>>
>> Enable this part of
On Thu, Oct 27, 2016 at 2:40 PM, Archit Taneja
wrote:
>
>
> On 10/25/2016 02:29 PM, Chen-Yu Tsai wrote:
>>
>> On Tue, Oct 25, 2016 at 4:09 PM, Archit Taneja
>> wrote:
>>>
>>> Hi,
>>>
>>> On 10/20/2016 09:13 AM, Chen-Yu Tsai wr
On Fri, Oct 21, 2016 at 3:44 PM, Jean-Francois Moine wrote:
> Allwinner's SoCs include support for both audio and video on HDMI.
> This patch defines a simple audio CODEC which may be used in sunxi
> HDMI video drivers.
>
> Signed-off-by: Jean-Francois Moine
There's already a driver for
connector from "vga" to "vga-connector".
- Renamed the node of the VGA DAC from "bridge" to "vga-dac".
Regards
ChenYu
Chen-Yu Tsai (2):
drm/bridge: dumb-vga-dac: Support a VDD regulator supply
ARM: dts: sun6i: hummingbird-a31: Enable display outp
Some dumb VGA DACs are active components which require external power.
Add support for specifying a regulator as its power supply.
Signed-off-by: Chen-Yu Tsai
---
.../bindings/display/bridge/dumb-vga-dac.txt | 2 ++
drivers/gpu/drm/bridge/dumb-vga-dac.c | 35
On Thu, Oct 27, 2016 at 10:35 PM, Maxime Ripard
wrote:
> Hi,
>
> On Tue, Oct 25, 2016 at 08:42:26AM +0800, Chen-Yu Tsai wrote:
>> On Mon, Oct 24, 2016 at 10:40 PM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> > On Fri, Oct 21, 2016 at 11:15:32AM +0800
The Hummingbird A31 board has a VGA DAC which converts RGB output
from the LCD interface to VGA analog signals.
Add nodes for the VGA DAC, its power supply, and enable this part
of the display pipeline.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 76
other drm_bridge functions also follow this pattern of checking
for a non-NULL pointer, we can drop the ifs around the calls and just
pass the pointer directly.
Fixes: 894f5a9f4b4a ("drm/sun4i: Add bridge support")
Signed-off-by: Chen-Yu Tsai
---
Changes since v2:
- Add comments stating enc
> + tcon0_rgb666_pins_a: tcon0_rgb666 at 0 {
This is the only possible combination. You can drop the _a and @0.
Also this can be shared with A23, as they are pin compatible, and I
also matched the datasheets.
Otherwise
Acked-by: Chen-Yu Tsai
> + al
On Thu, Sep 1, 2016 at 11:31 PM, Maxime Ripard
wrote:
> Some Allwinner SoCs, such as the A33, have a variation of the TCON that
> doesn't have a second channel (or it is not wired to anything).
>
> Make sure we can handle that case.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> The SinA33 has an unidentified panel. Add the timings for it under a new
> compatible.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/panel/panel-simple.c | 26 ++
> 1 file changed, 26 insertions(+)
>
>
Hi,
On Thu, Sep 1, 2016 at 11:31 PM, Maxime Ripard
wrote:
> The A33 has a significantly different pipeline, with components that differ
> too.
>
> Make sure we had compatible for them.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7
Hi,
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> Add all the needed blocks to the A33 DTSI.
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/boot/dts/sun8i-a33.dtsi | 184
> +++
> 1 file changed, 184 insertions(+)
>
> diff --git
Hi,
On Thu, Sep 1, 2016 at 11:32 PM, Maxime Ripard
wrote:
> The A33 pipeline also has some new components called SAT and DRC. Even
> though their exact features and programming model is not known (or
> documented), they need to be clocked for the pipeline to carry the video
> signal all the way.
On Sat, Sep 3, 2016 at 3:06 AM, Maxime Ripard
wrote:
> Hi Icenowy,
>
> On Fri, Sep 02, 2016 at 09:30:05AM +0800, Icenowy Zheng wrote:
>>
>>
>> 01.09.2016, 23:40, "Maxime Ripard" :
>> > Hi everyone,
>> >
>> > This serie introduces the support in the sun4i-drm driver for the A33.
>> >
>> > Beside
Hi,
On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard
wrote:
> From: Mylène Josserand
>
> The GR8-EVB is a small board with an NextThing GR8, an Hynix MLC NAND,
> an AXP209 PMIC, USB host and OTG, an SPDIF output and a connectors for CSI,
> I2S and LCD.
>
> Signed-off-by: Mylène Josserand
>
Q6 */
> + SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
> + SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, &quo
On Wed, Aug 31, 2016 at 4:18 PM, Maxime Ripard
wrote:
> The A10-EVB from Allwinner comes with an unidentified panel, with the only
> mark on the PCB being A10-SUB-EVB-5LCD.
>
> Add timings to simple panel to handle it.
>
> Signed-off-by: Maxime Ripard
> ---
>
On Tue, Sep 6, 2016 at 4:37 AM, Maxime Ripard
wrote:
> On Sat, Sep 03, 2016 at 09:43:59AM +0800, Chen-Yu Tsai wrote:
>> On Sat, Sep 3, 2016 at 3:06 AM, Maxime Ripard
>> wrote:
>> > Hi Icenowy,
>> >
>> > On Fri, Sep 02, 2016 at 09:30:05AM +0800, Icenowy
On Tue, Sep 6, 2016 at 4:02 AM, Maxime Ripard
wrote:
> Hi,
>
> On Mon, Sep 05, 2016 at 01:03:03AM +0800, Icenowy Zheng wrote:
>> Hi Everyone,
>>
>> 01.09.2016, 23:40, "Maxime Ripard" :
>> > The SinA33 has an unidentified panel. Add the timings for it under a new
>> > compatible.
>>
>>
>>
>>
minimal driver for it that just claim the needed resources for the
> pipeline to operate properly.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
On Tue, Sep 6, 2016 at 4:21 AM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Sep 02, 2016 at 02:28:54PM +0800, Chen-Yu Tsai wrote:
>> > + be0: display-backend at 01e6 {
>> > + compatible = "allwinner,sun8i-a33-display-backend&qu
On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
wrote:
> The A33 has a significantly different pipeline, with components that differ
> too.
>
> Make sure we had compatible for them.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
> ---
> Documentation/devicetre
im them when
> the backend probes.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
wrote:
> The A33 has a significantly different pipeline, with components that differ
> too.
>
> Make sure we had compatible for them.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7 ++-
Hi,
On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
wrote:
> The E231732 is a 7" panel with a resolution of 800x480.
>From what I could make out of an archived version of Netron's website
(it's unreachable from my place), they are a manufacturer of printed
ribbon cables, not LCD panels. This is
On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
wrote:
> Add all the needed blocks to the A33 DTSI.
>
> Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
On Wed, Sep 7, 2016 at 2:54 AM, Maxime Ripard
wrote:
> On Tue, Sep 06, 2016 at 10:50:09AM +0800, Chen-Yu Tsai wrote:
>> >> The implementation might be along the lines of
>> >>
>> >> 1. having multiple output ports, each for a different interface type.
&
On Thu, Sep 8, 2016 at 8:17 PM, Maxime Ripard
wrote:
> Now that we have support for the VGA bridges using our DRM driver, enable
> the display engine for the Olimex A13-Olinuxino.
>
> Signed-off-by: Maxime Ripard
Assuming the bridge bindings are good,
Acked-by: Chen-Yu Tsai
Hi,
On Thu, Sep 8, 2016 at 8:17 PM, Maxime Ripard
wrote:
> Some boards have an entirely passive RGB to VGA bridge, based on either
> DACs or resistor ladders.
>
> Those might or might not have an i2c bus routed to the VGA connector in
> order to access the screen EDIDs.
>
> Add a bridge that
splay Engine support")
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
index 4332da48b1b3..1b6c2253192e 100644
--- a/drive
The 18 or 24 bit parallel RGB LCD panel interface found on Allwinner
SoCs matches the description of MIPI DPI. Declare the RGB encoder and
connector as MIPI DPI.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_rgb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
changes the dot clock's behavior to make it round to the closest
clock rate. I think this would make it easier to match the LCD panel's
timings. More on the LCD timings in a later patch set.
Regards
ChenYu
Chen-Yu Tsai (4):
drm/sun4i: rgb: Declare RGB encoder and connector as MIPI DPI
drm/sun4i
The dot clock divider is 7 bits wide, and the divider range is 1 ~ 127,
or 6 ~ 127 if phase offsets are used. The 0 register value also
represents a divider of 1 or bypass.
Make the end condition of the for loop inclusive of 127 in the
round_rate callback.
Signed-off-by: Chen-Yu Tsai
, the varying dividers also influence the difference
between the requested rate and the rounded rate.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_dotclock.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
b/drivers/gpu/drm
On Mon, Sep 19, 2016 at 3:12 AM, Maxime Ripard
wrote:
> Hi,
>
> On Thu, Sep 15, 2016 at 11:13:59PM +0800, Chen-Yu Tsai wrote:
>> The 18 or 24 bit parallel RGB LCD panel interface found on Allwinner
>> SoCs matches the description of MIPI DPI. Declare the RGB encoder and
>
On Mon, Sep 19, 2016 at 3:16 AM, Maxime Ripard
wrote:
> Hi,
>
> On Thu, Sep 15, 2016 at 11:14:02PM +0800, Chen-Yu Tsai wrote:
>> With display pixel clocks we want to have the closest possible clock
>> rate, to minimize timing and refresh rate skews. Whether the actual
&g
with HDMI and MIPI DSI support.
Signed-off-by: Chen-Yu Tsai
---
.../devicetree/bindings/display/sunxi/sun4i-drm.txt | 4 +++-
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c | 17 +
drivers/gpu/drm/sun4i
poned pending discussion.
Regards
ChenYu
Chen-Yu Tsai (9):
drm/sun4i: sun6i-drc: Support DRC on A31 and A31s
drm/sun4i: tcon: Move SoC specific quirks to a DT matched data
structure
drm/sun4i: Put dotclock range into tcon quirks and check against them
drm/sun4i: Add compatible string for A31
same, and as a result the display produces
glitch lines sometimes.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
b/arch/arm/boot/dts/sun6i
display pipeline is almost the same, just without MIPI DSI.
Only the TCON seems to be different, due to the missing mux for MIPI
DSI.
Add compatible strings for both of them.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 4
drivers/gpu/drm/sun4i
We already have some differences between the 2 supported SoCs.
More will be added as we support other SoCs. To avoid bloating
the probe function with even more conditionals, move the quirks
to a separate data structure that's tied to the compatible string.
Signed-off-by: Chen-Yu Tsai
pper limit, which affects the highest resolutions we can support.
Fixes: bb43d40d7c83 ("drm/sun4i: rgb: Validate the clock rate")
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_rgb.c | 8 +---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_t
The pinmux setting nodes for the A31 were added out of alphabetical
order. Sort them.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 82
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 152 ++
arch/arm/boot/dts/sun6i-a31s.dtsi | 8 ++
2 files changed
The A31 and A31s also have the DRC as part of the display pipeline.
As we know virtually nothing about them, just add compatible strings
for both SoCs to the stub driver.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2 ++
drivers/gpu/drm/sun4i
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts
On Fri, Oct 7, 2016 at 4:38 PM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Oct 07, 2016 at 12:06:22AM +0800, Chen-Yu Tsai wrote:
>> +struct sun4i_tcon_quirks {
>> + boolis_sun5i; /* sun5i has undocumented mux */
>> + boolhas_channel_1; /*
nA31s LCD patch
- Added patch to support enable pin GPIO for dumb VGA DACs
- Added patch to enable VGA output via dumb VGA DAC on Hummingbird
A31 board
Regards
ChenYu
Chen-Yu Tsai (8):
drm/bridge: rgb-to-vga: Support an enable GPIO
drm/sun4i: sun6i-drc: Support DRC on A31 and A31s
display pipeline is almost the same, just without MIPI DSI.
Only the TCON seems to be different, due to the missing mux for MIPI
DSI.
Add compatible strings for both of them.
Signed-off-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 4
The Hummingbird A31 board has a RGB-to-VGA bridge which converts RGB
output from the LCD interface to VGA signals.
Enable this part of the display pipeline.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 56 +
1 file changed, 56
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 152 ++
arch/arm/boot/dts/sun6i-a31s.dtsi | 8 ++
2 files changed
Some rgb-to-vga bridges have an enable GPIO, either directly tied to
an enable pin on the bridge IC, or indirectly controlling a power
switch.
Add support for it.
Signed-off-by: Chen-Yu Tsai
---
.../bindings/display/bridge/dumb-vga-dac.txt | 2 ++
drivers/gpu/drm/bridge/dumb-vga-dac.c
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts
with HDMI and MIPI DSI support.
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 4 +++-
drivers/gpu/drm/sun4i/sun4i_drv.c | 2 ++
drivers/gpu/drm/sun4i/sun4i_tcon.c| 10 ++
3 files
The A31 and A31s also have the DRC as part of the display pipeline.
As we know virtually nothing about them, just add compatible strings
for both SoCs to the stub driver.
Signed-off-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 2
We already have some differences between the 2 supported SoCs.
More will be added as we support other SoCs. To avoid bloating
the probe function with even more conditionals, move the quirks
to a separate data structure that's tied to the compatible string.
Signed-off-by: Chen-Yu Tsai
On Mon, Oct 31, 2016 at 2:28 PM, Rob Herring wrote:
> On Sat, Oct 29, 2016 at 07:06:10PM +0800, Chen-Yu Tsai wrote:
>> Some dumb VGA DACs are active components which require external power.
>> Add support for specifying a regulator as its power supply.
>>
>>
Hi,
On Tue, Sep 6, 2016 at 10:46 PM, Maxime Ripard
wrote:
> The A33 has a significantly different pipeline, with components that differ
> too.
>
> Make sure we had compatible for them.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 7
On Sun, Nov 6, 2016 at 7:09 PM, Icenowy Zheng wrote:
> The enable gpio of simple-panel may be used by a simplefb or other
> driver on the panel's display before the KMS driver get load.
>
> Get the GPIO as-is, so the panel won't be disabled, and the simplefb
> can work.
>
> Signed-off-by: Icenowy
Hi,
On Wed, Nov 2, 2016 at 9:33 AM, Chen-Yu Tsai wrote:
> On Mon, Oct 31, 2016 at 2:28 PM, Rob Herring wrote:
>> On Sat, Oct 29, 2016 at 07:06:10PM +0800, Chen-Yu Tsai wrote:
>>> Some dumb VGA DACs are active components which require external power.
>>> Add support
: Add Allwinner A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai
---
Hi Maxime,
This avoids DRM screwing up simplefb on my SinA31s, which does not
have the display pipeline enabled in its dts file. But the display
engine and backend are already enabled in the dtsi.
I think this is
Some dumb VGA DACs are active components which require external power.
Add support for specifying a regulator as its power supply.
Signed-off-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
.../bindings/display/bridge/dumb-vga-dac.txt | 2 ++
drivers/gpu/drm/bridge/dumb-vga-dac.c
.
- Renamed the node of the VGA connector from "vga" to "vga-connector".
- Renamed the node of the VGA DAC from "bridge" to "vga-dac".
Regards
ChenYu
Chen-Yu Tsai (2):
drm/bridge: dumb-vga-dac: Support a VDD regulator supply
ARM: dts: sun6i
The Hummingbird A31 board has a VGA DAC which converts RGB output
from the LCD interface to VGA analog signals.
Add nodes for the VGA DAC, its power supply, and enable this part
of the display pipeline.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 67
r A10 Display Engine support")
Signed-off-by: Chen-Yu Tsai
---
I was looking around the DRM driver and noticed this sequence was off.
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/d
On Thu, Nov 17, 2016 at 3:48 PM, Archit Taneja
wrote:
> Hi,
>
> Thanks for the patch.
>
>
> On 11/16/2016 09:12 PM, Chen-Yu Tsai wrote:
>>
>> Some dumb VGA DACs are active components which require external power.
>> Add support for specifying a regulator a
On Fri, Nov 18, 2016 at 3:02 AM, Maxime Ripard
wrote:
> On Wed, Nov 16, 2016 at 05:37:31PM +0800, Chen-Yu Tsai wrote:
>> The sun4i DRM driver counts the number of endpoints it found and
>> registers the whole DRM pipeline if any endpoints are found.
>>
>> However
On Fri, Nov 18, 2016 at 3:05 AM, Maxime Ripard
wrote:
> On Wed, Nov 16, 2016 at 05:37:32PM +0800, Chen-Yu Tsai wrote:
>> If we attempt to read/write the TCON registers before the bus clock
>> is enabled, those accesses get ignored.
>>
>> In practice this almost neve
On Tue, Nov 22, 2016 at 11:37 PM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Nov 18, 2016 at 10:22:40AM +0800, Chen-Yu Tsai wrote:
>> On Fri, Nov 18, 2016 at 3:02 AM, Maxime Ripard
>> wrote:
>> > On Wed, Nov 16, 2016 at 05:37:31PM +0800, Chen-Yu Tsai wrote:
>
ned by clk_round_rate deviates slightly,
causing the driver to reject the display mode.
The LCD panels have some tolerance on the dot clock frequency, even
if it's not specified in their datasheets.
This patch adds a 5% tolerence to the dot clock check.
Signed-off-by: Chen-Yu Tsai
---
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