Quoting Brendan Higgins (2019-08-13 22:50:59)
> Add support for aborting/bailing out of test cases, which is needed for
> implementing assertions.
>
> An assertion is like an expectation, but bails out of the test case
> early if the assertion is not met. The idea with assertions is that you
> use
Quoting Brendan Higgins (2019-08-13 22:50:53)
> A number of test features need to do pretty complicated string printing
> where it may not be possible to rely on a single preallocated string
> with parameters.
>
> So provide a library for constructing the string as you go similar to
> C++'s std::s
Quoting Brendan Higgins (2019-08-13 22:51:04)
> Add defconfig for UML and a fragment that can be used to configure other
> architectures for building KUnit tests. Add option to kunit_tool to use
> a defconfig to create the kunitconfig.
>
> Signed-off-by: Brendan Higgins
> Reviewed-by: Greg Kroah-
Quoting Brendan Higgins (2019-08-13 22:51:02)
> From: Avinash Kondareddy
>
> Add unit tests for KUnit managed resources. KUnit managed resources
> (struct kunit_resource) are resources that are automatically cleaned up
> at the end of a KUnit test, similar to the concept of devm_* managed
> resou
On Tue, 13 Aug 2019, Jonathan Corbet wrote:
> On Sun, 11 Aug 2019 23:32:15 +0200
> Sam Ravnborg wrote:
>
>> I wonder if there is a better way to embed a code sample
>> than reverting to // style comments.
>>
>> As the kernel do not like // comments we should try to avoid them in
>> examples.
>
>
From: Thomas Hellstrom (VMware)
Dave, Daniel
A couple of independent patches extracted from the 5.3 pull request, fixed for
merge conflicts.
And the drmP.h removal from Sam.
/Thomas
The following changes since commit e7f7287bf5f746d29f3607178851246a005dd398:
Merge tag 'drm-next-5.4-2019-08
On 08/08/2019 17:11, Boris Brezillon wrote:
> This takes the form of various helpers, plus the addition of 2 new
> structs:
> * drm_bus_caps: describe the bus capabilities of a bridge/encoder. For
> bridges we have one for the input port and one for the output port.
> Encoders just have one out
On Tue, Aug 13, 2019 at 09:51:08AM +, Mihail Atanassov wrote:
> Hi James,
>
> On Tuesday, 13 August 2019 05:56:07 BST james qian wang (Arm Technology
> China) wrote:
> > Many komeda component support color management like layer and IPS, so
> > komeda_color_manager/state are introduced to mana
On Lu, 2019-07-22 at 11:48 -0600, Rob Herring wrote:
> On Wed, Jun 26, 2019 at 04:32:13PM +0300, Robert Chiras wrote:
> >
> > Add new optional property 'max-res', to limit the maximum supported
> > resolution by the MXSFB_DRM driver.
> Bindings are for h/w description, not driver config.
>
> >
>
On Tue, Aug 13, 2019 at 10:07:36AM +, Mihail Atanassov wrote:
> Hi James,
>
> On Tuesday, 13 August 2019 05:56:19 BST james qian wang (Arm Technology
> China) wrote:
> > - D71 has 3 global layer gamma table which can be used for all layers as
> > gamma lookup table, no matter inverse or for
On Thu, Aug 08, 2019 at 07:36:49PM +0200, Andrzej Hajda wrote:
> On 08.08.2019 16:25, Laurent Pinchart wrote:
> > Hi Andrzej,
> >
> > On Wed, Jul 17, 2019 at 08:39:47AM +0200, Andrzej Hajda wrote:
> >> On 07.07.2019 20:18, Laurent Pinchart wrote:
> >>> Most bridge drivers create a DRM connector to
On Mon, Aug 12, 2019 at 9:30 AM Geert Uytterhoeven wrote:
> When test-compiling the BCM2835 pin control driver on m68k:
>
> In file included from arch/m68k/include/asm/io_mm.h:32:0,
> from arch/m68k/include/asm/io.h:8,
> from include/linux/io.h:13,
>
https://bugs.freedesktop.org/show_bug.cgi?id=109246
--- Comment #25 from jigglywig...@3dslice.net ---
Are any logs needed? I am using a rx570 on a LG 27UD59-B and it keeps waking
itself up when it tries to sleep. amdgpu.dc=0 does fix it but then I get mouse
lag when I move my mouse quickly for lon
https://bugzilla.kernel.org/show_bug.cgi?id=204575
Bug ID: 204575
Summary: Connect a thunderbolt/usb-c dock hang the laptop after
resume
Product: Drivers
Version: 2.5
Kernel Version: 5.0.0-23-generic
Hardware: All
https://bugs.freedesktop.org/show_bug.cgi?id=111399
Bug ID: 111399
Summary: Freeze after suspend/resume with kernel 5.0
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=111399
--- Comment #1 from Vladimir ---
Created attachment 145059
--> https://bugs.freedesktop.org/attachment.cgi?id=145059&action=edit
amdgpu_job_timedout error log
--
You are receiving this mail because:
You are the assignee for the bug._
On Wed, Aug 14, 2019 at 07:58:27AM +0200, Gerd Hoffmann wrote:
> > Hi Gerd,
> >
> > I've been seeing a regression on Nouveau with recent linux-next releases
> > and git bisect points at this commit as the first bad one. If I revert
> > it (there's a tiny conflict with a patch that was merged subse
On 14/08/2019 11:23, Geert Uytterhoeven wrote:
> The code was changed to call drm_connector_init_with_ddc() instead of
> drm_connector_init(), but the corresponding error message was not
> updated.
>
> Fixes: cfb444552926989f ("drm/bridge: ti-tfp410: Provide ddc symlink in
> connector sysfs direc
On 08/08/2019 10:55, Neil Armstrong wrote:
> This patchset converts the existing text bindings to YAML schemas.
>
> Those bindings have a lot of texts, thus is interesting to convert.
>
> All have been tested using :
> $ make ARCH=arm64 dtbs_check
>
> Issues with the amlogic arm64 DTs has alread
On Wed, Aug 14, 2019 at 10:18:40AM +0200, Daniel Vetter wrote:
> On Thu, Aug 08, 2019 at 07:36:49PM +0200, Andrzej Hajda wrote:
> > On 08.08.2019 16:25, Laurent Pinchart wrote:
> > > On Wed, Jul 17, 2019 at 08:39:47AM +0200, Andrzej Hajda wrote:
> > >> On 07.07.2019 20:18, Laurent Pinchart wrote:
>
Hi,
On Fri, Aug 09, 2019 at 02:04:23PM +0200, Lucas Stach wrote:
> In preparation to having a context per process, etnaviv_gem_mapping_get
> should not use the current GPU context, but needs to be told which
> context to use.
>
> Signed-off-by: Lucas Stach
> Reviewed-by: Philipp Zabel
> ---
> d
Hi,
On Fri, Aug 09, 2019 at 02:04:24PM +0200, Lucas Stach wrote:
> This builds on top of the MMU contexts introduced earlier. Instead of having
> one context per GPU core, each GPU client receives its own context.
>
> On MMUv1 this still means a single shared pagetable set is used by all
> clients
On Tue, Aug 13, 2019 at 10:52 PM Brendan Higgins
wrote:
>
> ## TL;DR
>
> This revision addresses comments from Stephen and Bjorn Helgaas. Most
> changes are pretty minor stuff that doesn't affect the API in anyway.
> One significant change, however, is that I added support for freeing
> kunit_reso
Hi Andrzej,
On Wed, Aug 14, 2019 at 08:23:12AM +0200, Andrzej Hajda wrote:
> Hi Laurent,
>
> Sorry for late response.
No worries.
> On 11.08.2019 00:43, Laurent Pinchart wrote:
> > On Fri, Aug 09, 2019 at 01:55:53PM +0200, Andrzej Hajda wrote:
> >> On 08.08.2019 21:32, Laurent Pinchart wrote:
>
On 2019-08-12 14:50, Jerome Brunet wrote:
> Provide the eld to the generic hdmi-codec driver.
> This will let the driver enforce the maximum channel number and set the
> channel allocation depending on the hdmi sink.
>
> Cc: Jonas Karlman
> Signed-off-by: Jerome Brunet
Tested on Rockchip RK3288/
Hi,
> > Changing the order doesn't look hard. Patch attached (untested, have no
> > test hardware). But maybe I missed some detail ...
>
> I came up with something very similar by splitting up nouveau_bo_new()
> into allocation and initialization steps, so that when necessary the GEM
> object
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill in
the cec_connector_info.
Signed-off-by: Dariusz Marcinkiewicz
Signed-off-by: Hans Verkuil
Tested-by: Hans Verkuil
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 13 +-
Use the new cec_notifier_cec_adap_(un)register() functions to
(un)register the notifier for the CEC adapter.
Also adds CEC_CAP_CONNECTOR_INFO capability to the adapter.
Changes since v3:
- add CEC_CAP_CONNECTOR_INFO to cec_allocate_adapter,
- replace CEC_CAP_LOG_ADDRS | CEC_CAP_TR
Use the new cec_notifier_cec_adap_(un)register() functions to
(un)register the notifier for the CEC adapter.
Signed-off-by: Dariusz Marcinkiewicz
Signed-off-by: Hans Verkuil
Tested-by: Hans Verkuil
---
drivers/gpu/drm/i2c/tda9950.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletion
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill
in the cec_connector_info.
Changes since v6:
- move cec_notifier_conn_unregister to tda998x_bridge_detach,
- add a mutex protecting accesses to a CEC notifier.
Chang
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill in
the cec_connector_info.
Changes since v4:
- only create a CEC notifier for HDMI connectors
Signed-off-by: Dariusz Marcinkiewicz
Tested-by: Hans Verkuil
---
drivers/gp
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill in
the cec_connector_info.
Changes since v6:
- move cec_notifier_conn_unregister to a bridge detach
function,
- add a mutex protecting a CEC notifier.
Chan
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill
in the cec_connector_info.
Changes since v2:
Don't invalidate physical address before unregistering the
notifier.
Signed-off-by: Dariusz Marcinkiewicz
---
drivers
Use the new cec_notifier_conn_(un)register() functions to
(un)register the notifier for the HDMI connector, and fill in
the cec_connector_info.
Changes since v2:
- removed unnecessary call to invalidate phys address before
deregistering the notifier,
- use cec_notifier_phys
On Wednesday, 14 August 2019 08:52:18 BST james qian wang (Arm Technology
China) wrote:
> On Tue, Aug 13, 2019 at 09:51:08AM +, Mihail Atanassov wrote:
> > Hi James,
> >
> > On Tuesday, 13 August 2019 05:56:07 BST james qian wang (Arm Technology
> > China) wrote:
> > > Many komeda component
From: Guido Günther
The bridge might have special requirmentes on the input bus. This
is e.g. used by the imx-nwl bridge.
Signed-off-by: Guido Günther
Reviewed-by: Stefan Agner
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drive
This patch-set improves the use of eLCDIF block on iMX 8 SoCs (like 8MQ, 8MM
and 8QXP). Following, are the new features added and fixes from this
patch-set:
1. Add support for drm_bridge
On 8MQ and 8MM, the LCDIF block is not directly connected to a parallel
display connector, where an LCD panel c
The eLCDIF controller has control pin for the external LCD reset pin.
Add support for it and assert this pin in enable and de-assert it in
disable.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 14 ++
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 2 ++
2 files changed
Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF
is enabled, since it comes up with default value of 1 (this behaviour
has been seen on some imx8 platforms).
In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting
its value.
Signed-off-by: Robert Chiras
---
Some of the existing registers in this controller are not defined, but
also not used. Add them to the register definitions, so that they can be
easily used in future improvements or fixes.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 15 +++
1 file changed, 1
From: Mirela Rabulea
Add mxsfb_atomic_helper_check to signal mode changed when bpp changed.
This will trigger the execution of disable/enable on
a modeset with different bpp than the current one.
Signed-off-by: Mirela Rabulea
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c
Since version 4 of eLCDIF, there are some registers that can do
transformations on the input data, like re-arranging the pixel
components. By doing that, we can support more pixel formats.
This patch adds support for X/ABGR and RGBX/A. Although, the local alpha
is not supported by eLCDIF, the alpha
Besides the eLCDIF block, there is another IP block, used in the past
for EPDC panels. Since the iMX.8mq doesn't have an EPDC connector, this
block is not documented, but we can use it to do additional operations
on the frame buffer.
In this case, we can use the pigeon registers from this IP block
Currently, the enable of the axi clock return status is ignored, causing
issues when the enable fails then we try to disable it. Therefore, it is
better to check the return status and disable it only when enable
succeeded.
Also, remove the helper functions around clk_axi, since we can directly
use
This IP requires full stop and re-start when changing display timings,
but we can change the pixel format while running.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mxsfb/
Because of stability issues, we may want to limit the maximum resolution
supported by the MXSFB (eLCDIF) driver.
This patch add support for a new property which we can use to impose such
limitation.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 12 ++--
1 file chan
Hi.
On Tue, Aug 13, 2019 at 1:38 PM Hans Verkuil wrote:
>
> Russell's review caused me to take another look at this series, and it made
> wonder if cec_notifier_conn_unregister() shouldn't be called from
> bridge_detach?
>
I've sent out v7 of the series where unregistration is done from bridge d
Currently, the vblank support is not correctly implemented in MXSFB_DRM
driver. The call to drm_vblank_init is made with mode_config.num_crtc
which at that time is 0. Because of this, vblank is not activated, so
there won't be any vblank event submitted.
For example, when running modetest with the
Add new optional property 'max-res', to limit the maximum supported
resolution by the MXSFB_DRM driver.
Signed-off-by: Robert Chiras
---
Documentation/devicetree/bindings/display/mxsfb.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mxsfb.t
Some of the regiters need, like LCDC_CTRL and CTRL2_OUTSTANDING_REQS
needs to be properly cleared and initialized for a better start and stop
routine.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu
Currently, the MXSFB DRM driver only supports a panel. But, its output
display signal can also be redirected to another encoder, like a DSI
controller. In this case, that DSI controller may act like a drm_bridge.
In order support this use-case too, this patch adds support for drm_bridge
in mxsfb.
Use BIT(x) and GEN_MASK(h, l) for better representation the inside of
various registers.
Signed-off-by: Robert Chiras
---
drivers/gpu/drm/mxsfb/mxsfb_regs.h | 151 ++---
1 file changed, 89 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/mxsfb_re
Hello.
On Tue, Aug 13, 2019 at 1:20 PM Russell King - ARM Linux admin
wrote:
>
> This also doesn't make sense: tda998x_destroy() is the opposite of
> tda998x_create(). However, tda998x_connector_destroy() is the
> opposite of tda998x_connector_create().
>
> By moving the CEC creation code into t
On 2019-08-14 12:48, Robert Chiras wrote:
> Add new optional property 'max-res', to limit the maximum supported
> resolution by the MXSFB_DRM driver.
I would also mention the reason why we need this.
I guess this needs a vendor prefix as well (fsl,max-res). I also would
like to have the ack of th
On 2019-08-14 12:48, Robert Chiras wrote:
> Currently, the enable of the axi clock return status is ignored, causing
> issues when the enable fails then we try to disable it. Therefore, it is
> better to check the return status and disable it only when enable
> succeeded.
Is this actually the case
On 2019-08-14 12:48, Robert Chiras wrote:
> Some of the regiters need, like LCDC_CTRL and CTRL2_OUTSTANDING_REQS
Typo in registers, and there is a need to many.
> needs to be properly cleared and initialized for a better start and stop
> routine.
>
> Signed-off-by: Robert Chiras
> ---
> dri
Hi Stefan,
On Mi, 2019-08-14 at 13:03 +0200, Stefan Agner wrote:
> On 2019-08-14 12:48, Robert Chiras wrote:
> >
> > Add new optional property 'max-res', to limit the maximum supported
> > resolution by the MXSFB_DRM driver.
> I would also mention the reason why we need this.
>
> I guess this nee
On 2019-08-14 13:14, Robert Chiras wrote:
> Hi Stefan,
> On Mi, 2019-08-14 at 13:03 +0200, Stefan Agner wrote:
>> On 2019-08-14 12:48, Robert Chiras wrote:
>> >
>> > Add new optional property 'max-res', to limit the maximum supported
>> > resolution by the MXSFB_DRM driver.
>> I would also mention
https://bugs.freedesktop.org/show_bug.cgi?id=111399
Vladimir changed:
What|Removed |Added
Resolution|--- |DUPLICATE
Status|NEW
https://bugs.freedesktop.org/show_bug.cgi?id=110258
Vladimir changed:
What|Removed |Added
CC||vl4d1m1...@gmail.com
--- Comment #15 from Vl
Hi Stefan,
On Mi, 2019-08-14 at 13:06 +0200, Stefan Agner wrote:
> On 2019-08-14 12:48, Robert Chiras wrote:
> >
> > Currently, the enable of the axi clock return status is ignored,
> > causing
> > issues when the enable fails then we try to disable it. Therefore,
> > it is
> > better to check th
Hi Stefan,
On Mi, 2019-08-14 at 13:11 +0200, Stefan Agner wrote:
> On 2019-08-14 12:48, Robert Chiras wrote:
> >
> > Some of the regiters need, like LCDC_CTRL and
> > CTRL2_OUTSTANDING_REQS
> Typo in registers, and there is a need to many.
Thanks, will fix this.
>
> >
> > needs to be properly c
Hi Robert,
On Wed, 14 Aug 2019 at 11:49, Robert Chiras wrote:
> + case DRM_FORMAT_BGR565: /* BG16 */
> + if (mxsfb->devdata->ipversion < 4)
> + goto err;
> + writel(CTRL2_ODD_LINE_PATTERN(CTRL2_LINE_PATTERN_BGR) |
> + C
This patch effectively reverts commit 912bbf7e9ca4 ("gpu: ipu-v3:
image-convert: Fix image downsize coefficients") and replaces it with a
different solution based on the preceding patches.
The previous fix tried to solve the problem of intermediate tile size
between IC downsizing and main processi
Burst aligned input and output width can be calculated once per column,
instead of repeatedly for each tile in the column. The same goes for
input and output height per row. Also don't round up the same values
repeatedly.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-image-convert.c |
Limit the input seam position to an interval that guarantees the tile
size does not exceed 1024 pixels after the IC downsizing section and
that space is left for the next tile.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 30 --
1 file changed
This fixes a failure to determine any seam if the output size is
exactly 1024 multiplied by the number of tiles in a given direction.
In that case an empty interval out_start == out_end is being passed
to find_best_seam, which looks for a seam out_start <= x < out_end.
Also reduce the interval all
If we managed to create tiles sized 0x0 because of a bug in the seam
calculation, return with an error message instead of letting the driver
run into a division by zero later. Also check for tile sizes that are
larger than supported by the hardware.
Signed-off-by: Philipp Zabel
---
drivers/gpu/i
This reduces code duplication and allows to easily calculate the valid
interval for the input seam position in the same place.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 30 +++---
1 file changed, 12 insertions(+), 18 deletions(-)
diff --git a/
The first pixel of the next tile is only sampled by the hardware if the
fractional input position corresponding to the last written output pixel
is not an integer position.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 4 ++--
1 file changed, 2 insertions(+), 2 deleti
Hi Stefann,
On Mi, 2019-08-14 at 13:25 +0200, Stefan Agner wrote:
> On 2019-08-14 13:14, Robert Chiras wrote:
> >
> > Hi Stefan,
> > On Mi, 2019-08-14 at 13:03 +0200, Stefan Agner wrote:
> > >
> > > On 2019-08-14 12:48, Robert Chiras wrote:
> > > >
> > > >
> > > > Add new optional property 'max
Hi,
On Fri, Aug 09, 2019 at 02:05:12PM +0200, Lucas Stach wrote:
> With per-process address spaces in place, a rogue process submitting
> bogus command streams can only hurt itself. There is no need to
> validate the command stream before execution anymore.
>
> Signed-off-by: Lucas Stach
> Review
On Wed, Aug 7, 2019 at 2:12 PM Souptick Joarder wrote:
>
> On Wed, Jul 31, 2019 at 12:38 AM Souptick Joarder
> wrote:
> >
> > This is dead code since 3.15. If there is no plan to use it
> > further, this can be removed forever.
>
> Any comment on this patch ?
Any comment on this patch ?
>
> >
On Wed, Aug 14, 2019 at 12:55:29PM +0300, Laurent Pinchart wrote:
> On Wed, Aug 14, 2019 at 10:18:40AM +0200, Daniel Vetter wrote:
> > On Thu, Aug 08, 2019 at 07:36:49PM +0200, Andrzej Hajda wrote:
> > > On 08.08.2019 16:25, Laurent Pinchart wrote:
> > > > On Wed, Jul 17, 2019 at 08:39:47AM +0200,
Hi,
nOn Fri, Aug 09, 2019 at 02:05:14PM +0200, Lucas Stach wrote:
> With softpin we allow the userspace to take control over the GPU virtual
> address space. The new capability is relected by a bump of the minor DRM
> version. There are a few restrictions for userspace to take into
> account:
>
>
Hi,
On Fri, Aug 09, 2019 at 02:05:13PM +0200, Lucas Stach wrote:
> Allow the mapping code to request a specific virtual address for the gem
> mapping. If the virtual address is zero we fall back to the old mode of
> allocating a virtual address for the mapping.
>
> Signed-off-by: Lucas Stach
> Re
https://bugs.freedesktop.org/show_bug.cgi?id=111244
--- Comment #24 from mib...@gmx.at ---
Having the same issue on a ThinkPad T495s (BIOS 1.06) with a Ryzen 7 PRO 3700U,
Kernel 5.2.8-arch1-1-ARCH, Mesa 19.1.4-1 and running sway (wayland) as a window
manager.
dmesg shows me:
[drm] Fence fallback
On Thu, Aug 08, 2019 at 10:32:14PM +0300, Laurent Pinchart wrote:
> Hello,
>
> On Tue, Jul 16, 2019 at 03:57:21PM +0200, Andrzej Hajda wrote:
> > On 16.07.2019 11:00, Daniel Vetter wrote:
> > > On Fri, Jul 12, 2019 at 11:01:38AM +0200, Andrzej Hajda wrote:
> > >> On 11.07.2019 17:50, Daniel Vetter
On Wed, Aug 14, 2019 at 01:04:03PM +0300, Laurent Pinchart wrote:
> Hi Andrzej,
>
> On Wed, Aug 14, 2019 at 08:23:12AM +0200, Andrzej Hajda wrote:
> > Hi Laurent,
> >
> > Sorry for late response.
>
> No worries.
>
> > On 11.08.2019 00:43, Laurent Pinchart wrote:
> > > On Fri, Aug 09, 2019 at 01
On Thu, Aug 08, 2019 at 09:19:48PM +0300, Laurent Pinchart wrote:
> Hello Daniel and Andrzej,
>
> On Thu, Jul 11, 2019 at 09:35:48AM +0200, Daniel Vetter wrote:
> > On Wed, Jul 10, 2019 at 02:12:14PM +0200, Andrzej Hajda wrote:
> > > Hi Laurent,
> > >
> > > I like the approach, current practice w
On Fri, Aug 09, 2019 at 05:40:47PM +0200, Wolfram Sang wrote:
> In the general move to have i2c_new_*_device functions which return
> ERR_PTR instead of NULL, this patch converts i2c_new_secondary_device().
>
> There are only few users, so this patch converts the I2C core and all
> users in one go
Hi Daniel,
On Wed, Aug 14, 2019 at 02:43:21PM +0200, Daniel Vetter wrote:
> On Thu, Aug 08, 2019 at 09:19:48PM +0300, Laurent Pinchart wrote:
> > On Thu, Jul 11, 2019 at 09:35:48AM +0200, Daniel Vetter wrote:
> >> On Wed, Jul 10, 2019 at 02:12:14PM +0200, Andrzej Hajda wrote:
> >>> Hi Laurent,
> >
https://bugs.freedesktop.org/show_bug.cgi?id=111241
--- Comment #6 from Pierre-Eric Pelloux-Prayer
---
I've created a different shadertoy showing the problem:
https://www.shadertoy.com/view/Wt2SW1 (but this one doesn't hang the GPU).
The shader for "Buffer A" is:
0: MOV TEMP[0], SV[0]
1: M
On Thu, Aug 08, 2019 at 09:36:31PM +0300, Laurent Pinchart wrote:
> On Thu, Aug 08, 2019 at 09:19:48PM +0300, Laurent Pinchart wrote:
> > On Thu, Jul 11, 2019 at 09:35:48AM +0200, Daniel Vetter wrote:
> > > On Wed, Jul 10, 2019 at 02:12:14PM +0200, Andrzej Hajda wrote:
> > >> Hi Laurent,
> > >>
>
On 14/08/2019 12:08, Jonas Karlman wrote:
> On 2019-08-12 14:50, Jerome Brunet wrote:
>> Provide the eld to the generic hdmi-codec driver.
>> This will let the driver enforce the maximum channel number and set the
>> channel allocation depending on the hdmi sink.
>>
>> Cc: Jonas Karlman
>> Signed-
Hi Daniel,
On Wed, Aug 14, 2019 at 03:03:29PM +0200, Daniel Vetter wrote:
> On Thu, Aug 08, 2019 at 09:36:31PM +0300, Laurent Pinchart wrote:
> > On Thu, Aug 08, 2019 at 09:19:48PM +0300, Laurent Pinchart wrote:
> >> On Thu, Jul 11, 2019 at 09:35:48AM +0200, Daniel Vetter wrote:
> >>> On Wed, Jul
Hello james qian wang (Arm Technology China),
The patch 5d51f6c0da1b: "drm/komeda: Add writeback support" from May
23, 2019, leads to the following static checker warning:
drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c:151
komeda_wb_connector_add()
error: not allocating
>-Original Message-
>From: james qian wang (Arm Technology China) [mailto:james.qian.w...@arm.com]
>Sent: Tuesday, August 13, 2019 3:12 PM
>To: Shankar, Uma
>Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Syrjala,
>Ville
>; emil.l.veli...@gmail.com; Lankhorst, Maa
On Tue, Aug 13, 2019 at 02:01:26PM +0200, Neil Armstrong wrote:
> Hi,
>
>
> On 13/08/2019 11:30, Geert Uytterhoeven wrote:
> > If the VGA connector has no DDC channel, an error pointer will be
> > dereferenced, e.g. on Salvator-XS:
> >
> > Unable to handle kernel NULL pointer dereference at
On 14/08/2019 16:39, Guenter Roeck wrote:
> On Tue, Aug 13, 2019 at 02:01:26PM +0200, Neil Armstrong wrote:
>> Hi,
>>
>>
>> On 13/08/2019 11:30, Geert Uytterhoeven wrote:
>>> If the VGA connector has no DDC channel, an error pointer will be
>>> dereferenced, e.g. on Salvator-XS:
>>>
>>> Unable
On Wed, Aug 14, 2019 at 6:28 AM Jason Gunthorpe wrote:
>
> On Wed, Aug 14, 2019 at 09:38:54AM +0200, Christoph Hellwig wrote:
> > On Tue, Aug 13, 2019 at 06:36:33PM -0700, Dan Williams wrote:
> > > Section alignment constraints somewhat save us here. The only example
> > > I can think of a PMD not
Hello
Since lot of release (at least since 4.19), I hit the following error message:
DMA-API: cacheline tracking ENOMEM, dma-debug disabled
After hitting that, I try to check who is creating so many DMA mapping and see:
cat /sys/kernel/debug/dma-api/dump | cut -d' ' -f2 | sort | uniq -c
6 a
Hi Daniel,
On Mi, 2019-08-14 at 12:44 +0100, Daniel Stone wrote:
> Hi Robert,
>
> On Wed, 14 Aug 2019 at 11:49, Robert Chiras
> wrote:
> >
> > + case DRM_FORMAT_BGR565: /* BG16 */
> > + if (mxsfb->devdata->ipversion < 4)
> > + goto err;
> > +
Hi Laurent,
On Thu, Aug 08, 2019 at 10:48:43PM +0300, Laurent Pinchart wrote:
> Hi Daniel,
>
> On Thu, Jul 18, 2019 at 07:01:03PM +0200, Daniel Vetter wrote:
> > On Sun, Jul 07, 2019 at 09:19:02PM +0300, Laurent Pinchart wrote:
> > > Most bridge drivers create a DRM connector to model the connect
On Wed, Jul 17, 2019 at 09:42:31PM -0400, Lyude Paul wrote:
> Use more pointers so we don't have to write out
> txmsg->reply.u.path_resources each time. Also, fix line wrapping +
> rearrange local variables.
>
> Cc: Juston Li
> Cc: Imre Deak
> Cc: Ville Syrjälä
> Cc: Harry Wentland
> Signed-of
On Wed, 2019-08-14 at 13:54 +0200, Philipp Zabel wrote:
> This reduces code duplication and allows to easily calculate the valid
> interval for the input seam position in the same place.
>
> Signed-off-by: Philipp Zabel
> ---
> drivers/gpu/ipu-v3/ipu-image-convert.c | 30 +++-
Support is already implemented for the corresponding DRM formats,
just hook up the remaining V4L2 pixel formats.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-common.c | 16 ++--
drivers/gpu/ipu-v3/ipu-cpmem.c | 26 +-
2 files changed, 35 insertions
Enable image converter support for V4L2_PIX_FMT_BGRX32 and
V4L2_PIX_FMT_RGBX32 pixel formats.
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-image-convert.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-image-convert.c
b/drivers/gpu/ipu-v3/ipu-image-c
Sorry I burried myself in some other stuff ...
On Sat, Aug 10, 2019 at 12:51:00PM +0200, Christian König wrote:
> Am 07.08.19 um 16:17 schrieb Chris Wilson:
> > Quoting Christian König (2019-08-07 14:53:12)
> > > The only remaining use for this is to protect against setting a new
> > > exclusive
https://bugs.freedesktop.org/show_bug.cgi?id=110674
--- Comment #99 from Tom B ---
Created attachment 145062
--> https://bugs.freedesktop.org/attachment.cgi?id=145062&action=edit
a list of commits 5.0.13 - 5.1.0
Attached is a list of all amdgpu and powerplay commits from 5.0.13 - 5.1.0.
I ha
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