On Sat, Sep 16, 2023 at 05:32:42PM +0300, Dan Carpenter wrote:
> On Fri, Sep 08, 2023 at 09:59:40PM +0200, Philipp Stanner wrote:
...
> > +static inline void *memdup_array_user(const void __user *src, size_t n,
> > size_t size)
> > +{
> > + size_t nbytes;
> > +
> > + if
Thomas Zimmermann writes:
> Hi
>
> Am 11.09.23 um 22:52 schrieb Arnd Bergmann:
>> From: Arnd Bergmann
>>
>> As a result of the recent Kconfig reworks, the default settings for the
>> framebuffer interfaces changed in unexpected ways:
>>
>> Configurations that leave CONFIG_FB disabled but use
On Mon, Sep 18, 2023 at 10:20:29AM +0200, Paul Cercueil wrote:
> Le lundi 18 septembre 2023 à 13:39 +0530, Raag Jadav a écrit :
> > Rename EXPORT_*_DEV_PM_OPS() macros to EXPORT_*_RUNTIME_PM_OPS()
> > and while at it, move them to pm_runtime.h.
> > This is done in conjunction with the introduction
On 14/09/2023 23:38, Adrián Larumbe wrote:
> Some BO's might be mapped onto physical memory chunkwise and on demand,
> like Panfrost's tiler heap. In this case, even though the
> drm_gem_shmem_object page array might already be allocated, only a very
> small fraction of the BO is currently backed
On Mon, 18 Sep 2023 11:01:43 +0100
Steven Price wrote:
> On 14/09/2023 23:38, Adrián Larumbe wrote:
> > BO's RSS is updated every time new pages are allocated on demand and mapped
> > for the object at GPU page fault's IRQ handler, but only for heap buffers.
> > The reason this is unnecessary
On Tue, 2023-09-12 at 10:53 -0500, Rob Herring wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On Tue, Sep 12, 2023 at 11:13:50AM +0100, Robin Murphy wrote:
> > On 12/09/2023 9:28 am, Krzysztof Kozlowski
On Tue, 2023-09-12 at 11:05 -0400, Nicolas Dufresne wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> Le mardi 12 septembre 2023 à 08:47 +, Yong Wu (吴勇) a écrit :
> > On Mon, 2023-09-11 at 12:12 -0400,
On 18.09.2023 13:48, Karolina Stolarek wrote:
On 12.09.2023 14:54, Christian König wrote:
Am 12.09.23 um 13:49 schrieb Karolina Stolarek:
Test initialization of ttm_resource using different memory domains.
Add tests for a system memory manager and functions that can be
tested without a
On 8/31/2023 01:20, Evan Quan wrote:
Due to electrical and mechanical constraints in certain platform designs
there may be likely interference of relatively high-powered harmonics of
the (G-)DDR memory clocks with local radio module frequency bands used
by Wifi 6/6e/7.
To mitigate this, AMD has
On 18/08/2023 17:21, Aradhya Bhatia wrote:
Add support for the DSS controller on TI's AM62A7 SoC in the tidss
driver.
This contrller has 2 video pipelines that can render 2 video planes on
"controller".
over a screen, using the overlay managers. The output of the DSS comes
from video port 2
Hi,
On Mon, Jul 3, 2023 at 6:21 AM Linus Walleij wrote:
>
> This is two patches fixing things I would normally complain about
> in reviews, but alas I missed this one, so I go in and fix it up
> myself.
>
> Discovering that a completely unrelated driver has been merged
> into this panel driver I
`strncpy` is deprecated for use on NUL-terminated destination strings [1].
We should prefer more robust and less ambiguous string interfaces.
A suitable replacement is `strscpy_pad` due to the fact that it
guarantees NUL-termination on the destination buffer whilst maintaining
the NUL-padding
On Mon, Sep 18, 2023 at 3:17 AM Toralf Förster
wrote:
>
> I do suffer since 1 or 2 weeks from amd gpu problems (6.1.53 and before)
> like
>
> Sep 15 16:51:22 p14s kernel: [drm:amdgpu_job_timedout [amdgpu]] *ERROR*
> ring sdma0 timeout, signaled seq=122011, emitted seq=122013
> Sep 15 16:51:22
On 9/18/23 13:03, Christian König wrote:
Am 16.09.23 um 19:52 schrieb Danilo Krummrich:
On 9/12/23 16:47, Matthew Brost wrote:
On Tue, Sep 12, 2023 at 11:57:30AM +0200, Christian König wrote:
Am 12.09.23 um 04:16 schrieb Matthew Brost:
Wait for pending jobs to be complete before signaling
In some chips, MDP3 has the ability to utilize two pipelines to
parallelly process a single frame.
To enable this feature, multiple CMDQ clients and packets need to
be configured at the same time.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 8 +
Increasing the number of sets built by MMSYS and MUTEX in MT8195
will enable the creation of more pipelines in MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 80 ---
.../platform/mediatek/mdp3/mtk-mdp3-core.h| 7 ++
2 files changed, 60
Extend the component settings used in MT8195 MDP3.
Additionally, it is crucial to read all component settings in
a specific manner to ensure that shared memory data structure lengths
are aligned across different platforms.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c
On Tue, 2023-09-12 at 10:23 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:57, Moudy Ho wrote:
> > Add device nodes for Media Data Path 3 (MDP3) modules.
> >
> >
The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
programmable switching frequency to optimize efficiency.
The brightness can be controlled either by I2C commands (called "analog"
mode) or by a PWM input signal (PWM mode).
This driver supports both modes.
For DT
The amount of MDP3 driver probes is determined by the registered
clocks of MMSYS.
Since MT8195 MDP3 utilizes VPPSYS0 and VPPSYS1, it's necessary to
prevent multiple driver registrations.
Signed-off-by: Moudy Ho
---
drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c | 1 +
Hi Krzysztof,
On Tue, 2023-09-12 at 10:19 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:56, Moudy Ho wrote:
> > Introduce more MDP3 components present in MT8195.
On Wed, Sep 13, 2023 at 02:34:38PM -0700, Jessica Zhang wrote:
> Hi John,
>
> Having a separate panel_regs_len field seems a bit unnecessary to me.
>
> Looks like it's only being called in the panel prepare() and I don't seen
> any reason why we shouldn't just call the ARRAY_SIZE() macro there.
The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
programmable switching frequency to optimize efficiency.
The brightness can be controlled either by I2C commands (called "analog"
mode) or by a PWM input signal (PWM mode).
This driver supports both modes.
For device
In the source files drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.c:26 and
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.c:214 refer to
configuration options "CONFIG_NOUVEAU_I2C_INTERNAL" and
"CONFIG_NOUVEAU_I2C_INTERNAL_DEFAULT" for conditional compilation,
but these configuration options are not
The configuration of the MT8195 components in the shared memory
is defined in the header file "mdp_sm_mt8195.h".
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_sm_mt8195.h| 283 ++
.../platform/mediatek/mdp3/mtk-img-ipi.h | 4 +
2 files changed, 287
After setting up the second set of MMSYS (VPPSYS1), it is necessary
to have a corresponding second set of MUTEX (MUTEX2) to assist in
handling SOF/EOF.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 64 ---
.../platform/mediatek/mdp3/mtk-mdp3-core.c
Similarly to the drm_exec_test module, the drm_modes_test
shows the following output on dmesg on load:
[ 5556.674834] KTAP version 1
[ 5556.674841] 1..1
[ 5556.675317] KTAP version 1
[ 5556.675321] # Subtest: drm_modes_analog_tv
[ 5556.675323] # module: drm_modes_test
[ 5556.675327]
Changes since v4:
- Rebase on v6.6-rc1
- Organize identical hardware components into their respective files.
Hi,
The purpose of this patch is to separate the MDP3-related bindings from
the original mailing list mentioned below:
Hi Angelo,
On Tue, 2023-09-12 at 11:18 +0200, AngeloGioacchino Del Regno wrote:
> Il 12/09/23 09:57, Moudy Ho ha scritto:
> > MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
> > These sets coordinate and control the clock, power, and
> > register settings needed for the components of MDP3.
> >
>
Due to the same hardware design, MDP RDMA needs to
be integrated into the same binding.
Signed-off-by: Moudy Ho
---
.../display/mediatek/mediatek,mdp-rdma.yaml | 88 ---
.../bindings/media/mediatek,mdp3-rdma.yaml| 5 +-
2 files changed, 3 insertions(+), 90 deletions(-)
On Tue, Sep 12, 2023 at 08:55:31AM +0200, Krzysztof Kozlowski wrote:
> On 11/09/2023 18:47, John Watts wrote:
> > On Mon, Sep 11, 2023 at 01:49:39PM +0200, Krzysztof Kozlowski wrote:
> >> If the other panel has exactly the same case, then yes, you can do like
> >> this. But it depends on the
MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
These sets coordinate and control the clock, power, and
register settings needed for the components of MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 44 +--
SM7150 has 5 power levels which correspond to 5 speed-bin values: 0,
128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up
to zero decimal places.
The vendor's FW GMU is called a618_gmu.bin. And also a618 on SM7150 uses
a615 zapfw.
Add this as machine = "qcom,sm7150", because
Introduce more MDP3 components present in MT8195.
Signed-off-by: Moudy Ho
---
.../display/mediatek/mediatek,aal.yaml| 2 +-
.../display/mediatek/mediatek,color.yaml | 2 +-
.../display/mediatek/mediatek,merge.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml| 2 +-
Some components act as bridges only and do not require full configuration.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 8 +++
.../platform/mediatek/mdp3/mtk-mdp3-cfg.h | 1 +
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 58 ++-
3 files
On Tue, 2023-09-12 at 10:16 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:56, Moudy Ho wrote:
> > Due to the same hardware design, MDP RDMA needs to
> > be
Add configuration of more components in MT8195 MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_reg_aal.h | 25 ++
.../platform/mediatek/mdp3/mdp_reg_color.h| 31 +++
.../media/platform/mediatek/mdp3/mdp_reg_fg.h | 23 +
Changes since v4:
- Rebase on v6.6-rc1
- Remove any unnecessary DTS settings.
- Adjust the usage of MOD and clock in blending components.
Changes since v3:
- Depend on :
[1] https://patchwork.kernel.org/project/linux-media/list/?series=719841
- Suggested by Krzysztof, integrating all newly
On 2023-09-14 15:00, Maxime Ripard wrote:
On Wed, Sep 13, 2023 at 07:35:57PM +0300, José Pekkarinen wrote:
On 2023-09-13 17:41, mrip...@kernel.org wrote:
> On Wed, Sep 13, 2023 at 05:01:40PM +0300, José Pekkarinen wrote:
> > On 2023-09-13 12:50, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On
---
drivers/staging/fbtft/fb_ra8875.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/staging/fbtft/fb_ra8875.c
b/drivers/staging/fbtft/fb_ra8875.c
index 398bdbf53c9a..658f915b8528 100644
--- a/drivers/staging/fbtft/fb_ra8875.c
+++
Il 18/09/23 09:00, Hsiao Chien Sung ha scritto:
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
On 14/09/2023 23:38, Adrián Larumbe wrote:
> The current implementation will try to pick the highest available size
> display unit as soon as the BO size exceeds that of the previous
> multiplier. That can lead to loss of precision in contexts of low memory
> usage.
>
> The new selection criteria
[WHY]
edid_override and drm_edid_override_connector_update, according to drm
documentation, should not be referred outside drm_edid.
[HOW]
Remove and replace them accordingly. This can tested by IGT's
kms_hdmi_inject test.
Signed-off-by: Alex Hung
---
When external bridges are attached with DRM_BRIDGE_ATTACH_NO_CONNECTOR,
the panel bridge may also get the same flag, but in the .attach()
callback for the panel bridge a device link is added only when this
flag is not present; To make things worse, the .detach() callback
tries to delete the device
On 18/09/2023 11:32, Boris Brezillon wrote:
> On Mon, 18 Sep 2023 11:01:43 +0100
> Steven Price wrote:
>
>> On 14/09/2023 23:38, Adrián Larumbe wrote:
>>> BO's RSS is updated every time new pages are allocated on demand and mapped
>>> for the object at GPU page fault's IRQ handler, but only for
From: Tomer Tayar
The device_address member of 'struct hl_dmabuf_priv' is used only when
virtual device memory is not supported and dma-buf is exported from
address.
Set the value of this field only when it is relevant, and add "phys" to
its name so it would be clearer that it can't be a device
From: Dafna Hirschfeld
There are cases such when FW runs MBIST, that preboot is expected to take
longer than the usual. In such cases the firmware reports status
SECURITY_READY/IN_PREBOOT and we extend the timeout waiting for it.
This is currently implemented for Gaudi2 only.
Signed-off-by:
From: Ariel Suller
FW shutdown preparation status was added to spec.
Signed-off-by: Ariel Suller
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/firmware_if.c | 4
1 file changed, 4 insertions(+)
diff --git
From: Tomer Tayar
In some cases the calculated number of required entries for the dma-buf
SG table is wrong. For example, if the page size is larger than both the
dma max segment size of the importer device and from the exported side,
or if the exported size is part of a phys_pg_pack that is
From: Tomer Tayar
Add debug prints to dump the content of the SG table which is prepared
when the dma-buf map op is called.
Signed-off-by: Tomer Tayar
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/memory.c | 7 +++
1 file changed, 7
From: farah kassabri
Currently driver maintain one list for both pending user interrupts
which seeks to wait till CQ reaches it's target value and also the ones
that seeks to get timestamp records when the CQ reaches it's target
value.
This causes delay in handling the waiters which gets higher
From: farah kassabri
Currently we use dynamic allocation inside the irq handler
in order to allocate free node to be used for the free jobs.
This operation is expensive, especially when we deal with large
burst of events records that get released at the same time.
The alternative is to have
From: Tomer Tayar
On devices with virtual device memory (Gaudi2 onwards), user can provide
an offset within an allocated device memory from which he wants to
export a dma-buf object.
The offset value is verified by driver, but it is not taken into
consideration when the importer driver maps the
From: Dafna Hirschfeld
update hl_boot_if.h from specs to include
CPU_BOOT_STATUS_FW_SHUTDOWN_PREP
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
include/linux/habanalabs/hl_boot_if.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: farah kassabri
There is a potential race between user thread seeking to re-use
a timestamp record with new interrupt id, while this record is still
in the middle of interrupt handling and it is about to be freed.
Imagine the driver set the record in_use to 0 and only then fill the
On Thu, Sep 14, 2023 at 06:01:49AM +, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/4] drm/dp_mst: Fix NULL dereference during
> payload addition
> URL : https://patchwork.freedesktop.org/series/123652/
> State : failure
Thanks for the reviews, patches 1-3
Hi
Am 14.09.23 um 21:51 schrieb Javier Martinez Canillas:
The driver uses a naming convention where functions for struct drm_*_funcs
callbacks are named ssd130x_$object_$operation, while the callbacks for
struct drm_*_helper_funcs are named ssd130x_$object_helper_$operation.
The idea is that
Thomas Zimmermann writes:
> Hi
>
> Am 14.09.23 um 21:51 schrieb Javier Martinez Canillas:
>> The driver uses a naming convention where functions for struct drm_*_funcs
>> callbacks are named ssd130x_$object_$operation, while the callbacks for
>> struct drm_*_helper_funcs are named
Hi
Am 11.09.23 um 22:52 schrieb Arnd Bergmann:
From: Arnd Bergmann
As a result of the recent Kconfig reworks, the default settings for the
framebuffer interfaces changed in unexpected ways:
Configurations that leave CONFIG_FB disabled but use DRM now get
DRM_FBDEV_EMULATION by default. This
On Fri, Aug 25, 2023 at 12:19 PM Stanislaw Gruszka
wrote:
>
> On Wed, Aug 23, 2023 at 12:23:08AM +, Justin Stitt wrote:
> > `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> >
> > A suitable replacement is `strscpy` [2] due to the fact that it
> > guarantees
Hi Raag,
Le lundi 18 septembre 2023 à 13:39 +0530, Raag Jadav a écrit :
> Rename EXPORT_*_DEV_PM_OPS() macros to EXPORT_*_RUNTIME_PM_OPS()
> and while at it, move them to pm_runtime.h.
> This is done in conjunction with the introduction of
> EXPORT_*_SIMPLE_PM_OPS() set of macros, to make things
On 12.09.2023 14:54, Christian König wrote:
Am 12.09.23 um 13:49 schrieb Karolina Stolarek:
Test initialization of ttm_resource using different memory domains.
Add tests for a system memory manager and functions that can be
tested without a fully-featured resource manager. Update
Il 18/09/23 09:10, Hsiao Chien Sung ha scritto:
For CRTCs that doesn't support rotation should still return
DRM_MODE_ROTATE_0. Since both OVL and OVL adaptor on MTK chip
doesn't support rotation, return the capability of the
hardware accordingly.
Fixes: df577118 ("drm/mediatek: Support 180
Il 18/09/23 11:09, CK Hu (胡俊光) ha scritto:
On Mon, 2023-09-18 at 16:42 +0800, Hsiao Chien Sung wrote:
Add OVL compatible name for MT8195.
Reviewed-by: CK Hu
but it's weird to put this patch into IGT series. Without this patch,
mt8195 drm driver does not work not only IGT.
The driver does
On 14/09/2023 23:38, Adrián Larumbe wrote:
> The drm-stats fdinfo tags made available to user space are drm-engine,
> drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
>
> This deviates from standard practice in other DRM drivers, where a single
> set of key:value pairs is provided for
On 18/9/23 09:09, Raag Jadav wrote:
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/accel/fxls8962af-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 17/09/2023 22:24, John Watts wrote:
> On Mon, Sep 11, 2023 at 11:41:12AM +0200, Krzysztof Kozlowski wrote:
>> Missing reg. Probably also port.
>
> Hello again,
>
> I've been working on v2 of this series and done some initial cleanup.
>
> Right now it looks a bit like this:
>
>> allOf:
>>
Hi
Am 12.09.23 um 22:22 schrieb Janne Grunau via B4 Relay:
From: Janne Grunau
Multiple power domains need to be handled explicitly in each driver. The
driver core can not handle it automatically since it is not aware of
power sequencing requirements the hardware might have. This is not a
Ping for a review.
I'd like to get at least the first two patches into the DRM git tree.
The PPC patches could later be merged through another tree.
Best regards
Thomas
Am 12.09.23 um 15:48 schrieb Thomas Zimmermann:
Clean up and rename fb_pgprotect() to work without struct file. Then
From: Moti Haimovski
Print to kernel log any device power mode changes events reported by
the FW.
Signed-off-by: Moti Haimovski
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2.c | 12
From: Tomer Tayar
The 'exported_size' member in 'struct hl_vm_phys_pg_pack' is used to
keep the exported dma-buf size, to be later used when the buffer is
mapped.
However it is possible that the same phys_pg_pack will be exported more
than once, and independently of when the mapping takes place.
From: David Meriin
The CPUCP interface is moved to a shared folder outside of accel as
a pre-requisite to upstream the NIC drivers that will also include
this file.
Signed-off-by: David Meriin
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
MAINTAINERS
From: farah kassabri
This is the second patch for applying the eq health check mechanism
which will add support for the interrupt flow for gaudi2 asic.
More info about the interrupt mechanism:
set a dedicated msix for the eq error interrupt, and add
interrupt handler for it.
when FW detects
From: Ofir Bitton
During ECC event handling, Memory wrapper id was mistakenly
printed as block id. Fix the print and in addition fetch the actual
block-id from firmware.
Signed-off-by: Ofir Bitton
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
From: Benjamin Dotan
coresight ETF blocks have different size. As a result, sync packets
need to be aligned based on fifo size.
Signed-off-by: Benjamin Dotan
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c | 9 -
1 file
From: Dafna Hirschfeld
Because it is not used and also, for graceful reset to work
those ioctls should run on the compute device.
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/device.c | 13 -
From: Dafna Hirschfeld
Fix two typos
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/device.c | 2 +-
drivers/accel/habanalabs/common/habanalabs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Hen Alon
Add tsc clock to clock sync info, to enable using this clock for
sampling and sync it with device time.
Signed-off-by: Hen Alon
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/habanalabs_ioctl.c | 1 +
From: Tomer Tayar
For Gaudi1 the exported dma-buf is always composed of a single page, and
therefore the exported size is equal to this page's size.
When calling alloc_sgt_from_device_pages(), we pass 0 as the exported
size and internally calculate it as "number of pages * page size".
This makes
From: farah kassabri
After the heartbeat mechanism is now expanded to be used also
for EQ health check, we shouldn't send heartbeat messages
to FW before driver allow events to be received from FW.
Because if the driver will send two heartbeats before it enables
events to be received from FW,
Thomas Zimmermann writes:
Hello Thomas,
> Fix linker error if FB=m about missing fb_io_read and fb_io_write. The
> linker's error message suggests that this config setting has already
> been broken for other symbols.
>
> All errors (new ones prefixed by >>):
>
> sh4-linux-ld:
On 9/14/23 19:15, Danilo Krummrich wrote:
On 9/14/23 19:13, Thomas Hellström wrote:
On Thu, 2023-09-14 at 17:27 +0200, Danilo Krummrich wrote:
On 9/14/23 13:32, Thomas Hellström wrote:
On 9/14/23 12:57, Danilo Krummrich wrote:
On 9/13/23 14:16, Danilo Krummrich wrote:
And validate() can
On Sat, Sep 16, 2023 at 02:54:51PM +0200, Hans de Goede wrote:
> Hi All,
>
> Some vlv/chv tablets ship with Android as factory OS. The factory OS
> BSP style kernel on these tablets does not use the normal x86 hw
> autodetection instead it hardcodes a whole bunch of things including
> using panel
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/mfd/cs42l43.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c
index 37b23e9bae82..b84adde9f89e 100644
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
sound/soc/codecs/cs35l41.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c
index
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/gpu/drm/imx/dcss/dcss-dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss-dev.c
b/drivers/gpu/drm/imx/dcss/dcss-dev.c
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/mfd/arizona-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index
Am 18.09.23 um 13:48 schrieb Karolina Stolarek:
On 12.09.2023 14:54, Christian König wrote:
Am 12.09.23 um 13:49 schrieb Karolina Stolarek:
Test initialization of ttm_resource using different memory domains.
Add tests for a system memory manager and functions that can be
tested without a
On Wed, Sep 13, 2023 at 03:02:26PM +0300, Jaak Ristioja wrote:
> Hello,
>
> Upgrading to Linux 6.5 on a Lenovo ThinkPad L570 (Integrated Intel HD
> Graphics 620 (rev 02), Intel(R) Core(TM) i7-7500U) results in a blank screen
> after boot until the display manager starts... if it does start at
Fix linker error if FB=m about missing fb_io_read and fb_io_write. The
linker's error message suggests that this config setting has already
been broken for other symbols.
All errors (new ones prefixed by >>):
sh4-linux-ld: drivers/video/fbdev/sh7760fb.o: in function `sh7760fb_probe':
From: farah kassabri
Add mechanism for fw eq health check. this will be done using two flows:
using the heartbeat mechanism and raising a dedicated interrupt to
indicate an eq failure like EQ full.
This patch will add implementation for the eq heartbeat for gaudi2 asic.
More info about the
On Sat, 2023-09-16 at 17:32 +0300, Dan Carpenter wrote:
> On Fri, Sep 08, 2023 at 09:59:40PM +0200, Philipp Stanner wrote:
> > +static inline void *memdup_array_user(const void __user *src,
> > size_t n, size_t size)
> > +{
> > + size_t nbytes;
> > +
> > + if
From: Tomer Tayar
alloc_sgt_from_device_pages() includes relatively many parameters, and
in a subsequent change another offset parameter is going to be added.
Using structure fields directly when calling this function, and in
hl_map_dmabuf() it is done twice, makes it a little bit difficult to
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