The RamDiskDxe driver originally uses a variable-length HII varstore to
retrieve the HII checkbox status of each registered RAM disk.
However, HII does not support the variable-length varstore feature.
Therefore, only the checkbox status for the first 8 RAM disks are tracked
for the following defi
Hi Samer,
I also provide a UI config driver to support TLS certificate configuration,
this may be helpful to you. Please help to review it.
Thanks
Jiaxin
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Jiaxin Wu
> Sent: Wednesday, April 20
Cc: Ye Ting
Cc: Fu Siyuan
Cc: Long Qin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu
Jiaxin Wu (3):
NetworkPkg: Provide an UI to support tls authentication.
Nt32Pkg: Add TlsAuthConfigDxe module
Readme.MD: Add content for TlsAuthConfigDxe
NetworkPkg/In
This patch is used to add TlsAuthConfigDxe module.
Cc: Ye Ting
Cc: Fu Siyuan
Cc: Long Qin
Cc: El-Haj-Mahmoud Samer
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu
---
Nt32Pkg/Nt32Pkg.dsc | 1 +
Nt32Pkg/Nt32Pkg.fdf | 1 +
2 files changed, 2 insertions(+)
diff
This patch provides an UI to support TLS authentication.
EFI_SIGNATURE_LIST format is used for 'TlsCaCertificate'
variable. So, TLS supports multiple certificate configuration.
Cc: Ye Ting
Cc: Fu Siyuan
Cc: Long Qin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin
Cc: Ye Ting
Cc: Fu Siyuan
Cc: Long Qin
Cc: El-Haj-Mahmoud Samer
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu
---
Readme.MD | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Readme.MD b/Readme.MD
index 573593e..64c696d 100644
--- a/Readme.MD
+++ b/Readme
Reviewed-by: Samer El-Haj-Mahmoud
-Original Message-
From: Jiaxin Wu [jiaxin...@intel.com]
Received: Tuesday, 19 Apr 2016, 9:58PM
To: edk2-devel@lists.01.org [edk2-devel@lists.01.org]
CC: Ye Ting [ting...@intel.com]; Fu Siyuan [siyuan...@intel.com]; Long Qin
[qin.l...@intel.com]; El-Ha
Cc: Ye Ting
Cc: Fu Siyuan
Cc: Long Qin
Cc: El-Haj-Mahmoud Samer
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu
---
Readme.MD | 44
1 file changed, 44 insertions(+)
create mode 100644 Readme.MD
diff --git a/Readme
Hi Jaben,
'ShellCommandLineGetCount' return the count of value parameters including the
command name and excluding the flags.
So if we execute the command 'connect 1E -r' in Shell. The count return from
'ShellCommandLineGetCount' is 2
The first one is 'connect' and the second one is '1E'. The 1E
Changes compared with V1:
1. Instead of creating a new NFIT for each registered reserved memory RAM
disk, new cotent of the NFIT is appended to the existing one.
2. Report an NVDIMM root device in the \SB scope if there is no NFIT in
the ACPI table.
3. Modify FDF files in OvmfPkg to make su
The RamDiskDxe now will report RAM disks with reserved memory type to NFIT
in the ACPI table.
This commit will also make sure that an NVDIMM root device exists in the
\SB scope before reporting any RAM disk to NFIT.
To properly report the NVDIMM root device, one will modify the RamDiskDxe
item li
The RamDiskDxe driver in MdeModulePkg now will sometimes report a NVDIMM
Root Device using ASL code which is put in a Secondary System Description
Table (SSDT) according to the ACPI 6.1 spec.
Locating the SSDT requires modifying the fdf files in OvmfPkg.
Cc: Laszlo Ersek
Cc: Jordan Justen
Contr
On 4/19/16 6:04 AM, Laszlo Ersek wrote:
Bruce, could you please test this? If 742563777e8d is indeed the
solution, I will file an RHBZ (for the RHEL kernel) to backport it.
Laszlo, I've just verified that 742563777e8d does indeed fix the
problem: that kernel successfully boots after the memo
This patch looks good to me.
Reviewed-by: Maurice Ma
Thanks
Maurice
-Original Message-
From: Leahy, Leroy P
Sent: Tuesday, April 19, 2016 1:31 PM
To: edk2-devel@lists.01.org; Ma, Maurice; Agyeman, Prince; Leahy, Leroy P
Subject: [PATCH 06/12] CorebootPayloadPkg: Make debug serial PCDs
Hi, Lee,
Did you try 64 bit build with this change?It might have issue.
For 32 bit build, the ARCH variable will be set to "IA32" in DSC.It will
have no issue to use:
INF RuleOverride = BINARY USE = $(ARCH)
ShellBinPkg/UefiShell/UefiShell.inf
However for 64 bit payload, the ARCH v
HI Maurice,
Coreboot only assigns resources to devices which are enabled. If the device is
set to OFF in the mainboard/.../devicetree.cb file then no resources are
assigned and the device is left disabled. This is the issue that I am running
into which is causing PciBusNoEnumerationDxe to fai
Hi Maurice,
This driver is being built with PlatformHelperLib to pass the serial port
configuration from coreboot. The .inf file is modified and the driver is being
rebuilt.
Lee Leahy
(425) 881-4919
Intel Corporation
Suite 125
2700 - 156th Ave NE
Bellevue, WA 98007-6554
-Original Message
Hi Maurice,
Quark uses a PCI serial port, not the legacy serial port. As such, I need to
pass parameters from coreboot to the PCI serial driver. This requires the use
of PlatformHelperLib which requires that I modify the .inf file and rebuild the
serial driver.
Lee Leahy
(425) 881-4919
Intel
Hi, Lee,
Do we assume all PCI devices will be enabled in the command registers in
coreboot before transitioning to the UEFI payload ?
How about those PCI devices with command register disabled but with PCI BARs
programmed ? If we skip them, then the resource will not be collected by the
PciB
Hi, Lee,
I have the same question as previous patch.
Please let us know why the driver in MdeModulePkg does not fit your needs.
If it is only for PCD initialization, we might consider using PcdsDynamic type
and set them in platform driver instead.
Thanks
Maurice
-Original Message
Hi, Lee,
For this change, could you let us know why you decided to copy the
PciSioSerialDxe over to the CorebootModulePkg ?
I am wondering why the current driver in MdeModulePkg cannot be reused.
Thanks
Maurice
-Original Message-
From: Leahy, Leroy P
Sent: Tuesday, April 19, 2016 1:29
I am confused.
It looks like the code change is that "-r" requires ...GetCount() >2 where it
used to be >1. Why? I didn't think that recursive searching required both
DeviceHandle and DriverHandle to be on the command line...
-Jaben
> -Original Message-
> From: edk2-devel [mailto:edk
Move the baud rate setting to the top of the .dsc file. Use a single
setting for each board.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
QuarkPlatformPkg/Quark.dsc| 25 -
QuarkPlatformPkg/QuarkMin.dsc | 25
Fix 64-bit build error detected with GCC4.8 due to inconsistent routine
declaration and implementation. Add EFIAPI to fix the build error.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDController.c |
Add a define and use it with MaxLogicalProcessorNumber to enable this
PCD to be changed via the command line. Quark needs to set this value
to one during the builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootPayloadPkg/CorebootPayloadPkgIa32.ds
Pass the serial port baudrate, register stride, input clock rate and
ID from coreboot to CorebootPayloadPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootModulePkg/Include/Coreboot.h | 3 ++
CorebootModulePkg/Include/Library/CbParseL
Remove the PlatformFlashEraseWrite function which is not used within
CorebootPayloadPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
.../Include/Library/PlatformHelperLib.h| 38 +-
.../Library/PlatformHelperLib/PlatformHelperDxe.c | 141
Allow the serial port configuration to be overriden from the command
line.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 59 +++-
CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 58 ++
Use the serial drivers which update the serial PCDs from
PlatformHookLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootPayloadPkg/CorebootPayloadPkg.fdf| 3 ++-
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 11 ++-
CorebootPay
Make the debug serial PCDs patchable in module.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc| 16 +---
CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc | 16 +---
2 files changed, 18
Add all of the shell options from ShellBinPkg including building the
shell from source.
Test: Use -DSHELL_TYPE=BUILD_SHELL command line options to build the
shell from source. Run the result on Galileo Gen2.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
C
Skip non-bridge devices which are not enabled either for memory or I/O
access.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootModulePkg/PciBusNoEnumerationDxe/PciEnumeratorSupport.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/Coreboo
Copy the driver from MdeModulePkg/Universal/SerialDxe. Add
PlatformHookLib to the Library section of the .inf file to adjust the
PCDs for the UART.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootModulePkg/SerialDxe/SerialDxe.inf | 55 +++
Core
Copy the driver from MdeModulePkg/Bus/Pci/PciSioSerialDxe. Add
PlatformHookLib to the Library section of the .inf file to adjust the
PCDs for the UART.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy
---
CorebootModulePkg/PciSioSerialDxe/ComponentName.c | 288
Never mind, I just saw this was committed in
3dc5c1ae5c7575ba2d1714b40692b36fca56c120
Thanks!
--Samer
-Original Message-
From: El-Haj-Mahmoud, Samer
Sent: Tuesday, April 19, 2016 2:39 PM
To: Palmer, Thomas ; edk2-devel@lists.01.org
Cc: feng.t...@intel.com; star.z...@intel.com; ruiyu...
Reviewed-by: Samer El-Haj-Mahmoud
Ray, Feng, Star,
Can you please help review and commit this change?
-Original Message-
From: Palmer, Thomas
Sent: Monday, April 4, 2016 2:52 PM
To: edk2-devel@lists.01.org
Cc: El-Haj-Mahmoud, Samer ; feng.t...@intel.com;
star.z...@intel.com; ruiyu...@
On 4/19/2016 6:04 AM, Laszlo Ersek wrote:
Bruce, could you please test this? If 742563777e8d is indeed the
solution, I will file an RHBZ (for the RHEL kernel) to backport it.
Will do. Thanks for all your work on this!
--
Bruce
___
edk2-devel mailing
Leif,
Please see my reply below.
Leo.
> -Original Message-
> From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> Sent: Monday, April 18, 2016 5:39 AM
> To: Ard Biesheuvel
> Cc: Duran, Leo ; edk2-devel@lists.01.org
> Subject: Re: [PATCH] ArmPlatformPkg: fixups for 64-bit mailbox pointe
Hi
it doesn't break building with VC++ because __noreturn isn't from GCC, it's
from edk2.
https://github.com/tianocore/edk2/blob/master/StdLib/Include/sys/EfiCdefs.h#L211
Michael
On Tue, Apr 19, 2016 at 4:21 PM, Daryl McDaniel
wrote:
> Michael,
>
> In your patch, you use GCC's __noreturn attri
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Wu, Jiaxin
> Sent: Monday, April 18, 2016 6:52 PM
> To: edk2-devel@lists.01.org
> Cc: David Van Arnem ; Bhupesh Sharma
> ; Carsey, Jaben ; Ye,
> Ting ; Fu, Siyuan
> Subject: [Patch] ShellPkg: Enhance ping to select the interface au
Hello,
Could someone explain why the .bss section is being combined with the
.data section in the GCC linker script in the EDK2? This will force all
uninitialized variables to take space in the output .efi file. This
seems really wasteful.
GccBase.lds
/*
* The alignment of the .data section
On 19 April 2016 at 16:55, Ard Biesheuvel wrote:
> In the DmaMap () operation, if the region to be mapped happens to be
> aligned to the Cache Writeback Granule (CWG) (whose value is typically
> 64 or 128 bytes and 2 KB maximum), we remap the memory as uncached.
>
> Since remapping memory occurs a
ACPI 6.0 introduced LPI(Low Power Idle) states that provides an alternate
method to describe processor idle states.
LPI extensions leverages the processor container device(again introduced
in ACPI 6.0) allowing to express which parts of the system are affected
by a given LPI state. It defines the
XPress-RICH3 PCIe driver initialises the root complex with the same
source and target address for IO window which makes translate offset 0.
This patch fixes the translate offset for the IO window in Juno PCIe
root complex ACPI table.
Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard
The ACPI spec predates the AARCH64 architecture by 5 versions, so there
is no point in supporting anything below v5.0. So set the PCD that
controls the ACPI table generation to the appropriate value.
Based on the commit e0692789058e ("ArmVirtPkg/ArmVirtQemu: limit ACPI
support to v5.0 and higher")
DmaMap () operations of type MapOperationBusMasterCommonBuffer should
return a mapping that is coherent between the CPU and the device. For
this reason, the API only allows DmaMap () to be called with this operation
type if the memory to be mapped was allocated by DmaAllocateBuffer (),
which in thi
We manage to use both an AND operation with 'gCacheAlignment - 1' and a
modulo operation with 'gCacheAlignment' in the same compound if statement.
Since gCacheAlignment is a global of which the compiler cannot guarantee
that it is a power of two, simply use the AND version, and use it against
the b
Comparing a GCD attribute field directly against EFI_MEMORY_UC and
EFI_MEMORY_WT is incorrect, since it may have other bits set as well
which are not related to the cacheability of the region. So instead,
test explicitly against the flags EFI_MEMORY_WB and EFI_MEMORY_WT,
which must be set if the re
The allocation function UncachedAllocatePages () may return NULL, in
which case our implementation of DmaAllocateBuffer () should return
EFI_OUT_OF_RESOURCES rather than silently ignoring the NULL value and
returning EFI_SUCCESS.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-b
In the DmaMap () operation, if the region to be mapped happens to be
aligned to the Cache Writeback Granule (CWG) (whose value is typically
64 or 128 bytes and 2 KB maximum), we remap the memory as uncached.
Since remapping memory occurs at page granularity, while the buffer and the
CWG may be muc
Michael,
In your patch, you use GCC's __noreturn attribute at the end of the line. Does
GCC have a version of this that precedes the
declaration?
Since use of noreturn would apply in a significant number of cases, I was
hoping to be able to produce a NORETURN macro to be used
at the beginning
Looks good. No objection here
Reviewed-by: Samer El-Haj-Mahmoud
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Wu,
Jiaxin
Sent: Tuesday, April 19, 2016 3:55 AM
To: El-Haj-Mahmoud, Samer ;
edk2-devel@lists.01.org
Subject: Re: [edk2] Request H
On 04/18/16 23:23, Matt Fleming wrote:
> On Mon, 18 Apr, at 04:33:42PM, Laszlo Ersek wrote:
>>
>> I think at this point I'll copy Matt :) , and ask you to reproduce
>> the issue with a fresh upstream kernel (most recent Linux release,
>> or even fresh git). If it reproduces, then it's an upstream k
On 04/18/16 22:17, Jordan Justen wrote:
> Reviewed-by: Jordan Justen
Reviewed-by: Laszlo Ersek
Tested-by: Laszlo Ersek
Commit 90bb4c577d055e7ac6f0488b21885f65617eec82.
Thank you for the contribution, Volker!
Laszlo
> On 2016-04-18 12:51:30, Volker Rümelin wrote:
>> Current code in PciEnableD
Background (And also Question):
The PXE Base Code Protocol is no longer produced if selecting to boot from UEFI
HTTP device from boot menu. Does anyone here know why or is it's just a problem
of my environment (I'm using OVMF from openSUSE) ?
That made the work to support it in grub2 more complic
Reviewed-by: Liming Gao
> -Original Message-
> From: Bi, Dandan
> Sent: Monday, April 18, 2016 3:47 PM
> To: edk2-devel@lists.01.org
> Cc: Gao, Liming; Dong, Eric
> Subject: [PATCH v2 0/2] Get default value from CallBack function for
> OrderedList
>
> For a question, it can retrive defau
Reviewed-by: Liming Gao
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Yonghong Zhu
> Sent: Tuesday, April 12, 2016 11:10 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [Patch] BaseTools: Add mixed PCD support feature
>
> Problem state
Thank you for your series comments, will update them while checking in.
Thanks
Lubo
-Original Message-
From: Ye, Ting
Sent: Tuesday, April 19, 2016 5:02 PM
To: Zhang, Lubo ; edk2-devel@lists.01.org
Cc: Fu, Siyuan ; Wu, Jiaxin
Subject: RE: [edk2] [patch] MdeModulePkg: refine codes of i
Same comment for this patch for MdeModulePkg:
Suggest to update below comment for EFI_ACCESS_DENIED from
+ @retval EFI_ACCESS_DENIED The interface was not removed because the
interface is
+still being used by a driver.
To:
: The protocol could not be removed
Suggest to update below comment for EFI_ACCESS_DENIED from
+ @retval EFI_ACCESS_DENIED The interface was not removed because the
interface is
+still being used by a driver.
To:
: The protocol could not be removed from the handle since its interfaces are
being
I would like to attach this feature branch "Readme.MD" file first before the
new branch created. And also update one of the request patch since the latest
version commit in CryptoPkg is in conflict with this fix. The patch subject is
<[Patch 2/6] CryptoPkg: Add OpensslTlsLib module to enable '
v2:
* The latest version commit in CryptoPkg is in conflict with
this fix. So, this update resolve the conflict issue.
* Remove NULL 'time' parameter fix and make it as a standalone
commit.
* Update OpensslTlsLib implementation.
* convert OpensslTlsLib.uni from UTF-16 to UTF-8.
This patch is used
Michael:
I check GenFw logic. If no symbols, it will impact the relocation in the
converted PE COFF image. I suggest you continue to check why the generated ELF
image misses symbols.
Thanks
Liming
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Beh
When combining UEFI firmware built from Tianocore with ARM Trusted
Firmware running in EL3, it is the responsibility of ATF that only
a single core enters the UEFI firmware in EL2, and the remaining cores
are released directly to the OS via PSCI SMC calls.
In this case, we don't need the MpCore fl
HI ,
I am looking for KeyEnroll utiltiy source code.
I tried searching for it in edk2 github, but could not find it.
Thank you,
Vinod
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