-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 4 ++--
Platform/LeMaker/CelloBoard/CelloBoard.dsc | 4 ++--
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc| 4
Instead of relying on the compiler command line to pass the value
of NUM_CORES as a preprocessor define, use the value of the PcdCoreCount
PCD that we already set in the platform .DSC.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD
On Tue, 11 Dec 2018 at 15:03, Leif Lindholm wrote:
>
> On Tue, Dec 11, 2018 at 02:25:10PM +0100, Ard Biesheuvel wrote:
> > Ensure that we prevent the CPU from proceeding after having taken an
> > unhandled exception on a RELEASE build, which does not contain the
> >
day, December 11, 2018 2:19 AM
> > To: Ard Biesheuvel
> > Cc: edk2-devel@lists.01.org; Gao, Liming
> > Subject: Re: [edk2] [PATCH] BaseTools/tools_def AARCH64: move GCC49/GGC5 to
> > 4 KB section alignment
> >
> > On 12/10/18 19:12, Ard Biesheu
build.py...
: error F015: From DEC Default Value {CODE({0})}:28:9: error:
expected expression before ‘{’ token
From DEC Default Value {CODE({0})}:87:9: error: expected expression
before ‘{’ token
>
> Thanks,
> Bob
> -Original Message-
> From: Gao, Liming
> Sent: Tuesda
mVirtQemuKernel-ARM/RELEASE_CLANG38/ARM/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable/DEBUG/ArmVirtPrePiUniCoreRelocatable.dll
unsupported ELF EM_ARM relocation 0x60.
> > -Original Message-
> > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > Sent: T
all obsolete tool chains. Is it OK?
>
Yes that is fine, whatever works for you.
> > -Original Message-----
> > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > Sent: Tuesday, December 11, 2018 12:37 AM
> > To: Laszlo Ersek
> > Cc: edk2-devel@lists.
Ensure that we prevent the CPU from proceeding after having taken an
unhandled exception on a RELEASE build, which does not contain the
ASSERT() which ensures this on DEBUG and NOOPT builds.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library
On Tue, 11 Dec 2018 at 13:57, Leif Lindholm wrote:
>
> Not my package, but a couple of minor style/language comments below
> (because this is awkward enough any future readers/users will need all
> the help they can get).
>
> On Tue, Dec 11, 2018 at 01:19:36PM +0100, Ar
Move some PCD settings outs of the [PcdsFixedAtBuild.AARCH64] block,
so that they apply to 32-bit ARM as well. Without this change, the
ARM build doesn't work.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/ArmVirtQemuKernel.dsc | 20
Patch #1 reshuffles the .dsc contents of ArmVirtQemuKernel so that we
can run on ARM targets as well.
Patch #2 fixes the CLANG38 build for ArmVirtQemuKernel and ArmVirtXen,
by tweaking the linker options passed to emit the self-relocating PrePi
SEC module.
Ard Biesheuvel (2):
ArmVirtPkg
indirectly via a GOT entry.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/ArmVirtQemuKernel.dsc| 12 --
ArmVirtPkg/ArmVirtXen.dsc | 12 --
ArmVirtPkg/PrePi
On Tue, 11 Dec 2018 at 02:48, Wu, Hao A wrote:
>
> > -Original Message-
> > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > Sent: Saturday, December 08, 2018 6:25 PM
> > To: edk2-devel@lists.01.org
> > Cc: Wang, Jian J; Wu, Hao A; Ni, Ruiyu; A
On Tue, 11 Dec 2018 at 12:19, Ard Biesheuvel wrote:
>
> On Tue, 11 Dec 2018 at 10:53, Leif Lindholm wrote:
> >
> > On Tue, Dec 11, 2018 at 10:37:15AM +0100, Ard Biesheuvel wrote:
> > > We currently permit R_ARM_GOT_PREL relocations in the ELF32 conversion
> >
On Tue, 11 Dec 2018 at 10:53, Leif Lindholm wrote:
>
> On Tue, Dec 11, 2018 at 10:37:15AM +0100, Ard Biesheuvel wrote:
> > We currently permit R_ARM_GOT_PREL relocations in the ELF32 conversion
> > routines, under the assumption that relative relocations are fine as
> > lo
rather than a runtime failure
if such relocations do occur.
Cc: Bob Feng
Cc: Liming Gao
Cc: Leif Lindholm
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Without this patch, CLANG38 builds of ArmVirtQemuKernel-ARM (in LTO mode)
succeed, but the resulting
On Tue, 11 Dec 2018 at 10:04, Sumit Garg wrote:
>
> On Tue, 11 Dec 2018 at 13:56, Ard Biesheuvel
> wrote:
> >
> > On Tue, 11 Dec 2018 at 08:46, Sumit Garg wrote:
> > >
> > > This driver uses OpteeLib to interface with OP-TEE based RNG service
> >
On Tue, 11 Dec 2018 at 08:46, Sumit Garg wrote:
>
> This driver uses OpteeLib to interface with OP-TEE based RNG service
> (pseudo trusted application) to implement EFI_RNG_PROTOCOL that is used
> to seed kernel entropy pool.
>
> Cc: Ard Biesheuvel
> Cc: Leif Lindholm
On Tue, 11 Dec 2018 at 08:39, Sumit Garg wrote:
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sumit Garg
Reviewed-by: Ard Biesheuvel
Pushed as f4c8c1bbf169..f0574a194c1e
> ---
> ArmPkg/Include/Library/OpteeLib.h | 1 +
> 1 file changed, 1 ins
On Tue, 11 Dec 2018 at 01:53, Gao, Liming wrote:
>
> If PCD is related to one structure in DEC/DSC, it can be refer as structure
> pointer in C source code. Here is wiki for its usage:
> https://github.com/lgao4/edk2/wiki/StrucutrePcd-Usage
>
OK so I now have this in my .dec file
On Mon, 10 Dec 2018 at 22:58, Leif Lindholm wrote:
>
> On Wed, Dec 05, 2018 at 07:50:14PM +0100, Ard Biesheuvel wrote:
> > Primarily, this series gets rid of the hacked up way this platform
> > patches the DSDT at build time, by #include'ing intermediate output
> > of th
On Mon, 10 Dec 2018 at 23:20, Leif Lindholm wrote:
>
> On Thu, Dec 06, 2018 at 01:12:02PM +0100, Ard Biesheuvel wrote:
> > After fixing the iasl issue yesterday, I got a bit carried away and ended
> > up rewriting most of the ACPI table generation logic for Styx. So this
On Mon, 10 Dec 2018 at 23:14, Leif Lindholm wrote:
>
> On Wed, Dec 05, 2018 at 09:10:48PM +0100, Ard Biesheuvel wrote:
> > The PCDs containing the default MAC addresses are of type UINT64,
> > and so the byte order needs to be inverted. As they are currently,
> > bo
On Mon, 10 Dec 2018 at 19:08, Laszlo Ersek wrote:
>
> On 12/10/18 15:13, Ard Biesheuvel wrote:
> > Since 4 KB section alignment is required when mapping PE/COFF images
> > with strict permissions, update the default section alignment when
> > using GCC49 and GCC5 in REL
On Mon, 10 Dec 2018 at 15:40, Laszlo Ersek wrote:
>
> Hi Ard,
>
> On 12/10/18 09:36, Ard Biesheuvel wrote:
>
> > Could anyone remind me why we have OpensslLib and OpensslLibCrypto?
> > Since these are static libraries, only the referenced objects should
> > be in
On Mon, 10 Dec 2018 at 16:25, Laszlo Ersek wrote:
>
> On 12/08/18 10:32, Ard Biesheuvel wrote:
> > This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain
> > definitions, which are on the list to be removed, along with VS2003,
> > VS2005, VS2008, VS2010,
for X64?
> Thanks
> Liming
> > -Original Message-
> > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
> > Biesheuvel
> > Sent: Monday, December 10, 2018 3:23 PM
> > To: Wang, Jian J
> > Cc: Andrew Jones ; Wu, Hao A ;
>
remains in effect.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
BaseTools/Conf/tools_def.template | 24 +++-
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/BaseTools/Conf/tools_def.template
b/BaseTools/Conf
On Mon, 10 Dec 2018 at 13:50, Leif Lindholm wrote:
>
> On Sat, Dec 08, 2018 at 10:32:42AM +0100, Ard Biesheuvel wrote:
> > This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain
> > definitions, which are on the list to be removed, along with VS2003,
> >
On Fri, 23 Nov 2018 at 11:57, Laszlo Ersek wrote:
>
> +Ard, +Leif
>
> On 11/22/18 06:21, Fu Siyuan wrote:
> > This patch provides a set of include segment files for platform owner to
> > easily enable/disable network stack support on their platform.
> >
> > For DSC, there are:
> > - a
On Mon, 10 Dec 2018 at 03:04, Wang, Jian J wrote:
>
> Hi Ard,
>
> I think MAX_ALLOC_ADDRESS will affect other archs besides ARM. Please do
> enough
> test for them (IA32/X64 for my concern).
>
For all other architectures, MAX_ADDRESS == MAX_ALLOC_ADDRESS is
always true, so these changes only
ord store on the first argument, passed in
register r0, assuming that the pointer type of the argument is
enough to guarantee that the value is suitably aligned.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Library/FileExplorer
that support ARM
and/or AARCH64, let's give Liming a hand and cover the ARM side of
things first, so that everything that remains to be removed is x86
only.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
BaseTools/Conf/tools_def.template | 143
gt; ---
> Change from v2:
> No code change. Posting patch again with Change-Id removed.
>
Reviewed-by: Ard Biesheuvel
Pushed as 327ff4ae71ae..0eaa50231c02
Thanks!
> Platform/ARM/SgiPkg/SgiPlatform.dsc | 6 +
> Platform/ARM/SgiPkg/SgiPlatform
On Fri, 7 Dec 2018 at 15:33, Pete Batard wrote:
>
> Hi Ard,
>
> On 2018.12.07 14:08, Ard Biesheuvel wrote:
> > On Fri, 7 Dec 2018 at 13:13, Pete Batard wrote:
> >>
> >> Preamble:
> >>
> >> Because of its price point, ease of use and avail
On Fri, 7 Dec 2018 at 13:13, Pete Batard wrote:
>
> Preamble:
>
> Because of its price point, ease of use and availability, the Raspberry Pi is
> undeniably one of the most successful ARM platform in existence today. Its
> widespread adoption therefore makes it a perfect fit as an EDK2 platform.
On Fri, 7 Dec 2018 at 13:47, Ard Biesheuvel wrote:
>
> On Fri, 7 Dec 2018 at 13:46, Laszlo Ersek wrote:
> >
> > On 12/07/18 12:23, Ard Biesheuvel wrote:
> > > Limit the PEI memory region so it will not extend beyond what we can
> > > address architec
On Fri, 7 Dec 2018 at 13:46, Laszlo Ersek wrote:
>
> On 12/07/18 12:23, Ard Biesheuvel wrote:
> > Limit the PEI memory region so it will not extend beyond what we can
> > address architecturally when running with 4 KB pages.
> >
> > Contributed-under: TianoC
On Fri, 7 Dec 2018 at 11:43, Ard Biesheuvel wrote:
>
> On Fri, 7 Dec 2018 at 11:41, Laszlo Ersek wrote:
> >
> > On 12/06/18 22:37, Ard Biesheuvel wrote:
> > > This reverts commit 82379bf6603274e81604d5a6f6bb14bdde616286.
> > >
> > > On AArch64,
Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdePkg/Include/AArch64/ProcessorBind.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/MdePkg/Include/AArch64/ProcessorBind.h
b/MdePkg/Include/AArch64/ProcessorBind.h
index 968c18f915ae..a8c698484a1d 100644
--- a/MdePkg
instead of MAX_ADDRESS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
b/ArmPkg/Library
on, architectures may elect
to override it to a smaller number.
This means that all replacements of MAX_ADDRESS with MAX_ALLOC_ADDRESS
are functional no-ops unless an architecture sets a value for the latter.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdePkg
Limit the PEI memory region so it will not extend beyond what we can
address architecturally when running with 4 KB pages.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c | 4 ++--
1 file changed, 2
below this limit to above
it should be split.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
a/ArmVirtPkg
executing
under the OS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
index
: Eric Auger
Cc: Andrew Jones
Cc: Philippe Mathieu-Daude
Ard Biesheuvel (7):
MdePkg/Base: introduce MAX_ALLOC_ADDRESS
MdeModulePkg/Dxe/Gcd: disregard memory above MAX_ALLOC_ADDRESS
MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into account
ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS
-by: Ard Biesheuvel
---
MdeModulePkg/Core/Dxe/Mem/Page.c | 52 ++--
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c b/MdeModulePkg/Core/Dxe/Mem/Page.c
index 961c5b833546..5ad8e1171ef7 100644
--- a/MdeModulePkg/Core/Dxe/Mem/Page.c
+++ b
On Fri, 7 Dec 2018 at 11:41, Laszlo Ersek wrote:
>
> On 12/06/18 22:37, Ard Biesheuvel wrote:
> > This reverts commit 82379bf6603274e81604d5a6f6bb14bdde616286.
> >
> > On AArch64, we can only use 48 address bits while running in UEFI,
> > while the GCD and UEFI mem
On Thu, 6 Dec 2018 at 15:42, Gao, Liming wrote:
>
> Hi, all
> tools_def.template includes all tool chains. Some are not used any more.
> And, there is no verification for them. So, I propose to remove them. They
> are VS2003, VS2005, VS2008, VS2010, DDK3790, UNIXGCC, GCC44, GCC45, GCC46,
>
Auger
Cc: Andrew Jones
Cc: Philippe Mathieu-Daude
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
MdePkg/Include/AArch64/ProcessorBind.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/AArch64/ProcessorBind.h
b
tree obtained from the
secure firmware?
> On Tue, Dec 4, 2018 at 8:16 PM Ard Biesheuvel
> wrote:
>>
>> On Tue, 4 Dec 2018 at 10:12, Vijayenthiran Subramaniam
>> wrote:
>> >
>> > From: Daniil Egranov
>> >
>> > SGI platforms support multiple
On Thu, 6 Dec 2018 at 18:02, Jeff Brasen wrote:
>
>
>
> -Original Message-----
> From: Ard Biesheuvel
> Sent: Thursday, December 6, 2018 9:54 AM
> To: Jeff Brasen
> Cc: edk2-devel@lists.01.org; Leif Lindholm ; Girish
> Pathak
> Subject: Re: [PATCH v2] ArmPk
On Thu, 6 Dec 2018 at 13:43, Vijayenthiran Subramaniam
wrote:
>
> Add HDLCD platform library for SGI platform that implements platform
> callbacks for the Arm HDLCD driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Vijayenthiran Subramaniam
> ---
>
On Wed, 5 Dec 2018 at 12:58, Sumit Garg wrote:
>
> Add dummy RPC handler for RPCs that are not implemented as control
> should be returned back to OP-TEE in case any RPC is invoked.
>
> Cc: Ard Biesheuvel
> Cc: Leif Lindholm
> Contributed-under: TianoCore Contribution Agree
oid causing dependencies like these between these two repos.
>
For the series
Reviewed-by: Ard Biesheuvel
Pushed as 07c6bc27730d..327ff4ae71ae
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
On Thu, 6 Dec 2018 at 01:37, Jeff Brasen wrote:
>
> Leif/Ard,
>
>
> Any comments on this v2 patch for this?
>
>
Hi Jeff,
I'm not sure what level of bikeshedding is justified when it comes to
a driver such as this one, which is very recent, and mostly for
platform internal use. However, I will
simplifies the MADT generation code.
Ard Biesheuvel (2):
Silicon/AMD/Styx: merge ACPI table drivers
Silicon/Styx/AcpiPlatformDxe: simplify MADT generation logic
.../AMD/OverdriveBoard/OverdriveBoard.dsc | 1 -
Platform/LeMaker/CelloBoard/CelloBoard.dsc| 1 -
.../Overdrive1000Board
ACPI table support on Seattle is split into two parts for no good
reason: AcpiPlatformDxe and AmdStyxAcpiLib. Let's merge them
together, and clean up the code that iterates over the tables and
installs them.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
the 'enabled' flag on each CPU that is
reported as present by the secure firmware.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 +-
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe
On Thu, 6 Dec 2018 at 00:56, Gao, Liming wrote:
>
> Reviewed-by: Liming Gao
>
Thanks all
Pushed as 6e8cad49a09d..67938bcc9d9e
> > -Original Message-
> > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
> > Biesheuvel
> > Se
The PCDs containing the default MAC addresses are of type UINT64,
and so the byte order needs to be inverted. As they are currently,
both default MAC addresses are invalid since they have the multicast
bit set.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Enable the 'acpiview' UEFI shell command so we can inspect the ACPI
tables at boot time.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 1 +
Platform/LeMaker/CelloBoard/CelloBoard.dsc
Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/AMD/Styx/AcpiTables/AcpiTables.inf | 2 -
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 5 +
Silicon/AMD/Styx/AcpiTables/Dsdt.c | 127
--
Silicon/AMD/Styx
Set the GOP resolution to 0x0 so that the resolution will be
chosen by the driver, usually based on the capabilities of
the connected display.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 3 +++
1 file
Instead of adding yet another redefinition in the next patch, move
the silicon revision testing macros into a shared header file.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/AMD/Styx/Common/SocVersion.h | 19
-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.dsc| 3 --
Platform/LeMaker/CelloBoard/CelloBoard.dsc| 4 ---
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
-off-by: Ard Biesheuvel
---
Platform/AMD/OverdriveBoard/OverdriveBoard.fdf | 1 +
Platform/LeMaker/CelloBoard/CelloBoard.fdf | 1 +
Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.fdf | 1 +
Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf | 7
Primarily, this series gets rid of the hacked up way this platform
patches the DSDT at build time, by #include'ing intermediate output
of the iasl compiler [or some version of it, at least]
While at it, apply some other cleanups/improvements.
Ard Biesheuvel (6):
Silicon/AMD/Styx: move SOC
Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
BaseTools/Source/C/Include/AArch64/ProcessorBind.h | 5 -
BaseTools/Source/C/Include/Arm/ProcessorBind.h | 5 -
BaseTools/Source/C/Include/Common/UefiBaseTypes.h | 1 -
BaseTools/Source/C/Include/Ia32/ProcessorBind.h| 5
gt;-Original Message-
> >From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
> >Biesheuvel
> >Sent: Saturday, December 01, 2018 6:46 AM
> >To: edk2-devel@lists.01.org
> >Cc: Gao, Liming ; Carsey, Jaben
> >; Laszlo Ersek
>
ssage-
> >From: Laszlo Ersek [mailto:ler...@redhat.com]
> >Sent: Monday, December 03, 2018 9:06 PM
> >To: Ard Biesheuvel ; edk2-devel@lists.01.org
> >Cc: Zhu, Yonghong ; Gao, Liming
> >; Feng, Bob C ; Carsey, Jaben
> >
> >Subject: Re: [PATCH v2 4/6] BaseTo
On Tue, 4 Dec 2018 at 18:19, Leif Lindholm wrote:
>
> On Tue, Dec 04, 2018 at 05:40:14PM +0100, Ard Biesheuvel wrote:
> > > > +STATIC
> > > > +EFI_STATUS
> > > > +MvGpioGetValue (
> > > > + IN MARVELL_GPIO_PROTOCOL *This,
> >
On Tue, 4 Dec 2018 at 17:37, Leif Lindholm wrote:
>
> On Sat, Oct 20, 2018 at 03:57:37AM +0200, Marcin Wojtas wrote:
> > From: jinghua
> >
> > Marvell Armada 7k/8k SoCs comprise integrated GPIO controllers,
> > one in AP and two in each possible CP hardware blocks.
> >
> > This patch introduces
ove some of the error messages as well.
>
So the platform ID is still guaranteed to be non-zero?
> Cc: Ard Biesheuvel
> Cc: Leif Lindholm
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chandni Cherukuri
> ---
> Platform/ARM/SgiPkg/Library/SgiPla
Please explain
- what was wrong and why
- how this change fixes it
and put it in the commit log.
Thanks,
On Tue, 4 Dec 2018 at 05:42, Meenakshi Aggarwal
wrote:
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
>
On Tue, 4 Dec 2018 at 10:12, Vijayenthiran Subramaniam
wrote:
>
> From: Daniil Egranov
>
> SGI platforms support multiple virtio devices. So the existing code, that
> supports registration of only the virtio disk, is restructured to
> accommodate the registration of additional virtio devices.
>
> On 4 Dec 2018, at 02:44, Chris Co wrote:
>
>
>
>> -Original Message-
>> From: Leif Lindholm
>> Sent: Monday, December 3, 2018 1:43 AM
>> To: Chris Co
>> Cc: edk2-devel@lists.01.org; Ard Biesheuvel ;
>> Michael D Kinney
>>
On Mon, 3 Dec 2018 at 13:55, Tomas Pilar (tpilar) wrote:
>
>
>
> On 03/12/2018 12:40, Ard Biesheuvel wrote:
> > On Wed, 28 Nov 2018 at 18:40, Tomas Pilar (tpilar)
> > wrote:
> >> Hi,
> >>
> >> Are there any plans for a crypto library tha
On Fri, 30 Nov 2018 at 12:28, Ard Biesheuvel wrote:
>
> Rationale in patch #4. Patch #3 is a prerequisite patch that ensures
> that we no longer need page #0 to be mapped for the NOR flash driver
> to be able to expose it as a read/write block device.
>
> Patches #1 and #2 are
On Mon, 3 Dec 2018 at 14:45, Laszlo Ersek wrote:
>
> On 12/03/18 11:03, Udit Kumar wrote:
> > Hi Laszlo
> >
> >> Are you using the latest edk2?
> > Yes, when I hit the bug, first step was to move to latest edk2. But this
> > didn't helped.
> >
> > I am not sure, why we are keeping PL011 Fifo
On Wed, 28 Nov 2018 at 18:40, Tomas Pilar (tpilar)
wrote:
>
> Hi,
>
> Are there any plans for a crypto library that does not pull in openSSL? When
> I try to add BaseCryptLib to be able to use FmpAuthenticationLib, my driver
> size baloons significantly (increase of ~0x3) and it seems like
The maximum value that can be represented by the native word size
of the *target* should be irrelevant when compiling tools that
run on the build *host*. So drop the definition of MAX_UINTN, now
that we no longer use it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard
Parsing a string into an integer variable of the native word size
is not defined for the BaseTools, since the same tools may be used
to build firmware for different targets with different native word
sizes.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Replace invocations of StrHexToUintn() with StrHexToUint64(), so
that we can drop the former.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Jaben Carsey
---
BaseTools/Source/C/DevicePath/DevicePathFromText.c | 4 ++--
1 file changed, 2
even on 32-bit build hosts.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Reviewed-by: Jaben Carsey
---
BaseTools/Source/C/Common/CommonLib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/BaseTools/Source/C/Common/CommonLib.c
b
on this definition.
Changes since v1:
- miss type change in #1 causing a build failure on MSVC
- add acks from Jaben
Cc: Laszlo Ersek
Cc: Yonghong Zhu
Cc: Liming Gao
Cc: Bob Feng
Cc: Jaben Carsey
Ard Biesheuvel (6):
BaseTools/CommonLib: avoid using 'native' word size in IP address
handling
parsing strings.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
BaseTools/Source/C/Common/CommonLib.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/BaseTools/Source/C/Common/CommonLib.c
b/BaseTools/Source/C
Replace the default size limit of IsDevicePathValid() with a value
that does not depend on the native word size of the build host.
64 KB seems sufficient as the upper bound of a device path handled
by UEFI.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
On Thu, 29 Nov 2018 at 18:59, Ard Biesheuvel wrote:
>
> On Wed, 28 Nov 2018 at 15:34, Ard Biesheuvel
> wrote:
> >
> > This v3 subsumes and/or supersedes
> >
> > [PATCH v2 00/13] ArmPkg, ArmVirtPkg: lift 40-bit IPA space limit
> > [PATCH] MdePkg/Processor
-off-by: Ard Biesheuvel
---
ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf | 5 +
ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c | 13 +++--
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf
b
by these changes.
Cc: Leif Lindholm
Cc: Laszlo Ersek
Cc: Eric Auger
Cc: Andrew Jones
Cc: Philippe Mathieu-Daude
Ard Biesheuvel (4):
ArmPkg/ArmMmuLib ARM: handle unmapped section in GetMemoryRegion()
ArmPkg/ArmMmuLib ARM: handle unmapped sections when updating
permissions
ArmVirtPkg
(), but the region
may be unmapped entirely, in which case the code will crash. So check
if a section mapping exists before dereferencing it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 3 +++
1 file changed, 3
out crashing QEMU.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf| 4 ++--
ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf | 2 ++
ArmVirtPkg/Library/QemuVi
Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
index ec51e072ab43
On Fri, 30 Nov 2018 at 12:00, Leif Lindholm wrote:
>
> On Fri, Nov 30, 2018 at 11:55:03AM +0100, Ard Biesheuvel wrote:
> > gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize will be removed, so
> > drop any overrides from the platforms in edk2-platforms.
> >
> >
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize will be removed, so
drop any overrides from the platforms in edk2-platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/Hisilicon/Hisilicon.dsc.inc | 1 -
Silicon
On Wed, 28 Nov 2018 at 15:34, Ard Biesheuvel wrote:
>
> This v3 subsumes and/or supersedes
>
> [PATCH v2 00/13] ArmPkg, ArmVirtPkg: lift 40-bit IPA space limit
> [PATCH] MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits
> [PATCH v2 0/2] ArmVirtPkg: remove high periph
On Thu, 29 Nov 2018 at 16:15, Gao, Liming wrote:
>
> Do you verify which GCC arch? 32bit or 64bit or ARM?
>
64-bit ARM
> > -Original Message-----
> > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > Sent: Thursday, November 29, 2018 11:14 PM
> &
UINT64 Uint64;
It builds fine with GCC though.
> Below > + UINTN Uint64; ==> > + UINT64
> Uint64;
> > -Original Message-
> > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > Sent: Thursday, N
even on 32-bit build hosts.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
BaseTools/Source/C/Common/CommonLib.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/BaseTools/Source/C/Common/CommonLib.c
b/BaseTools/Source/C/Common
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