On 31 August 2016 at 21:43, Jordan Justen wrote:
> On 2016-08-19 07:25:54, Laszlo Ersek wrote:
>> On 08/19/16 15:06, Ard Biesheuvel wrote:
>> > On 19 August 2016 at 14:49, Laszlo Ersek wrote:
>> >> This series solves
>> >> <https://tianocore.acgmult
On 1 September 2016 at 13:11, Vikas C Sajjan wrote:
> The commit "965268e SecurityPkg: Use IsZeroGuid API for zero GUID checking"
> breaks the ArmPkg build as below.
>
> edk2/MdeModulePkg/Universal/SetupBrowserDxe/Setup.c:184: undefined reference
> to `IsZeroGuid'
> edk2/MdeModulePkg/Universal/Se
On 1 September 2016 at 20:52, Jordan Justen wrote:
> On 2016-09-01 11:46:04, Laszlo Ersek wrote:
>> On 09/01/16 20:03, Jordan Justen wrote:
>>
>> > I think there would be value to have a non-VGA device that could still
>> > configure a simple framebuffer. VGA does bring a fair amount of other
>> >
On 1 September 2016 at 21:23, Ard Biesheuvel wrote:
> On 1 September 2016 at 20:52, Jordan Justen wrote:
>> On 2016-09-01 11:46:04, Laszlo Ersek wrote:
>>> On 09/01/16 20:03, Jordan Justen wrote:
>>>
>>> > I think there would be value to have a non-VGA de
Feng, Star: any comments?
On 31 August 2016 at 09:45, Ard Biesheuvel wrote:
> This is v5 of my proposed changes to the AARCH64 implementation of EbcDxe
> contributed by Jeff Brasen, which has recently been merged into Tianocore.
>
> Changes since v5:
> - added Leif's ack (#3)
On 2 September 2016 at 07:37, Tian, Feng wrote:
> Reviewed-by: Feng Tian
>
> Thanks
> Feng
>
> -Original Message-
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Friday, September 2, 2016 2:26 PM
> To: edk2-devel-01 ; Tian, Feng
> ; Z
-by: Ard Biesheuvel
---
MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf | 2 +-
MdePkg/Library/BaseMemoryLib/CopyMem.c | 112 ++--
MdePkg/Library/BaseMemoryLib/SetMem.c | 40 ++-
3 files changed, 140 insertions(+), 14 deletions(-)
diff --git a/MdePkg/Library
Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CompareMem.S| 149 +++
MdePkg/Library/BaseMemoryLibOptDxe/AArch64/CopyMem.S | 283
MdePkg/Library/BaseMemoryLibOptDxe/AArch64/ScanMem.S | 161
where the caches are guaranteed to be on, not only
due to the unaligned accesses but also due to the fact that it uses
DC ZVA instructions for clearing memory.
Ard Biesheuvel (2):
MdePkg/BaseMemoryLib: widen aligned accesses to 32 or 64 bits
MdePkg/BaseMemoryLibOptDxe: added accelerated AA
(on the road atm, will reply in full later)
> On 2 sep. 2016, at 14:09, Laszlo Ersek wrote:
>
>> On 08/31/16 19:59, Ard Biesheuvel wrote:
>> Now that Laszlo's virtio-gpu-pci series has removed the last remaining
>> obstacle,
>> we can get rid of the special
> On 2 sep. 2016, at 15:29, Leif Lindholm wrote:
>
> Recent changes to the BaseMemoryLib implementations in MdePkg,
> and other changes dependent on these, left all ARM* platforms
> unbuildable. To avoid this sort of thing in the future, move
> the ARM* BaseMemoryLib implementations to the same
On 2 September 2016 at 16:23, Leif Lindholm wrote:
> On Fri, Sep 02, 2016 at 04:02:44PM +0100, Ard Biesheuvel wrote:
>> > On 2 sep. 2016, at 15:29, Leif Lindholm wrote:
>> >
>> > Recent changes to the BaseMemoryLib implementations in MdePkg,
>> > and oth
On 2 September 2016 at 17:13, Laszlo Ersek wrote:
> On 09/02/16 17:27, Laszlo Ersek wrote:
>> On 09/02/16 16:58, Ard Biesheuvel wrote:
>>> (on the road atm, will reply in full later)
>>>
>>>> On 2 sep. 2016, at 14:09, Laszlo Ersek wrote:
>>
>>
On 2 September 2016 at 19:05, Leif Lindholm wrote:
> On Fri, Sep 02, 2016 at 05:07:48PM +0100, Ard Biesheuvel wrote:
>> > This isn't a proposed alternative to your patchset, this is an
>> > alternative to reverting all of the other BaseMemoryLib changes.
>> > I
Add handling of the PcdPciIoTranslation PCD, so that modules that include
this library via NULL resolution are guaranteed that it will be set before
they reference it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Reviewed-by: Laszlo Ersek
Ref: https
tionality other than support for DMA above 4 GB without bounce buffering.
Patch #5 adds support for allocating 64-bit MMIO BARs above 4 GB.
Patch #6 removes the now obsolete PciHostBridgeDxe from ArmVirtPkg.
Ard Biesheuvel (6):
ArmVirtPkg/PciHostBridgeDxe: don't set linux,pci-probe-only DT
d VGA I/O ranges.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Reviewed-by: Laszlo Ersek
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65
---
ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 400
ArmVi
tQemu has moved to a GOP
implementation that does not expose a raw framebuffer in the first place.
This effectively reverts commit 8b816c624dd4 ("ArmVirtPkg/VirtFdtDxe: set
/chosen/linux,pci-probe-only to 1 in DTB")
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:
e PCD
gArmTokenSpaceGuid.PcdPciIoTranslation as a dynamic PCD.
In terms of functionality, no changes are intended.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Reviewed-by: Laszlo Ersek
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65
---
ArmVirtPkg/ArmVirtQem
Agreement 1.0
Signed-off-by: Ard Biesheuvel
Reviewed-by: Laszlo Ersek
Ref: https://tianocore.acgmultimedia.com/show_bug.cgi?id=65
---
ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c | 80
++--
ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf | 1 +
2
> On 2 sep. 2016, at 19:32, Leif Lindholm wrote:
>
> On Fri, Sep 02, 2016 at 07:11:02PM +0100, Ard Biesheuvel wrote:
>>>> Added the fact that the Stm is not in great shape, I would really
>>>> prefer to get rid of it rather than 'promote' it to the sta
On 2 September 2016 at 21:45, Michael Zimmermann
wrote:
> If I understand this correctly this is just some MMU feature, right?
> I'm talking about a pure ARM(with atag's) linux kernel which is not UEFI
> aware.
>
> Also the LinuxLoader disables almost everything(MMU, caches, it calls
> exitbootser
On 2 September 2016 at 20:23, Laszlo Ersek wrote:
> On 09/02/16 20:15, Ard Biesheuvel wrote:
>> Now that Laszlo's virtio-gpu-pci series has removed the last remaining
>> obstacle,
>> we can get rid of the special PciHostBridgeDxe implementation in ArmVirtPkg,
>>
On 4 September 2016 at 16:41, Leif Lindholm wrote:
> Make edksetup.sh automatically update the cached configuration under
> Conf/ when the templates under BaseTools/Conf/ change.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Leif Lindholm
> ---
>
> We keep getting q
aseTools should simply default to the template if the
Conf/ version is missing? I am concerned about breaking people's
workflow where they keep non-trivial local changes in these files.
> On Sun, Sep 4, 2016 at 5:55 PM, Ard Biesheuvel
> wrote:
>>
>> On 4 September 2016 at 16:
.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.c
b/ArmVirtPkg/Library
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 20
/ard.biesheuvel/uefi-next.git/shortlog/refs/heads/pci-64bit-dma-fixes
Ard Biesheuvel (7):
MdeModulePkg/AtaAtapiPassThru: enable 64-bit PCI DMA
MdeModulePkg/EhciDxe: enable 64-bit PCI DMA
MdeModulePkg/NvmExpressDxe: enable 64-bit PCI DMA
MdeModulePkg/SdMmcPciHcDxe: enable 64-bit PCI DMA
MdeModulePkg
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c | 13
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 20
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Pci/EhciDxe/Ehci.c | 22
ng DMA memory, respectively.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciR
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
attribute if the controller supports 64-bit DMA addressing.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 22
Now that the PCI root bridge driver and various host controller drivers
have been fixed, remove the 4 GB limit on PCI DMA allocation for QEMU's
ECAM PCI host bridge.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/Library/FdtPciHostBrid
instances in ArmPlatformPkg and ArmVirtPkg that refer to
these PCDs as 32 bits wide. If you are going to make this change,
please fix up all those occurrences as well, and please don't forget
about OpenPlatformPkg.
Thanks,
Ard.
> Contributed-under: TianoCore Contribution Agreement 1.0
The various ArmLib flavors are identical in practice, and a new
ArmBaseLib has been introduced that can replace all of them. So replace
all occurrences with ArmBaseLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
BeagleBoardPkg/BeagleBoardPkg.dsc
Introduce a new ArmLib version ArmBaseLib, which encapsulates the ARM
version ArmV7Lib and the AArch64 version AArch64Lib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/ArmPkg.dsc| 1 +
ArmPkg/Library/ArmLib/ArmBaseLib.inf
: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/ArmPkg.dsc| 12
ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf | 43 ---
ArmPkg/Library/ArmLib/AArch64/AArch64LibPei.inf | 43 ---
ArmPkg/Library
Remove the NULL instance of ArmLib: it is not currently used, and its
usefulness its dubious.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/ArmPkg.dsc | 1 -
ArmPkg/Library/ArmLib/Null/NullArmLib.c | 117
The various ArmLib flavors are identical in practice, and a new
ArmBaseLib has been introduced that can replace all of them. So replace
all occurrences with ArmBaseLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmVirtPkg/ArmVirtQemu.dsc
version 'ArmBaseLib' which does target both ARM and AARCH64,
and replace all ArmLib references with ArmBaseLib.
NOTE: this requires changes for existing out of tree users of ArmLib
Ard Biesheuvel (5):
ArmPkg/ArmLib: remove NullArmLib
ArmPkg/ArmLib: introduce ArmBaseLib
ArmVirtPkg:
On 5 September 2016 at 12:41, Laszlo Ersek wrote:
> On 09/05/16 09:56, Ard Biesheuvel wrote:
>> GCC 4.8 in RELEASE mode complains about GetPciIoTranslation () potentially
>> not assigning IoTranslation, but does not notice that it returns failure in
>> this case, which m
__aeabi_memXXX entry points, which can only be satisfied by this
object. So make our memset() weak again, to let the other implementation
take precedence.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
This makes ArmVirtQemu build again for ARM with
On 5 September 2016 at 13:19, Laszlo Ersek wrote:
> On 09/05/16 11:17, Ard Biesheuvel wrote:
>> PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
>> attribute if the controller supports 64-bit DMA addressing.
>>
>> Contributed-under: TianoCore
Feng, Star: do you have any feedback on these patches? Thanks.
On 5 September 2016 at 10:17, Ard Biesheuvel wrote:
> After moving ArmVirtQemu to the generic PciHostBridgeDxe, we noticed that
> setting DmaAbove4G resulted in problems with the emulated EHCI USB host
> controller, which we
vel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
>> Ard Biesheuvel
>> Sent: Tuesday, September 6, 2016 3:48 PM
>> To: edk2-devel-01 ; Tian, Feng
>> ; Zeng, Star ; Gao, Liming
>>
>> Cc: Laszlo Ersek ; Leif Lindholm
>> ; Ard Biesheuvel
>> Subje
On 6 September 2016 at 12:13, Bhupesh Sharma wrote:
> Hi EDK2 experts,
>
> We have recently added the support for storing UEFI run-time variables on
> underlying NOR
> Flash slave on our ARMV8 NXP board.
>
> We are successfully able to change the values of variables like boot-order
> using the l
t: Wednesday, January 11, 2017 10:01 AM
>> To: edk2-devel@lists.01.org
>> Cc: Wu, Hao A ; Ni, Ruiyu ; Ard
>> Biesheuvel
>> Subject: [edk2] [PATCH] MdeModulePkg/NonDiscoverable: Compare
>> SIZE_4GB with address type
>>
>> Refine the codes to compare the
On 16 January 2017 at 15:06, Bhupesh Sharma wrote:
> While debugging OS for ACPI BGRT support (especially on VMs),
> it is very useful to have the EFI firmware to export the
> ACPI BGRT table.
>
> This patch tries to add this support in ArmVirtPkg.
>
> Cc: Ard Biesheuve
On 17 January 2017 at 07:08, Star Zeng wrote:
> Use EfiEventGroupSignal from UefiLib and remove
> EmptyCallbackFunction.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=298
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Cc: Liming Gao
> Cc: Michael Kinney
>
On 18 January 2017 at 20:24, wrote:
> From: Achin Gupta
>
> The NOR flash banks were being mapped in the translation tables with the same
> memory attributes as RAM in the system. These attributes mark the region as
> Normal Memory and could additionally be cacheable or non-cacheable.
>
> Either
On 19 January 2017 at 12:31, Achin Gupta wrote:
> Hi Leif/Ard,
>
> On Wed, Jan 18, 2017 at 10:05:00PM +, Leif Lindholm wrote:
>> Hi Achin,
>>
>> On Wed, Jan 18, 2017 at 08:24:06PM +, achin.gu...@arm.com wrote:
>> > From: Achin Gupta
>> >
>> > The NOR flash banks were being mapped in the t
On 19 January 2017 at 21:57, Achin Gupta wrote:
> Hi Ard,
>
> On Thu, Jan 19, 2017 at 06:16:00PM +0000, Ard Biesheuvel wrote:
>> On 19 January 2017 at 12:31, Achin Gupta wrote:
>> > Hi Leif/Ard,
>> >
>> > On Wed, Jan 18, 2017 at 10:05:00PM
it.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Achin Gupta
Thanks Achin!
Reviewed-by: Ard Biesheuvel
Pushed as 90d1f671cdad
> ---
> .../Drivers/NorFlashDxe/NorFlashFvbDxe.c | 45
> +++---
> 1 file changed, 23 inser
code in the first place.
So get rid of the middle man, and update the ArmGenericTimerPhyCounterLib
and ArmGenericTimerVirtCounterLib implementations to call the system
register accessors directly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg
attempts should be limited to avoid breaking platforms such as QEMU
with TCG emulation, since that has been observed never to return the same
value from back to back reads of the counter register.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
Note that
On 20 January 2017 at 14:20, Ard Biesheuvel wrote:
> Users of ArmGenericTimerVirtCounterLib may execute under virtualization,
> which implies that they may be affected by core errata of the host.
>
> Some implementations of the ARM Generic Timer are affected by errata where
> reads
On 20 January 2017 at 14:32, Ryan Harkin wrote:
> Hi Ard,
>
> On 20 January 2017 at 12:06, Ard Biesheuvel wrote:
>> The generic timer support libraries call the actual system register
>> accessor function via a single pair of functions ArmArchTimerReadReg()
>> and Ar
On 20 January 2017 at 15:06, Marc Zyngier wrote:
> On 20/01/17 14:41, Mark Rutland wrote:
>> [Adding Marc Zyngier]
>>
>> On Fri, Jan 20, 2017 at 02:20:43PM +, Ard Biesheuvel wrote:
>>> Users of ArmGenericTimerVirtCounterLib may execute under virtualization,
>
On 20 January 2017 at 15:50, Ryan Harkin wrote:
> On 20 January 2017 at 14:35, Ard Biesheuvel wrote:
>> On 20 January 2017 at 14:32, Ryan Harkin wrote:
>>> Hi Ard,
>>>
>>> On 20 January 2017 at 12:06, Ard Biesheuvel
>>> wrote:
>>>> T
After a recent change to the AArch64 page table code, the root table
of the page tables is allocated using AllocatePool() rather than
AllocatePages() if its size is much smaller than a page. E.g., when
using 40 bits of translation, the root table only takes up 16 bytes
However, what I have noticed
On 20 January 2017 at 16:38, Laszlo Ersek wrote:
> On 01/20/17 17:05, Ard Biesheuvel wrote:
>> After a recent change to the AArch64 page table code, the root table
>> of the page tables is allocated using AllocatePool() rather than
>> AllocatePages() if its size is much sma
ution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 29
1 file changed, 6 insertions(+), 23 deletions(-)
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
On 20 January 2017 at 17:49, Leif Lindholm wrote:
> On Fri, Jan 20, 2017 at 05:05:46PM +0000, Ard Biesheuvel wrote:
>> This reverts commit d32702d2c2aa23e828363a7f88829b78ce36c3af.
>>
>> Using a pool allocation for the root translation table seemed like
>> a good idea a
On 23 January 2017 at 11:01, Laszlo Ersek wrote:
> On 01/22/17 07:43, Hao Wu wrote:
>> Please note that this patch is maily for feedback collection and the patch
>> only covers MdePkg. We are working on patches for other packages.
>>
>>
>> There are cases that the operands of an expression are all
k2.git
> Branch: fwcfg_skip
>
> Cc: Ard Biesheuvel
> Cc: Jordan Justen
>
Looks fine to me, although you're the expert here
Reviewed-by: Ard Biesheuvel
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
On 26 January 2017 at 08:39, Jiewen Yao wrote:
> If the UEFI image is page aligned, the image code section is set to read
> only and the image data section is set to non-executable.
>
> 1) This policy is applied for all UEFI image including boot service driver,
> runtime driver or application.
> 2
On 6 February 2017 at 14:51, Yao, Jiewen wrote:
> Hi Ard
>
> That is a good question.
>
>
>
> We (Intel) discussed this internally.
>
> We do not know if there is any need to make it configurable, so we start
> from non-configurable, and see if there is any feedback from other one.
>
>
>
> Glad to
On 6 February 2017 at 19:05, wrote:
> From: Alexei
>
> "ARM Generic Watchdog base addresses must be declared as UINT64 values"
> https://bugzilla.tianocore.org/show_bug.cgi?id=361
>
> PcdGenericWatchdogControlBase & PcdGenericWatchdogRefreshBase
> are declared as UINT32 values in ArmPkg.dec, but
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Jiewen
>> Yao
>> Sent: Wednesday, February 8, 2017 11:20 PM
>> To: edk2-devel@lists.01.org
>> Cc: Tian, Feng ; Ard Biesheuvel
>> ; Leif Lindholm ;
>> Kin
On 9 February 2017 at 08:49, Ard Biesheuvel wrote:
> On 9 February 2017 at 07:43, Yao, Jiewen wrote:
>> Hi Lindholm/Ard
>> This version 3 contains both of your feedback before.
>>
>> If you can do me a favor to evaluated the impact to ARM, that will be great.
>>
On 9 February 2017 at 09:09, Ard Biesheuvel wrote:
> On 9 February 2017 at 08:49, Ard Biesheuvel wrote:
>> On 9 February 2017 at 07:43, Yao, Jiewen wrote:
>>> Hi Lindholm/Ard
>>> This version 3 contains both of your feedback before.
>>>
>>> If you
0x7611063->0x87611063
>
> ConvertPageEntryAttribute 0x7612063->0x87612063
>
> Flushing GCD
>
> Flushing GCD
>
> Flushing GCD
>
> Flushing GCD
>
> Flushing GCD
>
> Flushing GCD
>
> Flushing GCD
>
> Flus
On 9 February 2017 at 14:08, Yao, Jiewen wrote:
> For X86 CPU, the memory protection attribute goes to page table, the cache
> attribute goes to MTRR register.
>
> Those are 2 difference resource, and can be set separately.
>
>
>
> The high level pseudo code is below:
>
> ===
>
On 9 February 2017 at 15:27, Yao, Jiewen wrote:
> 1) That is great. I appreciate your quick response and help.
>
> I will drop my patch for ARM 2/4, and wait for yours.
>
OK
>
>
> 2) For ImageEnd alignment issue, I agree with you.
>
> I plan to round up with:
>
> ImageRecord->ImageSi
On 9 February 2017 at 15:28, Ard Biesheuvel wrote:
> On 9 February 2017 at 15:27, Yao, Jiewen wrote:
>> 1) That is great. I appreciate your quick response and help.
>>
>> I will drop my patch for ARM 2/4, and wait for yours.
>>
>
> OK
>
>>
>
If yes, how about we use
>
> “ImageRecord->ImageSize = ALIGN_VALUE(LoadedImage->ImageSize,
> EFI_PAGE_SIZE);”
>
Perfect, thanks.
>
>
> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> Sent: Thursday, February 9, 2017 8:21 AM
> To: Yao, Jiewen
> Cc: Tian,
On 9 February 2017 at 16:30, Ard Biesheuvel wrote:
> On 9 February 2017 at 16:29, Yao, Jiewen wrote:
>> Very good point.
>>
>> Can ARCH64 set 4K paging for 64K aligned runtime memory?
>>
>
> UEFI always uses 4 KB, but the OS may use 64 KB, so to create the
&
emory attributes. On ARM, we don't have code
that manages the permission bits in the page tables, so this does little
more than ignore such attributes.
Patch #4 implements the handling for AARCH64 to manage the permissions
bits without touching or caring about the memory type attributes.
Ard Bie
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 4 +---
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 3 ---
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 15d5a8173233..7688846e70cb 10
Agreement 1.0
Signed-off-by: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 3 ++-
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 14 ++
ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
buted-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index b6ba975b353a..89e429925ba9 100644
--- a/ArmPkg/Dr
Since the new DXE page protection for PE/COFF images may invoke
EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() with only permission
attributes set, add support for this in the AARCH64 MMU code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Library
On 9 February 2017 at 16:40, Leo Duran wrote:
> This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
> provides an abstraction layer for DMA operations implemented by the
> PciHostBridgeDxe driver.
>
> Cc: Laszlo Ersek
> Cc: Ard Biesheuvel
> Contrib
On 9 February 2017 at 19:33, Laszlo Ersek wrote:
> On 02/09/17 18:56, Ard Biesheuvel wrote:
>> On 9 February 2017 at 16:40, Leo Duran wrote:
>>> This patch adds the new DxeBmDmaLib (BmDmaLib class) library, which
>>> provides an abstraction layer for DMA op
mo
> Thank you
> Yao Jiewen
>
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
> Biesheuvel
> Sent: Thursday, February 9, 2017 8:48 AM
> To: Yao, Jiewen
> Cc: Tian, Feng ; edk2-devel@lists.01.org; Leif Lindholm
> ; Kinney, Michael D ;
> Fan, Jeff
> On 10 Feb 2017, at 06:34, Ard Biesheuvel wrote:
>
>
>
>> On 10 Feb 2017, at 02:26, Yao, Jiewen wrote:
>>
>> Very good question.
>>
>> 1) Yes, I did test UEFI OS boot, which is mentioned in V1 summary:
>> ==
>> Tested
live.
> Thank you
> Yao Jiewen
>
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ard
> Biesheuvel
> Sent: Thursday, February 9, 2017 10:42 PM
> To: Yao, Jiewen
> Cc: Tian, Feng ; edk2-devel@lists.01.org; Leif Lindholm
> ; Kinney, Michael
On 10 February 2017 at 12:59, Yao, Jiewen wrote:
> Thanks for the info.
>
>
>
> Mike/Vincent also mentioned that FW does not own page tables after
> ExitBootServices(), so the OS would have to relax NX protection of RT code
> pages across SVA.
>
> Or delay setting NX protections on RT code pages u
On 10 February 2017 at 17:54, Leif Lindholm wrote:
> On Thu, Feb 09, 2017 at 05:38:09PM +0000, Ard Biesheuvel wrote:
>> The single user of EfiAttributeToArmAttribute () is the protocol
>> method EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), which uses the
>> return value to co
On 10 February 2017 at 18:16, Leif Lindholm wrote:
> On Thu, Feb 09, 2017 at 05:38:11PM +0000, Ard Biesheuvel wrote:
>> Since the new DXE page protection for PE/COFF images may invoke
>> EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() with only permission
>> attributes set, ad
On 10 February 2017 at 18:17, Leif Lindholm wrote:
> On Thu, Feb 09, 2017 at 05:38:08PM +0000, Ard Biesheuvel wrote:
>> From: Jiewen Yao
>>
>> Current Arm CpuDxe driver uses EFI_MEMORY_WP for write protection,
>> according to UEFI spec, we should use EFI_MEMORY_RO f
> On 13 Feb 2017, at 13:21, Leif Lindholm wrote:
>
>> On Thu, Feb 09, 2017 at 07:26:21PM +, evan.ll...@arm.com wrote:
>> From: Ard Biesheuvel
>>
>
> Ard - can we have some more commit message, please? :)
>
This patch was only a PoC, and needs to be
(apologies for the delayed [and now somewhat redundant] response, this
sat in my outbox since this morning)
On 9 February 2017 at 19:26, wrote:
> From: Girish Pathak
>
> This change implements GetTriggerType and SetTriggerType functions
> in ArmGicV2Dxe (GicV2GetTriggerType/GicV2SetTriggerType)
buted-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
---
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index b6ba975b353a..89e4299
ned-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 4 +---
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 3 ---
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 15d5a8173233..7688846e70cb 10
x27;t have to introduce yet another
definition.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/CpuDxe.h | 8 --
ArmPkg/Include/Library/ArmLib.h | 4 +
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
-by: Jiewen Yao
Reviewed-by: Leif Lindholm
Reviewed-by: Ard Biesheuvel
---
ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 3 ++-
ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 14 ++
ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 5 +++--
ArmPkg/Library/ArmMmuLib/AArch64
s since v1:
- add Leif's and my R-b to #1
- add Leif's R-b to #3
- fix reference to TT_ATTR_INDX_MASK in commit log (#2)
- move rather than redefine EFI_MEMORY_CACHETYPE_MASK macro (#4)
Ard Biesheuvel (3):
ArmPkg/CpuDxe: translate invalid memory types in
EfiAttributeToArmAttribute
> Signed-off-by: Haojian Zhuang
Reviewed-by: Ard Biesheuvel
> ---
> ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c
> b/ArmPlatformPkg/Drivers/PL06
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