Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update
Reviewed-by: Chasel Chiu > -Original Message- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 10:47 AM > To: edk2-devel@lists.01.org > Cc: Sinha, Ankit ; Desimone, Nathaniel L > ; Chiu, Chasel ; Gao, > Liming ; Kinney, Michael D > > Subject: [edk2-platforms/devel-MinPlatform][PATCH v4 2/3] > ClevoOpenBoardPkg/N1xxWU: Flash map update > > Updates the total BIOS flash image size to 0x5E. This size matches the > BIOS > region size already configured in the SPI flash descriptor. > > To write an image produced from the N1xxWU board build, write the N1XXWU.fd > file (~6 MB) to the beginning of the BIOS region in the SPI flash (currently > 0x22). > > Always back up the original SPI flash image. These offsets and sizes are > subject to > change over time. > > Cc: Ankit Sinha > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 2 +- > .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 > +++--- > .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 4 +- > 3 files changed, 26 insertions(+), 24 deletions(-) > > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > index 81487ed58d..2116c48fc0 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > @@ -55,7 +55,7 @@ ># ># Default value for OpenBoardPkg.fdf use ># > - DEFINE BIOS_SIZE_OPTION = SIZE_70 > + DEFINE BIOS_SIZE_OPTION = SIZE_60 > > > > > # > diff --git > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > index a727eb3b83..423c6b18f5 100644 > --- > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > +++ > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclud > +++ e.fdf > @@ -14,39 +14,41 @@ > ## > > > #=== > ==# > -# 8 M BIOS - for FSP wrapper > +# 6 M BIOS - for FSP wrapper > > #=== > ==# > -DEFINE FLASH_BASE = > 0xFF80 # > -DEFINE FLASH_SIZE = > 0x0080 # > +DEFINE FLASH_BASE = > 0xFFA2 # > +DEFINE FLASH_SIZE = > 0x005E # > DEFINE FLASH_BLOCK_SIZE = > 0x0001 > # > -DEFINE FLASH_NUM_BLOCKS = > 0x0080 # > +DEFINE FLASH_NUM_BLOCKS = > 0x005E # > > #=== > ==# > > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFFA2) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = > 0x0004 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFFA2) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= > 0x0001E000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > 0x0001E000 # Flash addr (0xFF81E000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > +0x0001E000 # Flash addr (0xFFA3E000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > = 0x2000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFF82) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFFA4) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= > 0x0002 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x0004 # Flash addr (0xFF84) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNv
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 1/3] KabylakeSiliconPkg: Add SPI write support in PEI
Reviewed-by: Chasel Chiu > -Original Message- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 10:47 AM > To: edk2-devel@lists.01.org > Cc: Desimone, Nathaniel L ; Chiu, Chasel > ; Gao, Liming ; Kinney, Michael > D > Subject: [edk2-platforms/devel-MinPlatform][PATCH v4 1/3] KabylakeSiliconPkg: > Add SPI write support in PEI > > Adds a new library PeiSpiLib to perform the initialization necessary to > perform > SPI write cycles in PEI. After initialization, it installs an instance of the > PCH_SPI_PPI. > > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc | 3 +- > .../Pch/Library/PeiSpiLib/PeiSpiLib.inf| 50 + > .../Pch/Include/Library/SpiLib.h | 32 +++ > .../Pch/Library/PeiSpiLib/PeiSpiLib.c | 225 > + > .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 5 +- > 5 files changed, 311 insertions(+), 4 deletions(-) create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > > diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > index b81a736486..bb95ce3888 100644 > --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > @@ -1,7 +1,7 @@ > ## @file > # Component description file for the SkyLake SiPkg PEI libraries. > # > -# Copyright (c) 2017, Intel Corporation. All rights reserved. > +# Copyright (c) 2017 - 2019, Intel Corporation. All rights > +reserved. > # > # This program and the accompanying materials are licensed and made available > under # the terms and conditions of the BSD License which accompanies this > distribution. > @@ -30,6 +30,7 @@ > !endif > > ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/P > eiResetSystemLib.inf > > PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchR > esetLib.inf > + SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf > > # > # Cpu > diff --git > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > new file mode 100644 > index 00..9240b6ef06 > --- /dev/null > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i > +++ nf > @@ -0,0 +1,50 @@ > +## @file > +# Component description file for PEI PCH SPI Initialization # # > +Copyright (c) 2019, Intel Corporation. All rights reserved. # # > +This program and the accompanying materials are licensed and made > +available under # the terms and conditions of the BSD License which > accompanies this distribution. > +# The full text of the license may be found at # > +http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION = 0x00010017 > + BASE_NAME = PeiSpiLib > + FILE_GUID = 4998447D-7948-448F-AB75-96E24E18FF23 > + VERSION_STRING = 1.0 > + MODULE_TYPE = PEIM > + LIBRARY_CLASS = SpiLib|PEIM PEI_CORE > + # > + # The following information is for reference only and not required by the > build > tools. > + # > + # VALID_ARCHITECTURES = IA32 X64 IPF > + # > + > +[LibraryClasses] > + DebugLib > + MemoryAllocationLib > + PcdLib > + PchCycleDecodingLib > + PchSpiCommonLib > + PciSegmentLib > + PeiServicesLib > + PeiServicesTablePointerLib > + > +[Packages] > + MdePkg/MdePkg.dec > + KabylakeSiliconPkg/SiPkg.dec > + > +[Sources] > + PeiSpiLib.c > + > +[Pcd] > + gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES > + > +[Ppis] > + gPchSpiPpiGuid ## PRODUCES > diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > new file mode 100644 > index 00..6af66f8869 > --- /dev/null > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > @@ -0,0 +1,32 @@ > +/** @file > + Library to initialize SPI services for future SPI accesses. > + > +Copyright (c) 2019, Intel Corporation. All rights r
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v4 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Kubacki, Michael A
> Sent: Tuesday, April 2, 2019 10:47 AM
> To: edk2-devel@lists.01.org
> Cc: Sinha, Ankit ; Desimone, Nathaniel L
> ; Chiu, Chasel ; Gao,
> Liming ; Kinney, Michael D
>
> Subject: [edk2-platforms/devel-MinPlatform][PATCH v4 3/3]
> ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
>
> Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support writing
> debug messages to a dedicated area on SPI flash. This is to enable closed
> chassis
> debug support on the system.
>
> DXE and later phases after memory initialization are expected to use USB
> debug.
>
> Cc: Ankit Sinha
> Cc: Nate DeSimone
> Cc: Chasel Chiu
> Cc: Liming Gao
> Cc: Michael D Kinney
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kubacki
> ---
> Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 5 +
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 20 +-
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 4 +
> .../PeiSerialPortLibSpiFlash.inf | 56
> .../PeiSerialPortLibSpiFlash.c | 326
> +
> 5 files changed, 407 insertions(+), 4 deletions(-) create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.inf
> create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.c
>
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> index 87bbfb2240..aa457e64db 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> @@ -30,6 +30,7 @@ Features\Tbt\Include
> [Guids]
> gBoardModuleTokenSpaceGuid= {0x72d1fff7, 0xa42a, 0x4219,
> {0xb9, 0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
> gTianoLogoGuid= {0x7BB28B99, 0x61BB, 0x11D5, {0x9A,
> 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
> +gSpiFlashDebugHobGuid = {0xcaaaf418, 0x38a5, 0x4d49, {0xbe,
> 0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
> gTbtInfoHobGuid = {0x74a81eaa, 0x033c, 0x4783, {0xbe,
> 0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
> gPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96,
> {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
>
> @@ -64,6 +65,10 @@
> gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x000
> 000110
>
>
> gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9000
> 0015
>
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x
> |UINT32
> +|0x9030
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|
> UINT32
> +|0x9031
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x000
> 0|UINT
> +32|0x9032
> +
> [PcdsDynamic]
>
> # Board GPIO Table
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> index 2116c48fc0..c43a30de34 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> @@ -116,10 +116,18 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
>
> +[LibraryClasses.IA32.SEC]
> +
> +SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNul
> +l.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> +TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/
> Se
> +cTestPointCheckLib.inf
> +
> +SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLi
> +bNull/SecBoardInitLibNull.inf
> +
> [LibraryClasses.IA32]
>#
># PEI phase common
>#
> +
> + SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFla
> + sh/PeiSerialPortLibSpiFlash.inf
> +
> DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxe
> Deb
> + ugLibReportStatusCode.inf
>
> FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp
> WrapperPlatformLib/PeiFspWrapperPlatformLib.inf
> !if $(TARGET) == DEBUG
>
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/P
> eiTestPointCheckLib.inf
> @@ -138,10 +146,6 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
>
> -[LibraryClasses.IA32.SEC]
> -
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S
> ecTestPointCheckLib.inf
> -
> SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLib
> Nul
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update
Reviewed-by: Chasel Chiu > -Original Message- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 9:23 AM > To: edk2-devel@lists.01.org > Cc: Sinha, Ankit ; Desimone, Nathaniel L > ; Chiu, Chasel ; Gao, > Liming ; Kinney, Michael D > > Subject: [edk2-platforms/devel-MinPlatform][PATCH v3 2/3] > ClevoOpenBoardPkg/N1xxWU: Flash map update > > Updates the total BIOS flash image size to 0x5E. This size matches the > BIOS > region size already configured in the SPI flash descriptor. > > To write an image produced from the N1xxWU board build, write the N1XXWU.fd > file (~6 MB) to the beginning of the BIOS region in the SPI flash (currently > 0x22). > > Always back up the original SPI flash image. These offsets and sizes are > subject to > change over time. > > Cc: Ankit Sinha > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 2 +- > .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 > +++--- > .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 4 +- > 3 files changed, 26 insertions(+), 24 deletions(-) > > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > index 81487ed58d..2116c48fc0 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > @@ -55,7 +55,7 @@ ># ># Default value for OpenBoardPkg.fdf use ># > - DEFINE BIOS_SIZE_OPTION = SIZE_70 > + DEFINE BIOS_SIZE_OPTION = SIZE_60 > > > > > # > diff --git > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > index a727eb3b83..423c6b18f5 100644 > --- > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > +++ > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclud > +++ e.fdf > @@ -14,39 +14,41 @@ > ## > > > #=== > ==# > -# 8 M BIOS - for FSP wrapper > +# 6 M BIOS - for FSP wrapper > > #=== > ==# > -DEFINE FLASH_BASE = > 0xFF80 # > -DEFINE FLASH_SIZE = > 0x0080 # > +DEFINE FLASH_BASE = > 0xFFA2 # > +DEFINE FLASH_SIZE = > 0x005E # > DEFINE FLASH_BLOCK_SIZE = > 0x0001 > # > -DEFINE FLASH_NUM_BLOCKS = > 0x0080 # > +DEFINE FLASH_NUM_BLOCKS = > 0x005E # > > #=== > ==# > > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFFA2) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = > 0x0004 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFFA2) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= > 0x0001E000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > 0x0001E000 # Flash addr (0xFF81E000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > +0x0001E000 # Flash addr (0xFFA3E000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > = 0x2000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFF82) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFFA4) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= > 0x0002 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x0004 # Flash addr (0xFF84) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNv
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Kubacki, Michael A
> Sent: Tuesday, April 2, 2019 9:23 AM
> To: edk2-devel@lists.01.org
> Cc: Sinha, Ankit ; Desimone, Nathaniel L
> ; Chiu, Chasel ; Gao,
> Liming ; Kinney, Michael D
>
> Subject: [edk2-platforms/devel-MinPlatform][PATCH v3 3/3]
> ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
>
> Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support writing
> debug messages to a dedicated area on SPI flash. This is to enable closed
> chassis
> debug support on the system.
>
> DXE and later phases after memory initialization are expected to use USB
> debug.
>
> Cc: Ankit Sinha
> Cc: Nate DeSimone
> Cc: Chasel Chiu
> Cc: Liming Gao
> Cc: Michael D Kinney
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kubacki
> ---
> Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 5 +
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 20 +-
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 4 +
> .../PeiSerialPortLibSpiFlash.inf | 56
> .../PeiSerialPortLibSpiFlash.c | 326
> +
> 5 files changed, 407 insertions(+), 4 deletions(-) create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.inf
> create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.c
>
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> index 87bbfb2240..aa457e64db 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> @@ -30,6 +30,7 @@ Features\Tbt\Include
> [Guids]
> gBoardModuleTokenSpaceGuid= {0x72d1fff7, 0xa42a, 0x4219,
> {0xb9, 0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
> gTianoLogoGuid= {0x7BB28B99, 0x61BB, 0x11D5, {0x9A,
> 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
> +gSpiFlashDebugHobGuid = {0xcaaaf418, 0x38a5, 0x4d49, {0xbe,
> 0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
> gTbtInfoHobGuid = {0x74a81eaa, 0x033c, 0x4783, {0xbe,
> 0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
> gPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96,
> {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
>
> @@ -64,6 +65,10 @@
> gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x000
> 000110
>
>
> gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9000
> 0015
>
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x
> |UINT32
> +|0x9030
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|
> UINT32
> +|0x9031
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x000
> 0|UINT
> +32|0x9032
> +
> [PcdsDynamic]
>
> # Board GPIO Table
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> index 2116c48fc0..c43a30de34 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> @@ -116,10 +116,18 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
>
> +[LibraryClasses.IA32.SEC]
> +
> +SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNul
> +l.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> +TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/
> Se
> +cTestPointCheckLib.inf
> +
> +SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLi
> +bNull/SecBoardInitLibNull.inf
> +
> [LibraryClasses.IA32]
>#
># PEI phase common
>#
> +
> + SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFla
> + sh/PeiSerialPortLibSpiFlash.inf
> +
> DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxe
> Deb
> + ugLibReportStatusCode.inf
>
> FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp
> WrapperPlatformLib/PeiFspWrapperPlatformLib.inf
> !if $(TARGET) == DEBUG
>
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/P
> eiTestPointCheckLib.inf
> @@ -138,10 +146,6 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
>
> -[LibraryClasses.IA32.SEC]
> -
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S
> ecTestPointCheckLib.inf
> -
> SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLib
> Nul
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 1/3] KabylakeSiliconPkg: Add SPI write support in PEI
Hi Michael, Please see below inline. Thanks! Chasel > -Original Message- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 9:23 AM > To: edk2-devel@lists.01.org > Cc: Desimone, Nathaniel L ; Chiu, Chasel > ; Gao, Liming ; Kinney, Michael > D > Subject: [edk2-platforms/devel-MinPlatform][PATCH v3 1/3] KabylakeSiliconPkg: > Add SPI write support in PEI > > Adds a new library PeiSpiLib to perform the initialization necessary to > perform > SPI write cycles in PEI. After initialization, it installs an instance of the > PCH_SPI_PPI. > > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc | 3 +- > .../Pch/Library/PeiSpiLib/PeiSpiLib.inf| 50 + > .../Pch/Include/Library/SpiLib.h | 32 +++ > .../Pch/Library/PeiSpiLib/PeiSpiLib.c | 221 > + > .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 5 +- > 5 files changed, 307 insertions(+), 4 deletions(-) create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > > diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > index b81a736486..bb95ce3888 100644 > --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > @@ -1,7 +1,7 @@ > ## @file > # Component description file for the SkyLake SiPkg PEI libraries. > # > -# Copyright (c) 2017, Intel Corporation. All rights reserved. > +# Copyright (c) 2017 - 2019, Intel Corporation. All rights > +reserved. > # > # This program and the accompanying materials are licensed and made available > under # the terms and conditions of the BSD License which accompanies this > distribution. > @@ -30,6 +30,7 @@ > !endif > > ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/P > eiResetSystemLib.inf > > PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchR > esetLib.inf > + SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf > > # > # Cpu > diff --git > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > new file mode 100644 > index 00..9240b6ef06 > --- /dev/null > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i > +++ nf > @@ -0,0 +1,50 @@ > +## @file > +# Component description file for PEI PCH SPI Initialization # # > +Copyright (c) 2019, Intel Corporation. All rights reserved. # # > +This program and the accompanying materials are licensed and made > +available under # the terms and conditions of the BSD License which > accompanies this distribution. > +# The full text of the license may be found at # > +http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION = 0x00010017 > + BASE_NAME = PeiSpiLib > + FILE_GUID = 4998447D-7948-448F-AB75-96E24E18FF23 > + VERSION_STRING = 1.0 > + MODULE_TYPE = PEIM > + LIBRARY_CLASS = SpiLib|PEIM PEI_CORE > + # > + # The following information is for reference only and not required by the > build > tools. > + # > + # VALID_ARCHITECTURES = IA32 X64 IPF > + # > + > +[LibraryClasses] > + DebugLib > + MemoryAllocationLib > + PcdLib > + PchCycleDecodingLib > + PchSpiCommonLib > + PciSegmentLib > + PeiServicesLib > + PeiServicesTablePointerLib > + > +[Packages] > + MdePkg/MdePkg.dec > + KabylakeSiliconPkg/SiPkg.dec > + > +[Sources] > + PeiSpiLib.c > + > +[Pcd] > + gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES > + > +[Ppis] > + gPchSpiPpiGuid ## PRODUCES > diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > new file mode 100644 > index 00..6af66f8869 > --- /dev/null > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > @@ -0,0 +1,32 @@ > +/** @file > + Library to initialize SPI services for future SPI accesses. > + > +Copyright (c
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update
Reviewed-by: Chasel Chiu > -Original Message- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 6:48 AM > To: edk2-devel@lists.01.org > Cc: Sinha, Ankit ; Desimone, Nathaniel L > ; Chiu, Chasel ; Gao, > Liming ; Kinney, Michael D > > Subject: [edk2-platforms/devel-MinPlatform][PATCH v2 2/3] > ClevoOpenBoardPkg/N1xxWU: Flash map update > > Updates the total BIOS flash image size to 0x5E. This size matches the > BIOS > region size already configured in the SPI flash descriptor. > > To write an image produced from the N1xxWU board build, write the N1XXWU.fd > file (~6 MB) to the beginning of the BIOS region in the SPI flash (currently > 0x22). > > Always back up the original SPI flash image. These offsets and sizes are > subject to > change over time. > > Cc: Ankit Sinha > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 2 +- > .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 > +++--- > .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 4 +- > 3 files changed, 26 insertions(+), 24 deletions(-) > > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > index 81487ed58d..2116c48fc0 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > @@ -55,7 +55,7 @@ ># ># Default value for OpenBoardPkg.fdf use ># > - DEFINE BIOS_SIZE_OPTION = SIZE_70 > + DEFINE BIOS_SIZE_OPTION = SIZE_60 > > > > > # > diff --git > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > index a727eb3b83..423c6b18f5 100644 > --- > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > +++ > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclud > +++ e.fdf > @@ -14,39 +14,41 @@ > ## > > > #=== > ==# > -# 8 M BIOS - for FSP wrapper > +# 6 M BIOS - for FSP wrapper > > #=== > ==# > -DEFINE FLASH_BASE = > 0xFF80 # > -DEFINE FLASH_SIZE = > 0x0080 # > +DEFINE FLASH_BASE = > 0xFFA2 # > +DEFINE FLASH_SIZE = > 0x005E # > DEFINE FLASH_BLOCK_SIZE = > 0x0001 > # > -DEFINE FLASH_NUM_BLOCKS = > 0x0080 # > +DEFINE FLASH_NUM_BLOCKS = > 0x005E # > > #=== > ==# > > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFFA2) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = > 0x0004 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFFA2) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= > 0x0001E000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > 0x0001E000 # Flash addr (0xFF81E000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > +0x0001E000 # Flash addr (0xFFA3E000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > = 0x2000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFF82) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFFA4) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= > 0x0002 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x0004 # Flash addr (0xFF84) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNv
Re: [edk2] [edk2-platforms][PATCH v1 2/3] ClevoOpenBoardPkg/N1xxWU: Flash map update
Reviewed-by: Chasel Chiu > -Original Message- > From: Kubacki, Michael A > Sent: Monday, April 1, 2019 7:28 AM > To: edk2-devel@lists.01.org > Cc: Sinha, Ankit ; Desimone, Nathaniel L > ; Chiu, Chasel ; Gao, > Liming ; Kinney, Michael D > > Subject: [edk2-platforms][PATCH v1 2/3] ClevoOpenBoardPkg/N1xxWU: Flash > map update > > Updates the total BIOS flash image size to 0x5E. This size matches the > BIOS > region size already configured in the SPI flash descriptor. > > To write an image produced from the N1xxWU board build, write the N1XXWU.fd > file (~6 MB) to the beginning of the BIOS region in the SPI flash (currently > 0x22). > > Always back up the original SPI flash image. These offsets and sizes are > subject to > change over time. > > Cc: Ankit Sinha > Cc: Nate DeSimone > Cc: Chasel Chiu > Cc: Liming Gao > Cc: Michael D Kinney > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 2 +- > .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 > +++--- > .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat| 4 +- > 3 files changed, 26 insertions(+), 24 deletions(-) > > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > index 81487ed58d..2116c48fc0 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > @@ -55,7 +55,7 @@ ># ># Default value for OpenBoardPkg.fdf use ># > - DEFINE BIOS_SIZE_OPTION = SIZE_70 > + DEFINE BIOS_SIZE_OPTION = SIZE_60 > > > > > # > diff --git > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > index a727eb3b83..423c6b18f5 100644 > --- > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > +++ > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclud > +++ e.fdf > @@ -14,39 +14,41 @@ > ## > > > #=== > ==# > -# 8 M BIOS - for FSP wrapper > +# 6 M BIOS - for FSP wrapper > > #=== > ==# > -DEFINE FLASH_BASE = > 0xFF80 # > -DEFINE FLASH_SIZE = > 0x0080 # > +DEFINE FLASH_BASE = > 0xFFA2 # > +DEFINE FLASH_SIZE = > 0x005E # > DEFINE FLASH_BLOCK_SIZE = > 0x0001 > # > -DEFINE FLASH_NUM_BLOCKS = > 0x0080 # > +DEFINE FLASH_NUM_BLOCKS = > 0x005E # > > #=== > ==# > > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x # Flash addr (0xFFA2) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = > 0x0004 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFF80) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x # Flash addr (0xFFA2) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize= > 0x0001E000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > 0x0001E000 # Flash addr (0xFF81E000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > +0x0001E000 # Flash addr (0xFFA3E000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > = 0x2000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFF82) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x0002 # Flash addr (0xFFA4) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize= > 0x0002 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x0004 # Flash addr (0xFF84) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNv
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 3/3] ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Kubacki, Michael A
> Sent: Tuesday, April 2, 2019 6:48 AM
> To: edk2-devel@lists.01.org
> Cc: Sinha, Ankit ; Desimone, Nathaniel L
> ; Chiu, Chasel ; Gao,
> Liming ; Kinney, Michael D
>
> Subject: [edk2-platforms/devel-MinPlatform][PATCH v2 3/3]
> ClevoOpenBoardPkg/N1xxWU: Write PEI debug messages to SPI flash
>
> Adds a new SerialPortLib instance to the ClevoOpenBoardPkg to support writing
> debug messages to a dedicated area on SPI flash. This is to enable closed
> chassis
> debug support on the system.
>
> DXE and later phases after memory initialization are expected to use USB
> debug.
>
> Cc: Ankit Sinha
> Cc: Nate DeSimone
> Cc: Chasel Chiu
> Cc: Liming Gao
> Cc: Michael D Kinney
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Michael Kubacki
> ---
> Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 5 +
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 20 +-
> .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 4 +
> .../PeiSerialPortLibSpiFlash.inf | 56
> .../PeiSerialPortLibSpiFlash.c | 326
> +
> 5 files changed, 407 insertions(+), 4 deletions(-) create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.inf
> create mode 100644
> Platform/Intel/ClevoOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialP
> ortLibSpiFlash.c
>
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> index 87bbfb2240..aa457e64db 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
> @@ -30,6 +30,7 @@ Features\Tbt\Include
> [Guids]
> gBoardModuleTokenSpaceGuid= {0x72d1fff7, 0xa42a, 0x4219,
> {0xb9, 0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
> gTianoLogoGuid= {0x7BB28B99, 0x61BB, 0x11D5, {0x9A,
> 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
> +gSpiFlashDebugHobGuid = {0xcaaaf418, 0x38a5, 0x4d49, {0xbe,
> 0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}}
> gTbtInfoHobGuid = {0x74a81eaa, 0x033c, 0x4783, {0xbe,
> 0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}}
> gPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96,
> {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
>
> @@ -64,6 +65,10 @@
> gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UINT8|0x000
> 000110
>
>
> gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x9000
> 0015
>
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x
> |UINT32
> +|0x9030
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x|
> UINT32
> +|0x9031
> +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x000
> 0|UINT
> +32|0x9032
> +
> [PcdsDynamic]
>
> # Board GPIO Table
> diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> index 2116c48fc0..c43a30de34 100644
> --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
> @@ -116,10 +116,18 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc
>
> +[LibraryClasses.IA32.SEC]
> +
> +SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNul
> +l.inf
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +
> +TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/
> Se
> +cTestPointCheckLib.inf
> +
> +SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLi
> +bNull/SecBoardInitLibNull.inf
> +
> [LibraryClasses.IA32]
>#
># PEI phase common
>#
> +
> + SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFla
> + sh/PeiSerialPortLibSpiFlash.inf
> +
> DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxe
> Deb
> + ugLibReportStatusCode.inf
>
> FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFsp
> WrapperPlatformLib/PeiFspWrapperPlatformLib.inf
> !if $(TARGET) == DEBUG
>
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/P
> eiTestPointCheckLib.inf
> @@ -138,10 +146,6 @@
> #
> !include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc
>
> -[LibraryClasses.IA32.SEC]
> -
> TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/S
> ecTestPointCheckLib.inf
> -
> SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLib
> Nul
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v2 1/3] KabylakeSiliconPkg: Add SPI write support in PEI
Hi Michael, A question in below patch inline, please help to check it. Thanks! Chasel > -Original Message- > From: Desimone, Nathaniel L > Sent: Tuesday, April 2, 2019 8:09 AM > To: Kubacki, Michael A ; > edk2-devel@lists.01.org > Cc: Chiu, Chasel ; Gao, Liming ; > Kinney, Michael D > Subject: RE: [edk2-platforms/devel-MinPlatform][PATCH v2 1/3] > KabylakeSiliconPkg: Add SPI write support in PEI > > 1. The changes in BasePchSpiCommonLib.inf seems to be no longer necessary. > > 2. Adding #include to SpiCommon.c seems to be no longer > necessary. > > Thanks, > Nate > > -Original Message- > From: Kubacki, Michael A > Sent: Monday, April 1, 2019 3:48 PM > To: edk2-devel@lists.01.org > Cc: Desimone, Nathaniel L ; Chiu, Chasel > ; Gao, Liming ; Kinney, Michael > D > Subject: [edk2-platforms/devel-MinPlatform][PATCH v2 1/3] KabylakeSiliconPkg: > Add SPI write support in PEI > > Adds a new library PeiSpiLib to perform the initialization necessary to > perform > SPI write cycles in PEI. After initialization, it installs an instance of the > PCH_SPI_PPI. > > Cc: Nate DeSimone <mailto:nathaniel.l.desim...@intel.com> > Cc: Chasel Chiu <mailto:chasel.c...@intel.com> > Cc: Liming Gao <mailto:liming@intel.com> > Cc: Michael D Kinney <mailto:michael.d.kin...@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki <mailto:michael.a.kuba...@intel.com> > --- > Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc | 3 +- > .../Pch/Library/PeiSpiLib/PeiSpiLib.inf| 50 + > .../BasePchSpiCommonLib/BasePchSpiCommonLib.inf| 6 +- > .../Pch/Include/Library/SpiLib.h | 32 +++ > .../Pch/Library/PeiSpiLib/PeiSpiLib.c | 221 > + > .../LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 6 +- > 6 files changed, 313 insertions(+), 5 deletions(-) create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Include/Library/SpiLib.h > create mode 100644 > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c > > diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > index b81a736486..bb95ce3888 100644 > --- a/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > +++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkgPeiLib.dsc > @@ -1,7 +1,7 @@ > ## @file > # Component description file for the SkyLake SiPkg PEI libraries. > # > -# Copyright (c) 2017, Intel Corporation. All rights reserved. > +# Copyright (c) 2017 - 2019, Intel Corporation. All rights > +reserved. > # > # This program and the accompanying materials are licensed and made available > under # the terms and conditions of the BSD License which accompanies this > distribution. > @@ -30,6 +30,7 @@ > !endif > > ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiResetSystemLib/P > eiResetSystemLib.inf > > PchResetLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiPchResetLib/PeiPchR > esetLib.inf > + SpiLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/PeiSpiLib/PeiSpiLib.inf > > # > # Cpu > diff --git > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > new file mode 100644 > index 00..9240b6ef06 > --- /dev/null > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i > +++ nf > @@ -0,0 +1,50 @@ > +## @file > +# Component description file for PEI PCH SPI Initialization # # > +Copyright (c) 2019, Intel Corporation. All rights reserved. # # > +This program and the accompanying materials are licensed and made > +available under # the terms and conditions of the BSD License which > accompanies this distribution. > +# The full text of the license may be found at # > +http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION = 0x00010017 > + BASE_NAME = PeiSpiLib > + FILE_GUID = 4998447D-7948-448F-AB75-96E24E18FF23 > + VERSION_STRING = 1.0 > + MODULE_TYPE = PEIM > + LIBRARY_CLASS = SpiLib|PEIM PEI_CORE > + # > + # The following information is for reference only and not required by the > build > tools. > + # > + # VALID_ARCHITECTURES = IA32 X64 IPF > + # > + > +[LibraryClasses] > + DebugLib > + MemoryAllocationLib > +
Re: [edk2] [PATCH V7 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new APIs
No change from V5.
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Monday, April 1, 2019 9:08 AM
> To: edk2-devel@lists.01.org
> Cc: Bret Barkelew ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner
> Subject: [PATCH V7 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> From: Bret Barkelew
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../BaseFspDebugLibSerialPort/DebugLib.c | 103 +-
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
Re: [edk2] [PATCH V7 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new APIs
No change from V5.
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Monday, April 1, 2019 9:08 AM
> To: edk2-devel@lists.01.org
> Cc: Bret Barkelew ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner
> Subject: [PATCH V7 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> From: Bret Barkelew
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../BaseFspDebugLibSerialPort/DebugLib.c | 103 +-
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
>
Re: [edk2] [PATCH V5 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new APIs
No change from V4.
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Thursday, March 28, 2019 4:10 PM
> To: edk2-devel@lists.01.org
> Cc: Bret Barkelew ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner
> Subject: [PATCH V5 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> From: Bret Barkelew
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../BaseFspDebugLibSerialPort/DebugLib.c | 103 +-
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
>
Re: [edk2] [PATCH V5 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new APIs
No change from V4.
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Thursday, March 28, 2019 4:10 PM
> To: edk2-devel@lists.01.org
> Cc: Bret Barkelew ; Chiu, Chasel
> ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner
> Subject: [PATCH V5 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> From: Bret Barkelew
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../BaseFspDebugLibSerialPort/DebugLib.c | 103 +-
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
Re: [edk2] [PATCH V4 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new APIs
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Thursday, March 21, 2019 10:05 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V4 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 103
> -
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + I
Re: [edk2] [PATCH V4 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new APIs
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Thursday, March 21, 2019 10:05 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V4 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> Reviewed-by: Chasel Chiu
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 103
> -
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + IN
Re: [edk2] [PATCH V3 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new APIs
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Tuesday, March 19, 2019 11:26 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V3 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 103
> -
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + IN UINTN ErrorLevel,
> + IN CONST
Re: [edk2] [PATCH V3 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new APIs
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Tuesday, March 19, 2019 11:26 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V3 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add new
> APIs
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add new APIs' implementation (DebugVPrint, DebugBPrint) in the DebugLib
> instance. These APIs would expose print routines with VaList parameter and
> BaseList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 103
> -
> 1 file changed, 98 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..8b322c038e 100644
> --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -28,6 +28,12 @@
>
> CONST CHAR8 *mHexTable = "0123456789ABCDEF";
>
> +//
> +// VA_LIST can not initialize to NULL for all compiler, so we use this
> +to // indicate a null VA_LIST //
> +VA_LIST mVaListNull;
> +
> /**
>Get stack frame pointer of function call.
>
> @@ -62,9 +68,40 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled base on Null-terminated format string and a
> + VA_LIST argument list or a BASE_LIST argument list.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevel The error level of the debug message.
> + @param Format Format string for the debug message to print.
> + @param VaListMarkerVA_LIST marker for the variable argument list.
> + @param BaseListMarker BASE_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +DebugPrintMarker (
> + IN UINTN ErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker,
> + IN BASE_LIST BaseListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +125,11 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + if (BaseListMarker == NULL) {
> +AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker); }
> + else {
> +AsciiBSPrint (Buffer, sizeof (Buffer), Format, BaseListMarker); }
>
>//
>// Send the print string to a Serial Port @@ -98,6 +137,60 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +/**
> + Prints a debug message to the debug output device if the specified
> + error level is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + IN UINTN ErrorLevel,
> + IN CO
Re: [edk2] [PATCH V2 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add a new api DebugVPrint
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Friday, March 15, 2019 1:18 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V2 11/17] IntelFspPkg/BaseFspDebugLibSerialPort: Add a new
> api DebugVPrint
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add a new api DebugVPrint implementation in the DebugLib instance. This api
> would expose a print routine with VaList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 42
> +++---
> 1 file changed, 37 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..57b6020a58 100644
> --- a/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFspPkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -62,9 +62,38 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +
> +/**
> + Prints a debug message to the debug output device if the specified error
> level
> is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + IN UINTNErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +117,7 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker);
>
>//
>// Send the print string to a Serial Port @@ -98,6 +125,7 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +
> /**
>Convert an UINT32 value into HEX string sepcified by Buffer.
>
> @@ -118,6 +146,7 @@ FillHex (
>}
> }
>
> +
> /**
>Prints an assert message containing a filename, line number, and
> description.
>This may be followed by a breakpoint or a dead loop.
> @@ -172,6 +201,7 @@ DebugAssertInternal (
>CpuDeadLoop ();
> }
>
> +
> /**
>Prints an assert message containing a filename, line number, and
> description.
>This may be followed by a breakpoint or a dead loop.
> @@ -270,6 +300,7 @@ DebugPrintEnabled (
>return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) &
> DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0); }
>
> +
> /**
>Returns TRUE if DEBUG_CODE() macros are enabled.
>
> @@ -309,6 +340,7 @@ DebugClearMemoryEnabled (
>return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) &
> DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0); }
>
> +
> /**
>Returns TRUE if any one of the bit is set both in ErrorLevel and
> PcdFixedDebugPrintErrorLevel.
>
> --
> 2.16.2.windows.1
___
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Re: [edk2] [PATCH V2 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add a new api DebugVPrint
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Gao, Zhichao
> Sent: Friday, March 15, 2019 1:18 PM
> To: edk2-devel@lists.01.org
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; Gao,
> Liming ; Sean Brogan ;
> Michael Turner ; Bret Barkelew
>
> Subject: [PATCH V2 10/17] IntelFsp2Pkg/BaseFspDebugLibSerialPort: Add a new
> api DebugVPrint
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1395
>
> Add a new api DebugVPrint implementation in the DebugLib instance. This api
> would expose a print routine with VaList parameter.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Zhichao Gao
> Cc: Chasel Chiu
> Cc: Nate DeSimone
> Cc: Star Zeng
> Cc: Liming Gao
> Cc: Sean Brogan
> Cc: Michael Turner
> Cc: Bret Barkelew
> ---
> .../Library/BaseFspDebugLibSerialPort/DebugLib.c | 42
> +++---
> 1 file changed, 37 insertions(+), 5 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> index 73bb08e357..57b6020a58 100644
> --- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> +++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -62,9 +62,38 @@ DebugPrint (
>IN CONST CHAR8 *Format,
>...
>)
> +{
> + VA_LIST Marker;
> +
> + VA_START (Marker, Format);
> + DebugVPrint (ErrorLevel, Format, Marker);
> + VA_END (Marker);
> +}
> +
> +
> +/**
> + Prints a debug message to the debug output device if the specified error
> level
> is enabled.
> +
> + If any bit in ErrorLevel is also set in DebugPrintErrorLevelLib
> + function GetDebugPrintErrorLevel (), then print the message specified
> + by Format and the associated variable argument list to the debug output
> device.
> +
> + If Format is NULL, then ASSERT().
> +
> + @param ErrorLevelThe error level of the debug message.
> + @param FormatFormat string for the debug message to print.
> + @param VaListMarker VA_LIST marker for the variable argument list.
> +
> +**/
> +VOID
> +EFIAPI
> +DebugVPrint (
> + IN UINTNErrorLevel,
> + IN CONST CHAR8 *Format,
> + IN VA_LIST VaListMarker
> + )
> {
>CHAR8Buffer[MAX_DEBUG_MESSAGE_LENGTH];
> - VA_LIST Marker;
>
>//
>// If Format is NULL, then ASSERT().
> @@ -88,9 +117,7 @@ DebugPrint (
>//
>// Convert the DEBUG() message to an ASCII String
>//
> - VA_START (Marker, Format);
> - AsciiVSPrint (Buffer, sizeof (Buffer), Format, Marker);
> - VA_END (Marker);
> + AsciiVSPrint (Buffer, sizeof (Buffer), Format, VaListMarker);
>
>//
>// Send the print string to a Serial Port @@ -98,6 +125,7 @@ DebugPrint (
>SerialPortWrite ((UINT8 *)Buffer, AsciiStrLen (Buffer)); }
>
> +
> /**
>Convert an UINT32 value into HEX string sepcified by Buffer.
>
> @@ -118,6 +146,7 @@ FillHex (
>}
> }
>
> +
> /**
>Prints an assert message containing a filename, line number, and
> description.
>This may be followed by a breakpoint or a dead loop.
> @@ -172,6 +201,7 @@ DebugAssertInternal (
>CpuDeadLoop ();
> }
>
> +
> /**
>Prints an assert message containing a filename, line number, and
> description.
>This may be followed by a breakpoint or a dead loop.
> @@ -270,6 +300,7 @@ DebugPrintEnabled (
>return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) &
> DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0); }
>
> +
> /**
>Returns TRUE if DEBUG_CODE() macros are enabled.
>
> @@ -309,6 +340,7 @@ DebugClearMemoryEnabled (
>return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) &
> DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0); }
>
> +
> /**
>Returns TRUE if any one of the bit is set both in ErrorLevel and
> PcdFixedDebugPrintErrorLevel.
>
> --
> 2.16.2.windows.1
___
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Re: [edk2] [PATCH 2/3] MdeModulePkg/PeiMain: Support EFI_PEI_CORE_FV_LOCATION_PPI
> -Original Message-
> From: Ni, Ray
> Sent: Thursday, February 14, 2019 4:20 PM
> To: Chiu, Chasel ; edk2-devel@lists.01.org
> Cc: Wang, Jian J ; Wu, Hao A ;
> Zeng, Star ; Gao, Liming
> Subject: RE: [PATCH 2/3] MdeModulePkg/PeiMain: Support
> EFI_PEI_CORE_FV_LOCATION_PPI
>
> Sorry, please ignore my other review mail and just check this mail.
> 3 minor comments below.
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Tuesday, February 12, 2019 9:20 PM
> > To: edk2-devel@lists.01.org
> > Cc: Wang, Jian J ; Wu, Hao A
> > ; Ni, Ray ; Zeng, Star
> > ; Gao, Liming ; Chiu,
> > Chasel
> > Subject: [PATCH 2/3] MdeModulePkg/PeiMain: Support
> > EFI_PEI_CORE_FV_LOCATION_PPI
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1524
> >
> > When shadowing PeiCore the EFI_PEI_CORE_FV_LOCATION_PPI should be
> > checked to see if PeiCore not in BFV, otherwise just shadowing PeiCore
> > from BFV.
> >
> > Test: Verified on internal platform and booting successfully.
> >
> > Cc: Jian J Wang
> > Cc: Hao Wu
> > Cc: Ray Ni
> > Cc: Star Zeng
> > Cc: Liming Gao
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Chasel Chiu
> > ---
> > MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 58
> > +-
> > MdeModulePkg/Core/Pei/PeiMain.h | 3 ++-
> > MdeModulePkg/Core/Pei/PeiMain.inf | 3 ++-
> > 3 files changed, 49 insertions(+), 15 deletions(-)
> >
> > diff --git a/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > b/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > index 4da80a8222..408f24c216 100644
> > --- a/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > +++ b/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > @@ -1,7 +1,7 @@
> > /** @file
> >Pei Core Main Entry Point
> >
> > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > +reserved.
> > This program and the accompanying materials are licensed and made
> > available under the terms and conditions of the BSD License which
> > accompanies this distribution. The full text of the license may be
> > found at @@ -80,23 +80,55 @@ ShadowPeiCore (
> >IN PEI_CORE_INSTANCE *PrivateData
> >)
> > {
> > - EFI_PEI_FILE_HANDLE PeiCoreFileHandle;
> > - EFI_PHYSICAL_ADDRESS EntryPoint;
> > - EFI_STATUS Status;
> > - UINT32 AuthenticationState;
> > + EFI_PEI_FILE_HANDLE PeiCoreFileHandle;
> > + EFI_PHYSICAL_ADDRESS EntryPoint;
> > + EFI_STATUS Status;
> > + UINT32 AuthenticationState;
> > + UINTNIndex;
> > + EFI_PEI_CORE_FV_LOCATION_PPI *PeiCoreFvLocationPpi;
> >
> >PeiCoreFileHandle = NULL;
> >
> >//
> > - // Find the PEI Core in the BFV
> > + // Find the PEI Core either from EFI_PEI_CORE_FV_LOCATION_PPI
> > + indicated FV or BFV
> >//
> > - Status = PrivateData->Fv[0].FvPpi->FindFileByType (
> > - PrivateData->Fv[0].FvPpi,
> > - EFI_FV_FILETYPE_PEI_CORE,
> > - PrivateData->Fv[0].FvHandle,
> > -
> > - );
> > - ASSERT_EFI_ERROR (Status);
> > + Status = PeiServicesLocatePpi (
> > + ,
> > + 0,
> > + NULL,
> > + (VOID **)
> > + );
> > + if (!EFI_ERROR (Status) && (PeiCoreFvLocationPpi->PeiCoreFvLocation
> > + !=
> > NULL)) {
> > +//
> > +// If PeiCoreFvLocation present, the PEI Core should be found
> > + from
> > indicated FV.
> > +//
> > +for (Index = 0; Index < PrivateData->FvCount; Index ++) {
> > + if ((UINT32) PrivateData->Fv[Index].FvHandle != (UINT32)
> > PeiCoreFvLocationPpi->PeiCoreFvLocation) {
> > +continue;
> > + }
> > + Status = PrivateData->Fv[Index].FvPpi->FindFileByType (
> > +
> > PrivateData->Fv[Index].FvPpi,
> > + EFI_FV_FILETYPE_PEI_CORE,
> > +
> > PrivateData->Fv[Index].FvHandle,
> > +
Re: [edk2] [PATCH v2 3/3] UefiCpuPkg/SecCore: Support EFI_PEI_CORE_FV_LOCATION_PPI
> -Original Message-
> From: Ni, Ray
> Sent: Thursday, February 14, 2019 4:25 PM
> To: Chiu, Chasel ; edk2-devel@lists.01.org
> Cc: Dong, Eric ; Laszlo Ersek
> Subject: RE: [PATCH v2 3/3] UefiCpuPkg/SecCore: Support
> EFI_PEI_CORE_FV_LOCATION_PPI
>
>
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Wednesday, February 13, 2019 5:47 PM
> > To: edk2-devel@lists.01.org
> > Cc: Dong, Eric ; Ni, Ray ;
> > Laszlo Ersek ; Chiu, Chasel
> > Subject: [PATCH v2 3/3] UefiCpuPkg/SecCore: Support
> > EFI_PEI_CORE_FV_LOCATION_PPI
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1524
> >
> > EFI_PEI_CORE_FV_LOCATION_PPI may be passed by platform when PeiCore
> > not in BFV so SecCore has to search PeiCore either from the FV
> > location provided by EFI_PEI_CORE_FV_LOCATION_PPI or from BFV.
> >
> > Test: Verified on internal platform and booting successfully.
> >
> > Cc: Eric Dong
> > Cc: Ray Ni
> > Cc: Laszlo Ersek
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Chasel Chiu
> > ---
> > UefiCpuPkg/SecCore/SecMain.c | 35
> > +--
> > UefiCpuPkg/SecCore/SecCore.inf | 3 ++-
> > UefiCpuPkg/SecCore/SecMain.h | 3 ++-
> > 3 files changed, 33 insertions(+), 8 deletions(-)
> >
> > diff --git a/UefiCpuPkg/SecCore/SecMain.c
> > b/UefiCpuPkg/SecCore/SecMain.c index b24e190617..b99072599d 100644
> > --- a/UefiCpuPkg/SecCore/SecMain.c
> > +++ b/UefiCpuPkg/SecCore/SecMain.c
> > @@ -1,7 +1,7 @@
> > /** @file
> >C functions in SEC
> >
> > - Copyright (c) 2008 - 2018, Intel Corporation. All rights
> > reserved.
> > + Copyright (c) 2008 - 2019, Intel Corporation. All rights
> > + reserved.
> >This program and the accompanying materials
> >are licensed and made available under the terms and conditions of
> > the BSD License
> >which accompanies this distribution. The full text of the license
> > may be found at @@ -228,26 +228,49 @@ SecStartupPhase2( {
> >EFI_SEC_PEI_HAND_OFF*SecCoreData;
> >EFI_PEI_PPI_DESCRIPTOR *PpiList;
> > + EFI_PEI_PPI_DESCRIPTOR *PpiListTmp;
>
>
> 1. Maybe this local variable is not needed. We can use PpiList[Index].
Agree! I will correct this.
>
> >UINT32 Index;
> >EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;
> >EFI_PEI_CORE_ENTRY_POINTPeiCoreEntryPoint;
> >
> > + PeiCoreEntryPoint = NULL;
> >SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;
> >AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData-
> > >PeiTemporaryRamBase;
> > +
> >//
> >// Find Pei Core entry point. It will report SEC and Pei Core debug
> > information if remote debug
> >// is enabled.
> >//
> > - FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *)
> > SecCoreData->BootFirmwareVolumeBase, );
> > - if (PeiCoreEntryPoint == NULL)
> > - {
> > -CpuDeadLoop ();
> > + PpiList = SecPlatformMain (SecCoreData); PpiListTmp = PpiList;
> > + for
> > + (;;) {
>
> 2. Similar comments as above. Maybe we can just use PpiList[Index] in the
> loop.
> By the way, original code logic checks PpiList against NULL.
> Do we still need to make sure to deference PpiList after checking against
> NULL?
Good catch! I will update.
>
> > +if (CompareGuid (PpiListTmp->Guid, )
> > + &&
> > (((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiListTmp->Ppi)-
> > >PeiCoreFvLocation != 0)) {
> > + FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *)
> > ((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiListTmp->Ppi)->PeiCoreFvLocation,
> > );
> > + if (PeiCoreEntryPoint != NULL) {
> > +break;
>
> 3. Is it valid that PeiCore cannot be found in the PeiCoreFvLocation?
> If no, can we just dead-loop here when PeiCoreEntryPoint is NULL?
Yes. I will add dead-loop.
>
> > + }
> > +}
> > +if ((PpiListTmp->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)
> > + ==
> > EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) {
> > + //
> > + // Continue until the end of the PPI List.
> > + //
> > + break;
> > +}
> > +PpiListTmp++;
> > + }
> > + //
> > + // If EFI_PEI_CORE_FV_LOCATION_PPI not found or no PeiCore found by
> > the pointer in provided PPI, try to locate PeiCore from BFV.
> > + //
> > + if (PeiCoreEntryPoint == NULL) {
> &g
Re: [edk2] [Patch edk2 Wiki] Add three features for edk2-stable201903
Reviewed-by: Chasel Chiu > -Original Message- > From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of > Liming Gao > Sent: Wednesday, February 13, 2019 12:24 PM > To: edk2-devel@lists.01.org > Subject: [edk2] [Patch edk2 Wiki] Add three features for edk2-stable201903 > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Liming Gao > --- > EDK-II-Release-Planning.md | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/EDK-II-Release-Planning.md b/EDK-II-Release-Planning.md index > f302be3..095da69 100644 > --- a/EDK-II-Release-Planning.md > +++ b/EDK-II-Release-Planning.md > @@ -24,7 +24,9 @@ > * [Remove PcdPeiCoreMaxXXX > PCDs](https://bugzilla.tianocore.org/show_bug.cgi?id=1405) > * [Remove unused tool logic in BaseTools > C\Python](https://bugzilla.tianocore.org/show_bug.cgi?id=1350) > * [BaseTools: Enable component override > functionality](https://bugzilla.tianocore.org/show_bug.cgi?id=1449) > -* [SMM CET support](https://bugzilla.tianocore.org/show_bug.cgi?id=1521) > +* [Support PI1.7 > +EFI_PEI_CORE_FV_LOCATION_PPI](https://bugzilla.tianocore.org/show_bug. > c > +gi?id=1524) > +* [Remove unused tool chain configuration in > +tools_def.template](https://bugzilla.tianocore.org/show_bug.cgi?id=1377 > +) > +* [BaseTools supports to the driver > +combination](https://bugzilla.tianocore.org/show_bug.cgi?id=1520) > * Standalone MM build of authenticated variable stack (bugzilla link TBD) > * TBD Bugzilla List > > -- > 2.13.0.windows.1 > > ___ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH 2/3] MdeModulePkg/PeiMain: Support EFI_PEI_CORE_FV_LOCATION_PPI
No issue, I will remove UINT32 casting. Thanks!
> -Original Message-
> From: Wang, Jian J
> Sent: Wednesday, February 13, 2019 9:14 AM
> To: Chiu, Chasel ; edk2-devel@lists.01.org
> Cc: Wu, Hao A ; Ni, Ray ; Zeng, Star
> ; Gao, Liming
> Subject: RE: [PATCH 2/3] MdeModulePkg/PeiMain: Support
> EFI_PEI_CORE_FV_LOCATION_PPI
>
> Chasel,
>
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Tuesday, February 12, 2019 9:20 PM
> > To: edk2-devel@lists.01.org
> > Cc: Wang, Jian J ; Wu, Hao A
> > ; Ni, Ray ; Zeng, Star
> > ; Gao, Liming ; Chiu,
> > Chasel
> > Subject: [PATCH 2/3] MdeModulePkg/PeiMain: Support
> > EFI_PEI_CORE_FV_LOCATION_PPI
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1524
> >
> > When shadowing PeiCore the EFI_PEI_CORE_FV_LOCATION_PPI should be
> > checked to see if PeiCore not in BFV, otherwise just shadowing PeiCore
> > from BFV.
> >
> > Test: Verified on internal platform and booting successfully.
> >
> > Cc: Jian J Wang
> > Cc: Hao Wu
> > Cc: Ray Ni
> > Cc: Star Zeng
> > Cc: Liming Gao
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Chasel Chiu
> > ---
> > MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 58
> > +-
> > MdeModulePkg/Core/Pei/PeiMain.h | 3 ++-
> > MdeModulePkg/Core/Pei/PeiMain.inf | 3 ++-
> > 3 files changed, 49 insertions(+), 15 deletions(-)
> >
> > diff --git a/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > b/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > index 4da80a8222..408f24c216 100644
> > --- a/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > +++ b/MdeModulePkg/Core/Pei/PeiMain/PeiMain.c
> > @@ -1,7 +1,7 @@
> > /** @file
> >Pei Core Main Entry Point
> >
> > -Copyright (c) 2006 - 2018, Intel Corporation. All rights
> > reserved.
> > +Copyright (c) 2006 - 2019, Intel Corporation. All rights
> > +reserved.
> > This program and the accompanying materials are licensed and made
> > available under the terms and conditions of the BSD License which
> > accompanies this distribution. The full text of the license may be
> > found at @@ -80,23 +80,55 @@ ShadowPeiCore (
> >IN PEI_CORE_INSTANCE *PrivateData
> >)
> > {
> > - EFI_PEI_FILE_HANDLE PeiCoreFileHandle;
> > - EFI_PHYSICAL_ADDRESS EntryPoint;
> > - EFI_STATUS Status;
> > - UINT32 AuthenticationState;
> > + EFI_PEI_FILE_HANDLE PeiCoreFileHandle;
> > + EFI_PHYSICAL_ADDRESS EntryPoint;
> > + EFI_STATUS Status;
> > + UINT32 AuthenticationState;
> > + UINTNIndex;
> > + EFI_PEI_CORE_FV_LOCATION_PPI *PeiCoreFvLocationPpi;
> >
> >PeiCoreFileHandle = NULL;
> >
> >//
> > - // Find the PEI Core in the BFV
> > + // Find the PEI Core either from EFI_PEI_CORE_FV_LOCATION_PPI
> > + indicated
> > FV or BFV
> >//
> > - Status = PrivateData->Fv[0].FvPpi->FindFileByType (
> > - PrivateData->Fv[0].FvPpi,
> > - EFI_FV_FILETYPE_PEI_CORE,
> > - PrivateData->Fv[0].FvHandle,
> > -
> > - );
> > - ASSERT_EFI_ERROR (Status);
> > + Status = PeiServicesLocatePpi (
> > + ,
> > + 0,
> > + NULL,
> > + (VOID **)
> > + );
> > + if (!EFI_ERROR (Status) && (PeiCoreFvLocationPpi->PeiCoreFvLocation
> > + !=
> > NULL)) {
> > +//
> > +// If PeiCoreFvLocation present, the PEI Core should be found
> > + from indicated
> > FV.
> > +//
> > +for (Index = 0; Index < PrivateData->FvCount; Index ++) {
> > + if ((UINT32) PrivateData->Fv[Index].FvHandle != (UINT32)
> > PeiCoreFvLocationPpi->PeiCoreFvLocation) {
>
> I think the UINT32 type cast is not necessary. FvHandle and PeiCoreFvLocation
> are actually type of VOID*. Do you encounter any compiler error here?
>
> Regards,
> Jian
>
> > +continue;
> > + }
> > + Status = PrivateData->Fv[Index].FvPpi->FindFileByType (
> > +
> > PrivateData->Fv[Index].FvPpi,
> > +
Re: [edk2] [edk2-platforms/devel-MinPlatform][PATCH v3 1/1] ReadMe.md: Update Minimum Platform details
Reviewed-by: Chasel Chiu > -Original Message- > From: Desimone, Nathaniel L > Sent: Wednesday, February 6, 2019 1:34 AM > To: Kubacki, Michael A ; > edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Sinha, Ankit > ; Chiu, Chasel ; Oram, Isaac W > ; Gao, Liming > Subject: Re: [edk2-platforms/devel-MinPlatform][PATCH v3 1/1] ReadMe.md: > Update Minimum Platform details > > Reviewed-by: Nate DeSimone > > On 2/4/19, 5:57 PM, "Kubacki, Michael A" > wrote: > > Adds details on the EDK II Minimum Platform design for Intel > platforms. > > * Overview of Minimum Platform > * Board package purpose and conventions > * Stage boot concept and control > * Minimum Platform firmware solution stack overview > * Updates build instructions for all OpenBoardPkgs > * Adds information for the ClevoOpenBoardPkg > * Adds planned activities and ideas for the future > > Cc: Michael D Kinney > Cc: Nate DeSimone > Cc: Ankit Sinha > Cc: Chasel Chiu > Cc: Isaac W Oram > Cc: Liming Gao > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki > --- > ReadMe.md | 164 > ++ > 1 file changed, 132 insertions(+), 32 deletions(-) > > diff --git a/ReadMe.md b/ReadMe.md > index 9b873da2e3..72e332a476 100644 > --- a/ReadMe.md > +++ b/ReadMe.md > @@ -1,8 +1,73 @@ > -# **EDK II Minimized firmware for Intel(R) platforms** > +# **EDK II Minimum Platform Firmware for Intel(R) Platforms** > > -## Features > -* The Minimized Kabylake provides the minimal feature of the Kabylake > BIOS. > -* The Minimized Purley provides the minimal feature of the Purley BIOS. > +The Minimum Platform is a software architecture that guides uniform > delivery of Intel platforms enabling firmware > +solutions for basic boot functionality with extensibility built-in. > + > +Package maintainers for the Minimum Platform projects are listed in > Maintainers.txt. > + > +## Overview > +The key elements of the architecture are organized into a staged boot > approach where each stage has requirements and > +functionality for specific use cases. The generic control flow through > the > boot process is implemented in the > > +[`MinPlatformPkg`](https://github.com/tianocore/edk2-platforms/tree/devel > -MinPlatform/Platform/Intel/MinPlatformPkg). > +The generic nature of the tasks performed in MinPlatformPkg lends to > reuse > across all Intel platforms with no > +source modification. Details for any particular board are made > accessible to > the MinPlatformPkg through a well-defined > +statically linked board API. A complete platform solution then consists > of the > MinPlatformPkg and a compatible board > +package. > + > +## Board Naming Convention > +The board packages supported by Intel follow the naming convention > \OpenBoardPkg where xxx refers to the > +encompassing platform name for a particular platform generation. For > example, the > [`KabylakeOpenBoardPkg`](https://github.com/tianocore/edk2-platforms/tree > /devel-MinPlatform/Platform/Intel/KabylakeOpenBoardPkg) contains the > +board code for Intel Kaby Lake reference systems. Intel uses the moniker > "OpenBoardPkg" to indicate that this package > +is the open source board code. A closed source counterpart may exist > which > simply uses "BoardPkg". Both directly use > +the MinPlatformPkg from edk2-platforms. > + > +## Stage Selection > +Stage selection is controlled via the PCD > `gMinPlatformPkgTokenSpaceGuid.PcdBootStage` in > [`MinPlatformPkg.dec`](https://github.com/tianocore/edk2-platforms/blob/d > evel-MinPlatform/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec). > +The stage should be configured in the board package DSC file to the > appropriate value. For example, a board may disable > +all advanced features by setting this value to 4 instead of 6. This may > be used > to improve boot time for a particular > +use case. Decrementing the stage can also be used for debug since only > the > actions required for that stage objective > +should be executed. As an example, ACPI initialization is not required > for a > Stage 3 boot. > + > +The stages are defined as follows: > + > +| Stage | Functional Objective | Example Capabilities > | > +| > ---|--|---
Re: [edk2] [PATCH v1 1/1] Maintainers.txt: Update MinPlatformPkg maintainers
Reviewed-by: Chasel Chiu > -Original Message- > From: Yao, Jiewen > Sent: Wednesday, January 23, 2019 6:16 AM > To: Kubacki, Michael A ; > edk2-devel@lists.01.org > Cc: Wu, Hao A ; Gao, Liming ; > Chiu, Chasel ; Kinney, Michael D > > Subject: RE: [PATCH v1 1/1] Maintainers.txt: Update MinPlatformPkg > maintainers > > Reviewed-by: jiewen@intel.com > > > -Original Message- > > From: Kubacki, Michael A > > Sent: Wednesday, January 23, 2019 3:31 AM > > To: edk2-devel@lists.01.org > > Cc: Wu, Hao A ; Gao, Liming > > ; Chiu, Chasel ; Yao, > > Jiewen ; Kinney, Michael D > > > > Subject: [PATCH v1 1/1] Maintainers.txt: Update MinPlatformPkg > > maintainers > > > > Cc: Hao Wu > > Cc: Liming Gao > > Cc: Chasel Chiu > > Cc: Jiewen Yao > > Cc: Michael D Kinney > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Michael Kubacki > > --- > > Platform/Intel/Maintainers.txt | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/Platform/Intel/Maintainers.txt > > b/Platform/Intel/Maintainers.txt index b2c51259b8..7b27459fcf 100644 > > --- a/Platform/Intel/Maintainers.txt > > +++ b/Platform/Intel/Maintainers.txt > > @@ -39,11 +39,11 @@ EDK II Packages: > > > > KabylakeOpenBoardPkg > > M: Chasel Chiu > > -M: Michael A Kubacki > > +M: Michael Kubacki > > > > MinPlatformPkg > > -M: Michael A Kubacki > > -M: Jiewen Yao > > +M: Michael Kubacki > > +R: Chasel Chiu > > > > PurleyOpenBoardPkg > > M: Shifei A Lu > > -- > > 2.16.2.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] UefiCpuPkg/MtrrLib: Fix a bug that may wrongly set memory <1MB to UC
Reviewed-by: Chasel Chiu
> -Original Message-
> From: Ni, Ray
> Sent: Monday, January 21, 2019 11:17 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ray ; Dong, Eric ; Chiu, Chasel
>
> Subject: [PATCH] UefiCpuPkg/MtrrLib: Fix a bug that may wrongly set memory
> <1MB to UC
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1481
>
> Today's MtrrLib contains a bug, for example:
> when the original cache setting is WB for [0xF_, 0xF_8000) and, a new
> request to set [0xF_, 0xF_4000) to WP, the cache setting for [0xF_4000,
> 0xF_8000) is reset to UC.
>
> The reason is when MtrrLibSetBelow1MBMemoryAttribute() is called the
> WorkingFixedSettings doesn't contain the actual MSR value stored in hardware,
> but when writing the fixed MTRRs, the code logic assumes WorkingFixedSettings
> contains the actual MSR value.
>
> The new fix is to change MtrrLibSetBelow1MBMemoryAttribute() to calculate
> the correct ClearMasks[] and OrMasks[], and use them directly when writing the
> fixed MTRRs.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ray Ni
> Cc: Eric Dong
> Cc: Chasel Chiu
> ---
> UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 59 +---
> 1 file changed, 18 insertions(+), 41 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
> b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
> index 086f7ad8f0..2cf7d092e8 100644
> --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
> +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
> @@ -5,7 +5,7 @@
> Most of services in this library instance are suggested to be invoked by
> BSP
> only,
> except for MtrrSetAllMtrrs() which is used to sync BSP's MTRR setting to
> APs.
>
> - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
> + Copyright (c) 2008 - 2019, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of the BSD
> License
>which accompanies this distribution. The full text of the license may be
> found
> at @@ -2099,8 +2099,8 @@ MtrrLibSetMemoryRanges (
>Set the below-1MB memory attribute to fixed MTRR buffer.
>Modified flag array indicates which fixed MTRR is modified.
>
> - @param [in, out] FixedSettings Fixed MTRR buffer.
> - @param [out] Modified Flag array indicating which MTRR is
> modified.
> + @param [in, out] ClearMasksThe bits to clear in the fixed MTRR MSR.
> + @param [in, out] OrMasks The bits to set in the fixed MTRR MSR.
>@param [in] BaseAddress Base address.
>@param [in] LengthLength.
>@param [in] Type Memory type.
> @@ -2111,8 +2111,8 @@ MtrrLibSetMemoryRanges ( **/ RETURN_STATUS
> MtrrLibSetBelow1MBMemoryAttribute (
> - IN OUT MTRR_FIXED_SETTINGS *FixedSettings,
> - OUT BOOLEAN*Modified,
> + IN OUT UINT64 *ClearMasks,
> + IN OUT UINT64 *OrMasks,
>IN PHYSICAL_ADDRESSBaseAddress,
>IN UINT64 Length,
>IN MTRR_MEMORY_CACHE_TYPE Type
> @@ -2122,36 +2122,17 @@ MtrrLibSetBelow1MBMemoryAttribute (
>UINT32MsrIndex;
>UINT64ClearMask;
>UINT64OrMask;
> - UINT64ClearMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
> - UINT64OrMasks[ARRAY_SIZE (mMtrrLibFixedMtrrTable)];
> - BOOLEAN LocalModified[ARRAY_SIZE
> (mMtrrLibFixedMtrrTable)];
>
>ASSERT (BaseAddress < BASE_1MB);
>
> - SetMem (LocalModified, sizeof (LocalModified), FALSE);
> -
> - //
> - // (Value & ~0 | 0) still equals to (Value)
> - //
> - SetMem (ClearMasks, sizeof (ClearMasks), 0);
> - SetMem (OrMasks, sizeof (OrMasks), 0);
> -
>MsrIndex = (UINT32)-1;
>while ((BaseAddress < BASE_1MB) && (Length != 0)) {
> Status = MtrrLibProgramFixedMtrr (Type, , ,
> , , );
> if (RETURN_ERROR (Status)) {
>return Status;
> }
> -ClearMasks[MsrIndex]= ClearMask;
> -OrMasks[MsrIndex] = OrMask;
> -Modified[MsrIndex] = TRUE;
> -LocalModified[MsrIndex] = TRUE;
> - }
> -
> - for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mMtrrLibFixedMtrrTable);
> MsrIndex++) {
> -if (LocalModified[MsrIndex]) {
> - FixedSettings->Mtrr[MsrIndex] = (FixedSettings->Mtrr[MsrIndex] &
> ~ClearMasks[MsrIndex]) | OrMasks[MsrIndex];
> -}
> +ClearMasks[MsrIndex] = ClearMasks[MsrIndex] | ClearMask;
> +OrMasks[MsrIndex]= (OrMasks[MsrIndex] & ~ClearMask) | OrMask;
>}
&g
Re: [edk2] [PATCH] MinPlatformPkg: Support TCO base locked by FSP
Good point! I will send another patch for this.
Thanks!
Chasel
> -Original Message-
> From: Kubacki, Michael A
> Sent: Tuesday, January 15, 2019 4:12 PM
> To: Chiu, Chasel ; edk2-devel@lists.01.org
> Cc: Desimone, Nathaniel L ; Zeng, Star
>
> Subject: RE: [PATCH] MinPlatformPkg: Support TCO base locked by FSP
>
> According to the function description, PchTcoBaseSet ( ) should ensure the
> following steps are done before returning success:
> 1. set Smbus PCI offset 54h [8] to enable TCO base address.
> 2. program Smbus PCI offset 50h [15:5] to TCO base address.
> 3. set Smbus PCI offset 54h [8] to enable TCO base address.
> 4. program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1] to [Smbus PCI offset
> 50h[15:5], 1].
>
> Currently the patch updates PchTcoBaseSet ( ) to return EFI_SUCCESS if it
> finds
> the TCOCTL lock is already set, however, it doesn't test the other conditions
> are
> met. This is different from returning EFI_SUCCESS if the lock is not already
> set.
> The lock could have erroneously been set by HW/SW and this would return that
> the PCH TCO base address was successfully set when it may not be.
>
> What about adding a PchTcoIsLocked () that checks if the lock is set and the
> caller
> not call PchTcoBaseSet () if PchTcoIsLocked () returns true? Then
> PchTcoBaseSet
> () can continue to return an error if it cannot update the base address.
>
> Regards,
> Michael
>
> > -Original Message-
> > From: Chiu, Chasel
> > Sent: Monday, January 14, 2019 8:15 PM
> > To: edk2-devel@lists.01.org
> > Cc: Desimone, Nathaniel L ; Zeng, Star
> > ; Kubacki, Michael A
> >
> > Subject: RE: [PATCH] MinPlatformPkg: Support TCO base locked by FSP
> >
> >
> > + Michael to review this too.
> >
> > Thanks!
> > Chasel
> >
> >
> > > -Original Message-
> > > From: Chiu, Chasel
> > > Sent: Tuesday, January 15, 2019 12:07 PM
> > > To: edk2-devel@lists.01.org
> > > Cc: Desimone, Nathaniel L ; Zeng,
> > > Star ; Chiu, Chasel
> > > Subject: [PATCH] MinPlatformPkg: Support TCO base locked by FSP
> > >
> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1457
> > >
> > > Per security recommendation TCO Base should be initialized and
> > > locked by FSP and MinPlatform should support both TCO Base locked
> > > and not locked
> > scenarios.
> > >
> > > Cc: Nate DeSimone
> > > Cc: Star Zeng
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Chasel Chiu
> > > ---
> > >
> > > Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodi
> > > ng Lib /PchCycleDecodingLib.c | 17 +
> > > 1 file changed, 9 insertions(+), 8 deletions(-)
> > >
> > > diff --git
> > > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDeco
> > > di
> > > ngLi
> > > b/PchCycleDecodingLib.c
> > > b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDeco
> > > di
> > > ngL
> > > ib/PchCycleDecodingLib.c
> > > index 68b0b5dd4b..e135ef1f3e 100644
> > > ---
> > > a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDeco
> > > di
> > > ngLi
> > > b/PchCycleDecodingLib.c
> > > +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycle
> > > +++ De
> > > +++ co
> > > +++ dingLib/PchCycleDecodingLib.c
> > > @@ -1,7 +1,7 @@
> > > /** @file
> > >PCH cycle deocding configuration and query library.
> > >
> > > -Copyright (c) 2017, Intel Corporation. All rights reserved.
> > > +Copyright (c) 2017 - 2019, Intel Corporation. All rights
> > > +reserved.
> > > This program and the accompanying materials are licensed and made
> > > available under the terms and conditions of the BSD License that
> > > accompanies this distribution.
> > > The full text of the license may be found at @@ -352,17 +352,18 @@
> > > PchTcoBaseSet (
> > >}
> > >//
> > >// Verify TCO base is not locked.
> > > + // If it is locked already, skip following steps.
> > >//
> > >if ((MmioRead8 (SmbusBase + R_PCH_SMBUS_TCOCTL) &
> > > B_PCH_SMBUS_TCOCTL_TCO_BASE_LOCK) != 0) {
> > > -ASSERT (FALSE);
> > > -return EFI_DEVICE_ERROR;
> > > +return EFI_SUCCESS;
> > >}
> > >//
> > >
Re: [edk2] [PATCH] MinPlatformPkg: Support TCO base locked by FSP
+ Michael to review this too.
Thanks!
Chasel
> -Original Message-
> From: Chiu, Chasel
> Sent: Tuesday, January 15, 2019 12:07 PM
> To: edk2-devel@lists.01.org
> Cc: Desimone, Nathaniel L ; Zeng, Star
> ; Chiu, Chasel
> Subject: [PATCH] MinPlatformPkg: Support TCO base locked by FSP
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1457
>
> Per security recommendation TCO Base should be initialized and locked by FSP
> and MinPlatform should support both TCO Base locked and not locked scenarios.
>
> Cc: Nate DeSimone
> Cc: Star Zeng
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu
> ---
>
> Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib
> /PchCycleDecodingLib.c | 17 +
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLi
> b/PchCycleDecodingLib.c
> b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingL
> ib/PchCycleDecodingLib.c
> index 68b0b5dd4b..e135ef1f3e 100644
> ---
> a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLi
> b/PchCycleDecodingLib.c
> +++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDeco
> +++ dingLib/PchCycleDecodingLib.c
> @@ -1,7 +1,7 @@
> /** @file
>PCH cycle deocding configuration and query library.
>
> -Copyright (c) 2017, Intel Corporation. All rights reserved.
> +Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
> This program and the accompanying materials are licensed and made available
> under the terms and conditions of the BSD License that accompanies this
> distribution.
> The full text of the license may be found at @@ -352,17 +352,18 @@
> PchTcoBaseSet (
>}
>//
>// Verify TCO base is not locked.
> + // If it is locked already, skip following steps.
>//
>if ((MmioRead8 (SmbusBase + R_PCH_SMBUS_TCOCTL) &
> B_PCH_SMBUS_TCOCTL_TCO_BASE_LOCK) != 0) {
> -ASSERT (FALSE);
> -return EFI_DEVICE_ERROR;
> +return EFI_SUCCESS;
>}
>//
>// Disable TCO in SMBUS Device first before changing base address.
> + // Byte access to not touch the TCO_BASE_LOCK bit
>//
> - MmioAnd16 (
> -SmbusBase + R_PCH_SMBUS_TCOCTL,
> -(UINT16) ~B_PCH_SMBUS_TCOCTL_TCO_BASE_EN
> + MmioAnd8 (
> +SmbusBase + R_PCH_SMBUS_TCOCTL + 1,
> +(UINT8) ~(B_PCH_SMBUS_TCOCTL_TCO_BASE_EN >> 8)
> );
>//
>// Program TCO in SMBUS Device
> @@ -373,11 +374,11 @@ PchTcoBaseSet (
> Address
> );
>//
> - // Enable TCO in SMBUS Device
> + // Enable TCO in SMBUS Device and lock TCO BASE
>//
>MmioOr16 (
> SmbusBase + R_PCH_SMBUS_TCOCTL,
> -B_PCH_SMBUS_TCOCTL_TCO_BASE_EN
> +B_PCH_SMBUS_TCOCTL_TCO_BASE_EN |
> B_PCH_SMBUS_TCOCTL_TCO_BASE_LOCK
> );
>//
>// Program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1] to [SMBUS PCI
> offset 50h[15:5], 1].
> --
> 2.13.3.windows.1
___
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edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH V2 3/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxFvSupported
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Tuesday, December 18, 2018 2:08 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH V2 3/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxFvSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update PeiCore to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxFvSupported in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
Reviewed-by: Chasel Chiu
Reviewed-by: Jian J Wang
---
MdeModulePkg/Core/Pei/FwVol/FwVol.c | 67 ++---
MdeModulePkg/Core/Pei/PeiMain.h | 15 +++-
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 16
4 files changed, 75 insertions(+), 24 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
index 5629c9a1ce20..0a67b96bf1e3 100644
--- a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
+++ b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
@@ -503,6 +503,10 @@ PeiInitializeFv (
);
ASSERT_EFI_ERROR (Status);
+ PrivateData->Fv = AllocateZeroPool (sizeof (PEI_CORE_FV_HANDLE) *
+ FV_GROWTH_STEP); ASSERT (PrivateData->Fv != NULL);
+ PrivateData->MaxFvCount = FV_GROWTH_STEP;
+
//
// Update internal PEI_CORE_FV array.
//
@@ -560,6 +564,7 @@ FirmwareVolmeInfoPpiNotifyCallback (
VOID *DepexData;
BOOLEAN IsFvInfo2;
UINTN CurFvCount;
+ VOID *TempPtr;
Status = EFI_SUCCESS;
PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices); @@ -626,10
+631,21 @@ FirmwareVolmeInfoPpiNotifyCallback (
}
}
-if (PrivateData->FvCount >= PcdGet32 (PcdPeiCoreMaxFvSupported)) {
- DEBUG ((EFI_D_ERROR, "The number of Fv Images (%d) exceed the max
supported FVs (%d) in Pei", PrivateData->FvCount + 1, PcdGet32
(PcdPeiCoreMaxFvSupported)));
- DEBUG ((EFI_D_ERROR, "PcdPeiCoreMaxFvSupported value need be
reconfigurated in DSC"));
- ASSERT (FALSE);
+if (PrivateData->FvCount >= PrivateData->MaxFvCount) {
+ //
+ // Run out of room, grow the buffer.
+ //
+ TempPtr = AllocateZeroPool (
+ sizeof (PEI_CORE_FV_HANDLE) * (PrivateData->MaxFvCount +
FV_GROWTH_STEP)
+ );
+ ASSERT (TempPtr != NULL);
+ CopyMem (
+TempPtr,
+PrivateData->Fv,
+sizeof (PEI_CORE_FV_HANDLE) * PrivateData->MaxFvCount
+);
+ PrivateData->Fv = TempPtr;
+ PrivateData->MaxFvCount = PrivateData->MaxFvCount +
+ FV_GROWTH_STEP;
}
//
@@ -2157,7 +2173,6 @@ FindNextCoreFvHandle (
}
}
- ASSERT (Private->FvCount <= PcdGet32 (PcdPeiCoreMaxFvSupported));
if (Instance >= Private->FvCount) {
return NULL;
}
@@ -2205,7 +2220,7 @@ PeiReinitializeFv (
//
// Fixup all FvPpi pointers for the implementation in flash to permanent
memory.
//
- for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
+ for (Index = 0; Index < PrivateData->FvCount; Index ++) {
if (PrivateData->Fv[Index].FvPpi == OldFfsFvPpi) {
PrivateData->Fv[Index].FvPpi =
}
@@ -2233,7 +2248,7 @@ PeiReinitializeFv (
//
// Fixup all FvPpi pointers for the implementation in flash to permanent
memory.
//
- for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
+ for (Index = 0; Index < PrivateData->FvCount; Index ++) {
if (PrivateData->Fv[Index].FvPpi == OldFfsFvPpi) {
PrivateData->Fv[Index].FvPpi =
}
@@ -2263,9 +2278,23 @@ AddUnknownFormatFvInfo (
)
{
PEI_CORE_UNKNOW_FORMAT_FV_INFO*NewUnknownFv;
+ VOID *TempPtr;
- if (PrivateData->UnknownFvInfoCount + 1 >= PcdGet32
(PcdPeiCoreMaxFvSupported)) {
-return EFI_OUT_OF_RESOURCES;
+ if (PrivateData->UnknownFvInfoCount >= PrivateData->MaxUnknownFvInfoCount) {
+//
+// Run out of room, grow the buffer.
+//
+TempPtr = AllocateZ
Re: [edk2] [PATCH V2 4/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPpiSupported
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Tuesday, December 18, 2018 2:08 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH V2 4/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxPpiSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update code to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxPpiSupported in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
Reviewed-by: Chasel Chiu
---
MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c | 8 +-
MdeModulePkg/Core/Pei/PeiMain.h | 59 +++--
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 30 ++-
MdeModulePkg/Core/Pei/Ppi/Ppi.c | 355 ++
5 files changed, 254 insertions(+), 199 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
index 9692e2f6bf51..68670f43e0b3 100644
--- a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
+++ b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
@@ -1036,7 +1036,7 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
- ProcessNotifyList (Private);
+ ProcessDispatchNotifyList (Private);
}
}
}
@@ -1183,10 +1183,10 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
-ProcessNotifyList (Private);
+ProcessDispatchNotifyList (Private);
//
-// Recheck SwitchStackSignal after ProcessNotifyList()
+// Recheck SwitchStackSignal after
+ ProcessDispatchNotifyList()
// in case PeiInstallPeiMemory() is done in a callback with
// EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH.
//
@@ -1227,7 +1227,7 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
- ProcessNotifyList (Private);
+ ProcessDispatchNotifyList (Private);
}
}
}
diff --git a/MdeModulePkg/Core/Pei/PeiMain.h b/MdeModulePkg/Core/Pei/PeiMain.h
index b103215d81f7..322e7cd84524 100644
--- a/MdeModulePkg/Core/Pei/PeiMain.h
+++ b/MdeModulePkg/Core/Pei/PeiMain.h
@@ -66,37 +66,60 @@ typedef union {
} PEI_PPI_LIST_POINTERS;
///
-/// PPI database structure which contains two link: PpiList and NotifyList.
PpiList -/// is in head of PpiListPtrs array and notify is in end of
PpiListPtrs.
+/// Number of PEI_PPI_LIST_POINTERS to grow by each time we run out of
+room
///
+#define PPI_GROWTH_STEP 64
+#define CALLBACK_NOTIFY_GROWTH_STEP 32
+#define DISPATCH_NOTIFY_GROWTH_STEP 8
+
typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
+ UINTN LastDispatchedCount;
///
- /// index of end of PpiList link list.
+ /// MaxCount number of entries.
///
- INTNPpiListEnd;
+ PEI_PPI_LIST_POINTERS *PpiPtrs;
+} PEI_PPI_LIST;
+
+typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
///
- /// index of end of notify link list.
+ /// MaxCount number of entries.
///
- INTNNotifyListEnd;
+ PEI_PPI_LIST_POINTERS *NotifyPtrs;
+} PEI_CALLBACK_NOTIFY_LIST;
+
+typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
+ UINTN LastDispatchedCount;
///
- /// index of the dispatched notify list.
+ /// MaxCount number of entries.
///
- INTNDispatchListEnd;
+ PEI_PPI_LIST_POINTERS *NotifyPtrs;
+} PEI_DISPATCH_NOTIFY_LIST;
+
+///
+/// PPI database structure which contains three links:
+/// PpiList, CallbackNotifyList and DispatchNotifyList.
+///
+typedef struct {
///
- /// index of last installed Ppi description in PpiList link list.
+ /// PPI List.
///
- INTNLastDispatchedInstall;
+ PEI_PPI_LIST PpiList;
///
- /// index of last dispatched notify in Notify link
Re: [edk2] [PATCH V2 7/7] MdeModulePkg: Remove PcdPeiCoreMaxXXX PCDs
Reviewed-by: Chasel Chiu -Original Message- From: Zeng, Star Sent: Tuesday, December 18, 2018 2:08 PM To: edk2-devel@lists.01.org Cc: Zeng, Star ; Wang, Jian J ; Wu, Hao A ; Gao, Liming ; Ni, Ruiyu ; Kinney, Michael D ; Desimone, Nathaniel L ; Chiu, Chasel Subject: [PATCH V2 7/7] MdeModulePkg: Remove PcdPeiCoreMaxXXX PCDs REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405 The codes have been updated to not use PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported. The patch removes them in MdeModulePkg.dec. Cc: Jian J Wang Cc: Hao Wu Cc: Liming Gao Cc: Ruiyu Ni Cc: Michael D Kinney Cc: Nate DeSimone Cc: Chasel Chiu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng Reviewed-by: Chasel Chiu --- MdeModulePkg/MdeModulePkg.dec | 13 - MdeModulePkg/MdeModulePkg.uni | 12 2 files changed, 25 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 0abacc1a901f..5585ce603596 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1053,23 +1053,10 @@ [PcdsFixedAtBuild, PcdsPatchableInModule] # @Prompt VPD base address. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010 - ## Maximum number of FV is supported by PeiCore's dispatching. - # @Prompt Maximum number of FV supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6|UINT32|0x00010030 - - ## Maximum File count in every FV is supported by PeiCore's dispatching. - # PeiCore supported File type includes PEIM, Combined PEIM and FV. - # @Prompt Maximum File count per FV supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32|UINT32|0x00010031 - ## Maximum stack size for PeiCore. # @Prompt Maximum stack size for PeiCore. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x2|UINT32|0x00010032 - ## Maximum PPI count is supported by PeiCore's PPI database. - # @Prompt Maximum PPI count supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported|64|UINT32|0x00010033 - ## The maximum size of a single non-HwErr type variable. # @Prompt Maximum variable size. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x400|UINT32|0x3003 diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni index 038e8485054b..fbea62dac8da 100644 --- a/MdeModulePkg/MdeModulePkg.uni +++ b/MdeModulePkg/MdeModulePkg.uni @@ -69,22 +69,10 @@ #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdVpdBaseAddress_HELP #language en-US "VPD type PCD allows a developer to point to an absolute physical address PCDVPDBASEADDRESS to store PCD value." -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxFvSupported_PROMPT #language en-US "Maximum number of FV supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxFvSupported_HELP #language en-US "Maximum number of FV is supported by PeiCore's dispatching." - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeimPerFv_PROMPT #language en-US "Maximum File count per FV supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeimPerFv_HELP #language en-US "Maximum File count in every FV is supported by PeiCore's dispatching. PeiCore supported File type includes PEIM, Combined PEIM and FV." - #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeiStackSize_PROMPT #language en-US "Maximum stack size for PeiCore" #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeiStackSize_HELP #language en-US "Maximum stack size for PeiCore." -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPpiSupported_PROMPT #language en-US "Maximum PPI count supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPpiSupported_HELP #language en-US "Maximum PPI count is supported by PeiCore's PPI database." - #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMaxVariableSize_PROMPT #language en-US "Maximum variable size" #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMaxVariableSize_HELP #language en-US "The maximum size of a single non-HwErr type variable." -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH V2 1/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPeimPerFv
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Tuesday, December 18, 2018 2:08 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH V2 1/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxPeimPerFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update code to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxPeimPerFv in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c | 173 +++---
MdeModulePkg/Core/Pei/PeiMain.h | 22 ++--
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 48 ---
4 files changed, 136 insertions(+), 108 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
index f6bb35a5fe8d..9692e2f6bf51 100644
--- a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
+++ b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
@@ -41,7 +41,7 @@ DiscoverPeimsAndOrderWithApriori (
UINTN PeimCount;
EFI_GUID*Guid;
EFI_PEI_FILE_HANDLE *TempFileHandles;
- EFI_GUID*FileGuid;
+ EFI_GUID*TempFileGuid;
EFI_PEI_FIRMWARE_VOLUME_PPI *FvPpi;
EFI_FV_FILE_INFOFileInfo;
@@ -51,38 +51,81 @@ DiscoverPeimsAndOrderWithApriori (
// Walk the FV and find all the PEIMs and the Apriori file.
//
AprioriFileHandle = NULL;
- Private->CurrentFvFileHandles[0] = NULL;
+ Private->CurrentFvFileHandles = NULL;
Guid = NULL;
- FileHandle = NULL;
- TempFileHandles = Private->FileHandles;
- FileGuid= Private->FileGuid;
//
- // If the current Fv has been scanned, directly get its cachable record.
+ // If the current Fv has been scanned, directly get its cached records.
//
- if (Private->Fv[Private->CurrentPeimFvCount].ScanFv) {
-CopyMem (Private->CurrentFvFileHandles,
Private->Fv[Private->CurrentPeimFvCount].FvFileHandles, sizeof
(EFI_PEI_FILE_HANDLE) * PcdGet32 (PcdPeiCoreMaxPeimPerFv));
+ if (CoreFileHandle->ScanFv) {
+Private->CurrentFvFileHandles = CoreFileHandle->FvFileHandles;
return;
}
+ TempFileHandles = Private->TempFileHandles;
+ TempFileGuid= Private->TempFileGuid;
+
//
- // Go ahead to scan this Fv, and cache FileHandles within it.
+ // Go ahead to scan this Fv, get PeimCount and cache FileHandles within it
to TempFileHandles.
//
- Status = EFI_NOT_FOUND;
- for (PeimCount = 0; PeimCount <= PcdGet32 (PcdPeiCoreMaxPeimPerFv);
PeimCount++) {
+ PeimCount = 0;
+ FileHandle = NULL;
+ do {
Status = FvPpi->FindFileByType (FvPpi,
PEI_CORE_INTERNAL_FFS_FILE_DISPATCH_TYPE, CoreFileHandle->FvHandle,
);
-if (Status != EFI_SUCCESS || PeimCount == PcdGet32
(PcdPeiCoreMaxPeimPerFv)) {
- break;
+if (!EFI_ERROR (Status)) {
+ if (PeimCount >= Private->TempPeimCount) {
+//
+// Run out of room, grow the buffer.
+//
+TempFileHandles = AllocatePool (
+sizeof (EFI_PEI_FILE_HANDLE) *
(Private->TempPeimCount + TEMP_FILE_GROWTH_STEP));
+ASSERT (TempFileHandles != NULL);
+CopyMem (
+ TempFileHandles,
+ Private->TempFileHandles,
+ sizeof (EFI_PEI_FILE_HANDLE) * Private->TempPeimCount
+ );
+Private->TempFileHandles = TempFileHandles;
+TempFileGuid = AllocatePool (
+ sizeof (EFI_GUID) * (Private->TempPeimCount +
TEMP_FILE_GROWTH_STEP));
+ASSERT (TempFileGuid != NULL);
+CopyMem (
+ TempFileGuid,
+ Private->TempFileGuid,
+ sizeof (EFI_GUID) * Private->TempPeimCount
+ );
+Private->TempFileGuid = TempFileGuid;
+Private->TempPeimCount = Private->TempPeimCount +
TEMP_FILE_GROWTH_STEP;
+ }
+
+ TempFileHandles[PeimCount++] = FileHandle;
}
+ } while (!EFI_ERROR (Status));
+
+ DEBUG ((
+DEBUG_INFO,
+"%a(): Found 0x%x PEI FFS
Re: [edk2] [PATCH 1/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPeimPerFv
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Friday, December 14, 2018 6:29 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH 1/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxPeimPerFv
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update code to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxPeimPerFv in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c | 199 --
MdeModulePkg/Core/Pei/PeiMain.h | 17 ++-
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 48 +++
4 files changed, 157 insertions(+), 108 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
index f6bb35a5fe8d..71440bab9488 100644
--- a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
+++ b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
@@ -41,7 +41,8 @@ DiscoverPeimsAndOrderWithApriori (
UINTN PeimCount;
EFI_GUID*Guid;
EFI_PEI_FILE_HANDLE *TempFileHandles;
- EFI_GUID*FileGuid;
+ EFI_GUID*TempFileGuid;
+ UINTN TempPeimCount;
EFI_PEI_FIRMWARE_VOLUME_PPI *FvPpi;
EFI_FV_FILE_INFOFileInfo;
@@ -51,38 +52,106 @@ DiscoverPeimsAndOrderWithApriori (
// Walk the FV and find all the PEIMs and the Apriori file.
//
AprioriFileHandle = NULL;
- Private->CurrentFvFileHandles[0] = NULL;
+ Private->CurrentFvFileHandles = NULL;
Guid = NULL;
- FileHandle = NULL;
- TempFileHandles = Private->FileHandles;
- FileGuid= Private->FileGuid;
//
- // If the current Fv has been scanned, directly get its cachable record.
+ // If the current Fv has been scanned, directly get its cached records.
//
- if (Private->Fv[Private->CurrentPeimFvCount].ScanFv) {
-CopyMem (Private->CurrentFvFileHandles,
Private->Fv[Private->CurrentPeimFvCount].FvFileHandles, sizeof
(EFI_PEI_FILE_HANDLE) * PcdGet32 (PcdPeiCoreMaxPeimPerFv));
+ if (CoreFileHandle->ScanFv) {
+Private->CurrentFvFileHandles = CoreFileHandle->FvFileHandles;
return;
}
+ if (Private->TempPeimCount == 0) {
+//
+// Initialize the temp buffers.
+//
+Private->TempPeimCount = 32;
+Private->TempFileHandles = AllocatePool (sizeof (EFI_PEI_FILE_HANDLE) *
32);
+ASSERT (Private->TempFileHandles != NULL);
+Private->TempFileGuid= AllocatePool (sizeof (EFI_GUID) * 32);
+ASSERT (Private->TempFileGuid != NULL); } TempFileHandles =
+ Private->TempFileHandles;
+ TempFileGuid= Private->TempFileGuid;
+
//
- // Go ahead to scan this Fv, and cache FileHandles within it.
+ // Go ahead to scan this Fv, get PeimCount and cache FileHandles within it
to TempFileHandles.
//
- Status = EFI_NOT_FOUND;
- for (PeimCount = 0; PeimCount <= PcdGet32 (PcdPeiCoreMaxPeimPerFv);
PeimCount++) {
+ PeimCount = 0;
+ FileHandle = NULL;
+ TempPeimCount = 0;
+ do {
Status = FvPpi->FindFileByType (FvPpi,
PEI_CORE_INTERNAL_FFS_FILE_DISPATCH_TYPE, CoreFileHandle->FvHandle,
);
-if (Status != EFI_SUCCESS || PeimCount == PcdGet32
(PcdPeiCoreMaxPeimPerFv)) {
- break;
+if (!EFI_ERROR (Status)) {
+ if (TempPeimCount < Private->TempPeimCount) {
+TempFileHandles[TempPeimCount] = FileHandle;
+TempPeimCount++;
+ }
+ PeimCount++;
}
+ } while (!EFI_ERROR (Status));
-Private->CurrentFvFileHandles[PeimCount] = FileHandle;
+ DEBUG ((
+DEBUG_INFO,
+"%a(): Found 0x%x PEI FFS files in the %dth FV\n",
+__FUNCTION__,
+PeimCount,
+Private->CurrentPeimFvCount
+));
+
+ if (PeimCount == 0) {
+//
+// No PEIM FFS file is found, set ScanFv flag and return.
+//
+CoreFileHandle->ScanFv = TRUE;
+return;
+ }
+
+ if (PeimCount > Private->TempPeimCount) {
+//
+// The temp buffers are too small, allocat
Re: [edk2] [PATCH 3/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxFvSupported
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Friday, December 14, 2018 6:29 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH 3/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxFvSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update PeiCore to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxFvSupported in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdeModulePkg/Core/Pei/FwVol/FwVol.c | 67 ++---
MdeModulePkg/Core/Pei/PeiMain.h | 15 +++-
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 16
4 files changed, 75 insertions(+), 24 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
index 5629c9a1ce20..0a67b96bf1e3 100644
--- a/MdeModulePkg/Core/Pei/FwVol/FwVol.c
+++ b/MdeModulePkg/Core/Pei/FwVol/FwVol.c
@@ -503,6 +503,10 @@ PeiInitializeFv (
);
ASSERT_EFI_ERROR (Status);
+ PrivateData->Fv = AllocateZeroPool (sizeof (PEI_CORE_FV_HANDLE) *
+ FV_GROWTH_STEP); ASSERT (PrivateData->Fv != NULL);
+ PrivateData->MaxFvCount = FV_GROWTH_STEP;
+
//
// Update internal PEI_CORE_FV array.
//
@@ -560,6 +564,7 @@ FirmwareVolmeInfoPpiNotifyCallback (
VOID *DepexData;
BOOLEAN IsFvInfo2;
UINTN CurFvCount;
+ VOID *TempPtr;
Status = EFI_SUCCESS;
PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices); @@ -626,10
+631,21 @@ FirmwareVolmeInfoPpiNotifyCallback (
}
}
-if (PrivateData->FvCount >= PcdGet32 (PcdPeiCoreMaxFvSupported)) {
- DEBUG ((EFI_D_ERROR, "The number of Fv Images (%d) exceed the max
supported FVs (%d) in Pei", PrivateData->FvCount + 1, PcdGet32
(PcdPeiCoreMaxFvSupported)));
- DEBUG ((EFI_D_ERROR, "PcdPeiCoreMaxFvSupported value need be
reconfigurated in DSC"));
- ASSERT (FALSE);
+if (PrivateData->FvCount >= PrivateData->MaxFvCount) {
+ //
+ // Run out of room, grow the buffer.
+ //
+ TempPtr = AllocateZeroPool (
+ sizeof (PEI_CORE_FV_HANDLE) * (PrivateData->MaxFvCount +
FV_GROWTH_STEP)
+ );
+ ASSERT (TempPtr != NULL);
+ CopyMem (
+TempPtr,
+PrivateData->Fv,
+sizeof (PEI_CORE_FV_HANDLE) * PrivateData->MaxFvCount
+);
+ PrivateData->Fv = TempPtr;
+ PrivateData->MaxFvCount = PrivateData->MaxFvCount +
+ FV_GROWTH_STEP;
}
//
@@ -2157,7 +2173,6 @@ FindNextCoreFvHandle (
}
}
- ASSERT (Private->FvCount <= PcdGet32 (PcdPeiCoreMaxFvSupported));
if (Instance >= Private->FvCount) {
return NULL;
}
@@ -2205,7 +2220,7 @@ PeiReinitializeFv (
//
// Fixup all FvPpi pointers for the implementation in flash to permanent
memory.
//
- for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
+ for (Index = 0; Index < PrivateData->FvCount; Index ++) {
if (PrivateData->Fv[Index].FvPpi == OldFfsFvPpi) {
PrivateData->Fv[Index].FvPpi =
}
@@ -2233,7 +2248,7 @@ PeiReinitializeFv (
//
// Fixup all FvPpi pointers for the implementation in flash to permanent
memory.
//
- for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
+ for (Index = 0; Index < PrivateData->FvCount; Index ++) {
if (PrivateData->Fv[Index].FvPpi == OldFfsFvPpi) {
PrivateData->Fv[Index].FvPpi =
}
@@ -2263,9 +2278,23 @@ AddUnknownFormatFvInfo (
)
{
PEI_CORE_UNKNOW_FORMAT_FV_INFO*NewUnknownFv;
+ VOID *TempPtr;
- if (PrivateData->UnknownFvInfoCount + 1 >= PcdGet32
(PcdPeiCoreMaxFvSupported)) {
-return EFI_OUT_OF_RESOURCES;
+ if (PrivateData->UnknownFvInfoCount >= PrivateData->MaxUnknownFvInfoCount) {
+//
+// Run out of room, grow the buffer.
+//
+TempPtr = AllocateZeroPool (
+sizeof (PEI_CORE_UNKNOW
Re: [edk2] [PATCH 4/7] MdeModulePkg PeiCore: Remove the using of PcdPeiCoreMaxPpiSupported
Reviewed-by: Chasel Chiu
-Original Message-
From: Zeng, Star
Sent: Friday, December 14, 2018 6:29 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Wang, Jian J ; Wu,
Hao A ; Gao, Liming ; Ni, Ruiyu
; Kinney, Michael D ; Desimone,
Nathaniel L ; Chiu, Chasel
Subject: [PATCH 4/7] MdeModulePkg PeiCore: Remove the using of
PcdPeiCoreMaxPpiSupported
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405
Background as below.
Problem:
As static configuration from the PCDs, the binary PeiCore (for example in FSP
binary with dispatch mode) could not predict how many FVs, Files or PPIs for
different platforms.
Burden:
Platform developers need configure the PCDs accordingly for different platforms.
To solve the problem and remove the burden, we can update code to remove the
using of PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and
PcdPeiCoreMaxPpiSupported by extending buffer dynamically for FV, File and PPI
management.
This patch removes the using of PcdPeiCoreMaxPpiSupported in PeiCore.
Cc: Jian J Wang
Cc: Hao Wu
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Chasel Chiu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng
---
MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c | 8 +-
MdeModulePkg/Core/Pei/PeiMain.h | 59 +++--
MdeModulePkg/Core/Pei/PeiMain.inf | 1 -
MdeModulePkg/Core/Pei/PeiMain/PeiMain.c | 30 ++-
MdeModulePkg/Core/Pei/Ppi/Ppi.c | 355 ++
5 files changed, 254 insertions(+), 199 deletions(-)
diff --git a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
index 71440bab9488..55a300adbdb8 100644
--- a/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
+++ b/MdeModulePkg/Core/Pei/Dispatcher/Dispatcher.c
@@ -1062,7 +1062,7 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
- ProcessNotifyList (Private);
+ ProcessDispatchNotifyList (Private);
}
}
}
@@ -1209,10 +1209,10 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
-ProcessNotifyList (Private);
+ProcessDispatchNotifyList (Private);
//
-// Recheck SwitchStackSignal after ProcessNotifyList()
+// Recheck SwitchStackSignal after
+ ProcessDispatchNotifyList()
// in case PeiInstallPeiMemory() is done in a callback with
// EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH.
//
@@ -1253,7 +1253,7 @@ PeiDispatcher (
// Process the Notify list and dispatch any notifies for
// newly installed PPIs.
//
- ProcessNotifyList (Private);
+ ProcessDispatchNotifyList (Private);
}
}
}
diff --git a/MdeModulePkg/Core/Pei/PeiMain.h b/MdeModulePkg/Core/Pei/PeiMain.h
index b248118087ad..c6c932c3e233 100644
--- a/MdeModulePkg/Core/Pei/PeiMain.h
+++ b/MdeModulePkg/Core/Pei/PeiMain.h
@@ -66,37 +66,60 @@ typedef union {
} PEI_PPI_LIST_POINTERS;
///
-/// PPI database structure which contains two link: PpiList and NotifyList.
PpiList -/// is in head of PpiListPtrs array and notify is in end of
PpiListPtrs.
+/// Number of PEI_PPI_LIST_POINTERS to grow by each time we run out of
+room
///
+#define PPI_GROWTH_STEP 64
+#define CALLBACK_NOTIFY_GROWTH_STEP 32
+#define DISPATCH_NOTIFY_GROWTH_STEP 8
+
typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
+ UINTN LastDispatchedCount;
///
- /// index of end of PpiList link list.
+ /// MaxCount number of entries.
///
- INTNPpiListEnd;
+ PEI_PPI_LIST_POINTERS *PpiPtrs;
+} PEI_PPI_LIST;
+
+typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
///
- /// index of end of notify link list.
+ /// MaxCount number of entries.
///
- INTNNotifyListEnd;
+ PEI_PPI_LIST_POINTERS *NotifyPtrs;
+} PEI_CALLBACK_NOTIFY_LIST;
+
+typedef struct {
+ UINTN CurrentCount;
+ UINTN MaxCount;
+ UINTN LastDispatchedCount;
///
- /// index of the dispatched notify list.
+ /// MaxCount number of entries.
///
- INTNDispatchListEnd;
+ PEI_PPI_LIST_POINTERS *NotifyPtrs;
+} PEI_DISPATCH_NOTIFY_LIST;
+
+///
+/// PPI database structure which contains three links:
+/// PpiList, CallbackNotifyList and DispatchNotifyList.
+///
+typedef struct {
///
- /// index of last installed Ppi description in PpiList link list.
+ /// PPI List.
///
- INTNLastDispatchedInstall;
+ PEI_PPI_LIST PpiList;
///
- /// index of last dispatched notify in Notify link list.
+ /// Notify List
Re: [edk2] [PATCH 7/7] MdeModulePkg: Remove PcdPeiCoreMaxXXX PCDs
Reviewed-by: Chasel Chiu -Original Message- From: Zeng, Star Sent: Friday, December 14, 2018 6:29 PM To: edk2-devel@lists.01.org Cc: Zeng, Star ; Wang, Jian J ; Wu, Hao A ; Gao, Liming ; Ni, Ruiyu ; Kinney, Michael D ; Desimone, Nathaniel L ; Chiu, Chasel Subject: [PATCH 7/7] MdeModulePkg: Remove PcdPeiCoreMaxXXX PCDs REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405 The codes have been updated to not use PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported. The patch removes them in MdeModulePkg.dec. Cc: Jian J Wang Cc: Hao Wu Cc: Liming Gao Cc: Ruiyu Ni Cc: Michael D Kinney Cc: Nate DeSimone Cc: Chasel Chiu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- MdeModulePkg/MdeModulePkg.dec | 13 - MdeModulePkg/MdeModulePkg.uni | 12 2 files changed, 25 deletions(-) diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 0abacc1a901f..5585ce603596 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1053,23 +1053,10 @@ [PcdsFixedAtBuild, PcdsPatchableInModule] # @Prompt VPD base address. gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0|UINT32|0x00010010 - ## Maximum number of FV is supported by PeiCore's dispatching. - # @Prompt Maximum number of FV supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6|UINT32|0x00010030 - - ## Maximum File count in every FV is supported by PeiCore's dispatching. - # PeiCore supported File type includes PEIM, Combined PEIM and FV. - # @Prompt Maximum File count per FV supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32|UINT32|0x00010031 - ## Maximum stack size for PeiCore. # @Prompt Maximum stack size for PeiCore. gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x2|UINT32|0x00010032 - ## Maximum PPI count is supported by PeiCore's PPI database. - # @Prompt Maximum PPI count supported by PeiCore. - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported|64|UINT32|0x00010033 - ## The maximum size of a single non-HwErr type variable. # @Prompt Maximum variable size. gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x400|UINT32|0x3003 diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni index 038e8485054b..fbea62dac8da 100644 --- a/MdeModulePkg/MdeModulePkg.uni +++ b/MdeModulePkg/MdeModulePkg.uni @@ -69,22 +69,10 @@ #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdVpdBaseAddress_HELP #language en-US "VPD type PCD allows a developer to point to an absolute physical address PCDVPDBASEADDRESS to store PCD value." -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxFvSupported_PROMPT #language en-US "Maximum number of FV supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxFvSupported_HELP #language en-US "Maximum number of FV is supported by PeiCore's dispatching." - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeimPerFv_PROMPT #language en-US "Maximum File count per FV supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeimPerFv_HELP #language en-US "Maximum File count in every FV is supported by PeiCore's dispatching. PeiCore supported File type includes PEIM, Combined PEIM and FV." - #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeiStackSize_PROMPT #language en-US "Maximum stack size for PeiCore" #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPeiStackSize_HELP #language en-US "Maximum stack size for PeiCore." -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPpiSupported_PROMPT #language en-US "Maximum PPI count supported by PeiCore" - -#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdPeiCoreMaxPpiSupported_HELP #language en-US "Maximum PPI count is supported by PeiCore's PPI database." - #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMaxVariableSize_PROMPT #language en-US "Maximum variable size" #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdMaxVariableSize_HELP #language en-US "The maximum size of a single non-HwErr type variable." -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [edk2-platforms PATCH 1/2] KabylakeOpenBoardPkg: Remove PcdPeiCoreMaxXXX PCDs' statement
Reviewed-by: Chasel Chiu -Original Message- From: Zeng, Star Sent: Friday, December 14, 2018 6:43 PM To: edk2-devel@lists.01.org Cc: Zeng, Star ; Chiu, Chasel ; Kubacki, Michael A Subject: [edk2-platforms PATCH 1/2] KabylakeOpenBoardPkg: Remove PcdPeiCoreMaxXXX PCDs' statement REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405 The codes have been updated to not use PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported, so their statement in platform DSC could be removed. Cc: Chasel Chiu Cc: Michael A Kubacki Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- .../Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc| 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc index 92b9ad8bcf60..35f383ecef33 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d +++ sc @@ -1,7 +1,7 @@ ## @file # Platform description. # -# Copyright (c) 2017, Intel Corporation. All rights reserved. +# Copyright (c) 2017 - 2018, Intel Corporation. All rights +reserved. # # This program and the accompanying materials are licensed and made available under # the terms and conditions of the BSD License which accompanies this distribution. @@ -62,14 +62,9 @@ [PcdsFixedAtBuild.common] gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000 gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x0800 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400 - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|30 - - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|60 - gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported|128 gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1 !if $(TARGET) == RELEASE gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0 -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] IntelFsp2WrapperPkg: Support FSP Dispatch mode
Hi Jiewen,
No special reason in this patch. I'm verifying the change for switching to "if"
instead of "#if", and will re-send a new patch later.
Thanks!
Chasel
-Original Message-
From: Yao, Jiewen
Sent: Tuesday, November 6, 2018 7:38 PM
To: Chiu, Chasel
Cc: edk2-devel@lists.01.org; Desimone, Nathaniel L
Subject: Re: [PATCH] IntelFsp2WrapperPkg: Support FSP Dispatch mode
hi chasel
I think our guide is not to use #if, but use if()
Is there any special reason in this patch?
thank you!
Yao, Jiewen
> 在 2018年11月6日，下午5:22，Chiu, Chasel 写道：
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300
>
> Provides PCD selection for FSP Wrapper to support Dispatch mode. Also
> PcdFspmBaseAddress should support Dynamic for recovery scenario
> (multiple FSP-M binary in flash)
>
> Test: Verified on internal platform and both API and
> DISPATCH modes booted successfully.
>
> Cc: Jiewen Yao
> Cc: Desimone Nathaniel L
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 16 ++--
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14 --
> IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 ++-
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 ++-
> IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13 +++--
> 5 files changed, 41 insertions(+), 8 deletions(-)
>
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> index 7b7c5f5d86..8128a26873 100644
> --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
> @@ -3,7 +3,7 @@
> register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> notify to call FspSiliconInit API.
>
> - Copyright (c) 2014 - 2017, Intel Corporation. All rights
> reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights
> + reserved.
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license
> may be found at @@ -65,7 +65,7 @@ PeiFspMemoryInit (
> FspHobListPtr = NULL;
> FspmUpdDataPtr = NULL;
>
> - FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32
> (PcdFspmBaseAddress));
> + FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32
> + (PcdFspmBaseAddress));
> DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));
> if (FspmHeaderPtr == NULL) {
> return EFI_DEVICE_ERROR;
> @@ -155,8 +155,20 @@ FspmWrapperInit ( {
> EFI_STATUS Status;
>
> + Status = EFI_SUCCESS;
> +
> +#if FixedPcdGet8 (PcdFspModeSelection) == 1
> Status = PeiFspMemoryInit ();
> ASSERT_EFI_ERROR (Status);
> +#else
> + PeiServicesInstallFvInfoPpi (
> +NULL,
> +(VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),
> +(UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32
> (PcdFspmBaseAddress))->FvLength,
> +NULL,
> +NULL
> +);
> +#endif
>
> return Status;
> }
> diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> index 70dac7a414..d11655df89 100644
> --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> @@ -3,7 +3,7 @@
> register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> notify to call FspSiliconInit API.
>
> - Copyright (c) 2014 - 2017, Intel Corporation. All rights
> reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights
> + reserved.
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license
> may be found at @@ -349,7 +349,17 @@ FspsWrapperPeimEntryPoint ( {
> DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
>
> - FspsWrapperInit ();
> +#if FixedPcdGet8 (PcdFspModeSelection) == 1
> +FspsWrapperInit ();
> +#else
> +PeiServicesInstallFvInfoPpi (
> + NULL,
> + (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress),
> + (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32
> (PcdFspsBaseAddress))->FvLength,
> + NULL,
> + NULL
> + );
> +#endif
>
> return EFI_SUCCESS;
> }
> diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim
Re: [edk2] [PATCH] IntelFsp2Pkg: Fixed potentially NULL pointer accessing
Yes. We can do that. I will send patch V2 soon.
Thanks!
Chasel
-Original Message-
From: Yao, Jiewen
Sent: Friday, October 26, 2018 10:24 PM
To: Chiu, Chasel ; edk2-devel@lists.01.org
Subject: RE: [edk2] [PATCH] IntelFsp2Pkg: Fixed potentially NULL pointer
accessing
Hi Chasel
Can we change " if ((IdtDescriptor.Base == 0) && (IdtDescriptor.Limit ==
0x)) {" to " if (IdtDescriptor.Base == 0) {" ?
That can simplify the logic.
Thank you
Yao Jiewen
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Chasel, Chiu
> Sent: Friday, October 26, 2018 3:25 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen
> Subject: [edk2] [PATCH] IntelFsp2Pkg: Fixed potentially NULL pointer
> accessing
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1280
>
> When copying IDT table in SecMain, the pointer might be NULL so added
> the check to fix it.
>
> Test: Verified on internal platform and boots successfully.
>
> Cc: Jiewen Yao
> Cc: Desimone Nathaniel L
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/FspSecCore/SecMain.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
> b/IntelFsp2Pkg/FspSecCore/SecMain.c
> index f319c68cc5..aed8893ff0 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
> @@ -113,8 +113,14 @@ SecStartup (
>// ERROR: IDT table size from boot loader is larger than FSP
> can support, DeadLoop here!
>//
>CpuDeadLoop();
> +} else if (IdtDescriptor.Base == 0) {
> + //
> + // ERROR: IDT table Base should not be zero, DeadLoop here!
> + //
> + CpuDeadLoop();
> +} else {
> + CopyMem ((VOID *) (UINTN) , (VOID *)
> IdtDescriptor.Base, IdtSize);
> }
> -CopyMem ((VOID *) (UINTN) , (VOID *)
> IdtDescriptor.Base, IdtSize);
>}
>IdtDescriptor.Base = (UINTN)
>IdtDescriptor.Limit = (UINT16)(IdtSize - 1);
> --
> 2.13.3.windows.1
>
> ___
> edk2-devel mailing list
> edk2-devel@lists.01.org
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Re: [edk2] [PATCH v2] IntelFsp2Pkg: FSP should not override IDT
Hello,
Please see my reply below inline.
Thanks!
Chasel
-Original Message-
From: af...@apple.com [mailto:af...@apple.com]
Sent: Tuesday, October 23, 2018 6:29 PM
To: Chiu, Chasel
Cc: edk2-devel@lists.01.org; Yao, Jiewen
Subject: Re: [edk2] [PATCH v2] IntelFsp2Pkg: FSP should not override IDT
> On Oct 23, 2018, at 2:33 AM, Chasel, Chiu wrote:
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1265
>
> FSP should not override IDT table when it is initialized by boot
> loader. IDT should be re-initialized in FSP only when it is invalid.
> To mitigate temporary memory usage a PCD PcdFspMaxInterruptSupported
> created for platform to decide how many interrupts the FSP IDT table
> can support.
>
> Test: Verified on internal platform and boots successfully.
>
> Cc: Jiewen Yao
> Cc: Desimone Nathaniel L
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 1 +
> IntelFsp2Pkg/FspSecCore/SecMain.c | 24 +++-
> IntelFsp2Pkg/FspSecCore/SecMain.h | 6 ++
> IntelFsp2Pkg/IntelFsp2Pkg.dec | 4
> 4 files changed, 26 insertions(+), 9 deletions(-)
>
> diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index c61af10b8a..dafe6f5993 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -62,6 +62,7 @@
> gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
> gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
> gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES
> + gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported ## CONSUMES
>
> [Ppis]
> gEfiTemporaryRamSupportPpiGuid ## PRODUCES
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c
> b/IntelFsp2Pkg/FspSecCore/SecMain.c
> index 37fd4dfdeb..ddbfc4fcdf 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.c
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c
> @@ -70,6 +70,7 @@ SecStartup (
> UINT32 Index;
> FSP_GLOBAL_DATA PeiFspData;
> UINT64 ExceptionHandler;
> + UINTN IdtSize;
>
> //
> // Process all libraries constructor function linked to SecCore.
> @@ -98,13 +99,26 @@ SecStartup (
> // | |
> // |---|> TempRamBase
> IdtTableInStack.PeiService = NULL;
> - ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);
> - for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {
> -CopyMem ((VOID*)[Index],
> (VOID*), sizeof (UINT64));
> + AsmReadIdtr ();
> + if ((IdtDescriptor.Base == 0) && (IdtDescriptor.Limit == 0x)) {
Are these architectural value at reset?
Thanks,
Andrew Fish
Chasel: Yes, these are default values from reset.
> +ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);
> +for (Index = 0; Index < FixedPcdGet8(PcdFspMaxInterruptSupported); Index
> ++) {
> + CopyMem ((VOID*)[Index],
> (VOID*), sizeof (UINT64));
> +}
> +IdtSize = sizeof (IdtTableInStack.IdtTable); } else {
> +if (IdtDescriptor.Limit + 1 > sizeof (IdtTableInStack.IdtTable)) {
> + //
> + // ERROR: IDT table size from boot loader is larger than FSP can
> support, DeadLoop here!
> + //
> + CpuDeadLoop();
> +} else {
> + IdtSize = IdtDescriptor.Limit + 1;
> +}
> +CopyMem ((VOID *) (UINTN) , (VOID *)
> + IdtDescriptor.Base, IdtSize);
> }
> -
> IdtDescriptor.Base = (UINTN)
> - IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) -
> 1);
> + IdtDescriptor.Limit = (UINT16)(IdtSize - 1);
>
> AsmWriteIdtr ();
>
> diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h
> b/IntelFsp2Pkg/FspSecCore/SecMain.h
> index 291bc5ca5c..19ac2fbfc1 100644
> --- a/IntelFsp2Pkg/FspSecCore/SecMain.h
> +++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2016, Intel Corporation. All rights
> reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights
> + reserved.
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license
> may be found at @@ -29,8 +29,6 @@ #include
> #include
>
> -#define SEC_IDT_ENTRY_COUNT34
> -
> typedef VOID (*PEI_CORE_ENTRY) ( \
> IN CONST EFI_SEC_PEI_HAND_OFF*SecCoreData, \
> IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList \ @@ -38,7 +36,7 @
Re: [edk2] [PATCH] IntelFsp2Pkg: Support FSP API mode indicator
Hi Jiewen,
This one just adding a new field in FspGlobalData structure which never been
consumed in current code base.
I'm checking if we should combine DISPATCH mode support code together instead
of just header change.
Thanks!
Chasel
-Original Message-
From: Yao, Jiewen
Sent: Thursday, October 11, 2018 9:41 PM
To: Chiu, Chasel ; edk2-devel@lists.01.org
Cc: Desimone, Nathaniel L
Subject: RE: [PATCH] IntelFsp2Pkg: Support FSP API mode indicator
Thanks Chasel.
I suggest we test the real function besides just pass build.
Please make sure your test below combination:
1) FSP wrapper with this change + FSP binary with this change.
2) FSP wrapper with this change + FSP binary without this change.
Thank you
Yao Jiewen
> -Original Message-
> From: Chiu, Chasel
> Sent: Thursday, October 11, 2018 9:35 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen ; Desimone, Nathaniel L
> ; Chiu, Chasel
> Subject: [PATCH] IntelFsp2Pkg: Support FSP API mode indicator
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1241
>
> FSP will support both API and DISPATCH mode and require one field from
> Global Data Structure to tell which mode is selected by boot loader.
> Use one reserved byte for FSP API mode indicator - FspApiModeEnabled
> and maintain backward compatibility:
> 1. If platform FSP supports DISPATCH mode, it must
>initialize this new field.
> 2. If platform FSP does not support DISPATCH mode,
>this new field has no effect/not used.
>
> Test: Verified compiling without issue.
>
> Cc: Jiewen Yao
> Cc: Desimone Nathaniel L
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chasel Chiu
> ---
> IntelFsp2Pkg/Include/FspGlobalData.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h
> b/IntelFsp2Pkg/Include/FspGlobalData.h
> index 7de26606a7..ccc9ecd78a 100644
> --- a/IntelFsp2Pkg/Include/FspGlobalData.h
> +++ b/IntelFsp2Pkg/Include/FspGlobalData.h
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2014 - 2016, Intel Corporation. All rights
> reserved.
> + Copyright (c) 2014 - 2018, Intel Corporation. All rights
> + reserved.
>This program and the accompanying materials
>are licensed and made available under the terms and conditions of
> the BSD License
>which accompanies this distribution. The full text of the license
> may be found at @@ -54,7 +54,8 @@ typedef struct {
> VOID *MemoryInitUpdPtr;
> VOID *SiliconInitUpdPtr;
> UINT8 ApiIdx;
> - UINT8 Reserved3[31];
> + UINT8 FspApiModeEnabled; // 1: API mode; 0:
> DISPATCH mode
> + UINT8 Reserved3[30];
> UINT32 PerfSig;
> UINT16 PerfLen;
> UINT16 Reserved4;
> --
> 2.13.3.windows.1
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Re: [edk2] [PATCH 2/3] IntelFsp2Pkg: Fix typo in SplitFspBin
Reviewed-by: Chasel Chiu
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
Desimone, Nathaniel L
Sent: Tuesday, September 18, 2018 11:04 PM
To: Patrick Georgi ; edk2-devel@lists.01.org
Subject: Re: [edk2] [PATCH 2/3] IntelFsp2Pkg: Fix typo in SplitFspBin
Reviewed-by: Nate DeSimone
On 9/18/18, 6:32 AM, "edk2-devel on behalf of Patrick Georgi"
wrote:
Signed-off-by: Patrick Georgi
Contributed-under: TianoCore Contribution Agreement 1.1
---
IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py
b/IntelFsp2Pkg/Tools/SplitFspBin.py
index bd5507c2fa..ac864492e8 100755
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -726,7 +726,7 @@ def SplitFspBin (fspfile, outdir, nametemplate):
fspname, ext = os.path.splitext(os.path.basename(nametemplate))
filename = os.path.join(outdir, fspname + '_' + fsp.Type + ext)
hfsp = open(filename, 'wb')
-print ("Ceate FSP component file '%s'" % filename)
+print ("Create FSP component file '%s'" % filename)
for fvidx in fsp.FvIdxList:
fv = fd.FvList[fvidx]
hfsp.write(fv.FvData)
--
2.19.0.397.gdd90340f6a-goog
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Re: [edk2] [PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: Remove PCDs
Reviewed-by: Chasel Chiu -Original Message- From: Zhang, Shenglei Sent: Tuesday, August 28, 2018 11:43 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Chiu, Chasel ; Laszlo Ersek Subject: [PATCH v3 06/16] IntelFsp2WrapperPkg/BaseFspWrapperPlatformLibSample: Remove PCDs The PCDs below are unused, so they have been removed from inf. gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize Cc: Jiewen Yao Cc: Chasel Chiu Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei --- .../BaseFspWrapperPlatformLibSample.inf| 3 --- 1 file changed, 3 deletions(-) diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf index f9581e8456..3bc024459f 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapperPlatformLibSample.inf @@ -55,6 +55,3 @@ [LibraryClasses] -[Pcd] - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an unused PCD
Reviewed-by: Chasel Chiu -Original Message- From: Zhang, Shenglei Sent: Tuesday, August 28, 2018 11:43 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Chiu, Chasel ; Laszlo Ersek Subject: [PATCH v3 05/16] IntelFsp2WrapperPkg/FspWrapperNotifyDxe: Remove an unused PCD The PCD below is unused, so it has been removed from inf. gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress Cc: Jiewen Yao Cc: Chasel Chiu Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei --- IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf | 1 - 1 file changed, 1 deletion(-) diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf index ce3bfa0c75..011cf89d3f 100644 --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf @@ -61,7 +61,6 @@ gFspHobGuid ## CONSUMES ## HOB [Pcd] - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi ## CONSUMES [Depex] -- 2.18.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH 2/5] IntelFsp2Pkg: Remove unused PCDs
Reviewed-by: Chasel Chiu -Original Message- From: Zhang, Shenglei Sent: Thursday, August 16, 2018 1:32 PM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Chiu, Chasel Subject: [PATCH 2/5] IntelFsp2Pkg: Remove unused PCDs The PCDs below are unused, so they have been removed from inf. gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize Cc: Jiewen Yao Cc: Chasel Chiu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei --- IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 6 -- IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf | 11 --- IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf | 5 - .../Library/BaseFspCommonLib/BaseFspCommonLib.inf | 5 - .../Library/BaseFspPlatformLib/BaseFspPlatformLib.inf | 9 - .../BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf | 4 .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf | 1 - .../BaseFspWrapperPlatformLibSample.inf | 3 --- 8 files changed, 44 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf index 0500a197f8..c657862deb 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf @@ -58,17 +58,11 @@ FspSecPlatformLib [Pcd] - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED - gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES -[FixedPcd] - gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES - [Ppis] gEfiTemporaryRamSupportPpiGuid ## PRODUCES diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf index a3563dd8cf..dd3f8e56a0 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf @@ -52,17 +52,6 @@ FspCommonLib FspSecPlatformLib -[Pcd] - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED - gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES - -[FixedPcd] - gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES - gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES - [Ppis] gEfiTemporaryRamSupportPpiGuid ## PRODUCES diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf index cf6a1918a3..aff4b23f88 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf @@ -53,14 +53,9 @@ FspSecPlatformLib [Pcd] - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES -[FixedPcd] - gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
Re: [edk2] [PATCH 3/4] MdeModulePkg/AtaAtapiPassThru: enable/disable PUIS per policy
Reviewed-by: Chasel Chiu
-Original Message-
From: Ni, Ruiyu
Sent: Friday, June 1, 2018 1:39 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star ; Chiu, Chasel
Subject: [PATCH 3/4] MdeModulePkg/AtaAtapiPassThru: enable/disable PUIS per
policy
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Star Zeng
Cc: Chasel Chiu
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 48 ++
.../Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c| 19 -
.../Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h| 3 ++
.../Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf | 3 +-
4 files changed, 71 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 6ab7870570..46d5c68996 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -2315,6 +2315,38 @@ AhciSpinUpDisk (
return EFI_SUCCESS;
}
+/**
+ Enable/disable/skip PUIS of the disk according to policy.
+
+ @param PciIo The PCI IO protocol instance.
+ @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS.
+ @param PortThe number of port.
+ @param PortMultiplier The multiplier of port.
+
+**/
+EFI_STATUS
+AhciPuisEnable (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS*AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier
+ )
+{
+ EFI_STATUS Status;
+
+ Status = EFI_SUCCESS;
+ if (mAtaAtapiPolicy->PuisEnable == 0) {
+Status = AhciDeviceSetFeature (PciIo, AhciRegisters, Port,
+PortMultiplier, ATA_SUB_CMD_DISABLE_PUIS, 0x00, ATA_ATAPI_TIMEOUT);
+ } else if (mAtaAtapiPolicy->PuisEnable == 1) {
+Status = AhciDeviceSetFeature (PciIo, AhciRegisters, Port,
+PortMultiplier, ATA_SUB_CMD_ENABLE_PUIS, 0x00, ATA_ATAPI_TIMEOUT);
+ }
+ DEBUG ((DEBUG_INFO, "%a PUIS feature at port [%d] PortMultiplier [%d] -
%r!\n",
+(mAtaAtapiPolicy->PuisEnable == 0) ? "Disable" : (
+(mAtaAtapiPolicy->PuisEnable == 1) ? "Enable" : "Skip"
+ ), Port, PortMultiplier, Status));
+ return Status;
+}
+
/**
Initialize ATA host controller at AHCI mode.
@@ -2657,6 +2689,22 @@ AhciModeInitialization (
if (DeviceType == EfiIdeHarddisk) {
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, (EFI_PERIPHERAL_FIXED_MEDIA |
EFI_P_PC_ENABLE));
}
+
+ //
+ // Enable/disable PUIS according to policy setting if PUIS is capable
(Word[83].BIT5 is set).
+ //
+ if ((Buffer.AtaData.command_set_supported_83 & BIT5) != 0) {
+Status = AhciPuisEnable (
+ PciIo,
+ AhciRegisters,
+ Port,
+ 0
+ );
+if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "PUIS enable/disable failed, Status = %r\n",
Status));
+ continue;
+}
+ }
}
}
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
index a48b295d26..aab704bcd3 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.c
@@ -2,7 +2,7 @@
This file implements ATA_PASSTHRU_PROCTOCOL and EXT_SCSI_PASSTHRU_PROTOCOL
interfaces
for managed ATA controllers.
- Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights
+ reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at @@ -142,6 +142,15 @@ UINT8 mScsiId[TARGET_MAX_BYTES] = {
0xFF, 0xFF, 0xFF, 0xFF
};
+EDKII_ATA_ATAPI_POLICY_PROTOCOL *mAtaAtapiPolicy;
+EDKII_ATA_ATAPI_POLICY_PROTOCOL mDefaultAtaAtapiPolicy = {
+ EDKII_ATA_ATAPI_POLICY_VERSION,
+ 2, // PuisEnable
+ 0, // DeviceSleepEnable
+ 0, // AggressiveDeviceSleepEnable
+ 0 // Reserved
+};
+
/**
Sends an ATA command to an ATA device that is attached to the ATA
controller. This function
supports both blocking I/O and non-blocking I/O. The blocking I/O
functionality is required, @@ -739,6 +748,14 @@ AtaAtapiPassThruStart (
goto ErrorExit;
}
+ Status = gBS->LocateProtocol (,
+ NULL, (VOID **)); if (EFI_ERROR (Status)) {
+//
+// If there is no AtaAtapiPolicy exposed, use the default policy.
+//
+mAtaAtapiPolicy = }
+
//
// Allocate a buffer to store the ATA_ATAPI_PASS_THRU_INSTANCE data structure
//
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h
index 31b005f2f6..b07bcbbb3e 100644
Re: [edk2] [PATCH 1/4] MdeModulePkg/AtaAtapiPassThru: Spin up Power up in Standby devices
Reviewed-by: Chasel Chiu
-Original Message-
From: Ni, Ruiyu
Sent: Friday, June 1, 2018 1:39 PM
To: edk2-devel@lists.01.org
Cc: Chiu, Chasel ; Wu, Hao A
Subject: [PATCH 1/4] MdeModulePkg/AtaAtapiPassThru: Spin up Power up in Standby
devices
The patch adds support to certain devices that support PUIS (Power up in
Standby).
For those devices that supports SET_FEATURE spin up, SW needs to send
SET_FEATURE subcommand to spin up the devices.
For those devices that doesn't support SET_FEATURE spin up, SW needs to send
read sectors command to spin up the devices.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Chasel Chiu
Cc: Hao A Wu
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 129 -
.../Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.h| 3 +-
2 files changed, 127 insertions(+), 5 deletions(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index e6de5d65bc..6ab7870570 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -1,7 +1,7 @@
/** @file
The file for AHCI mode of ATA host controller.
- Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights
+ reserved.
(C) Copyright 2015 Hewlett Packard Enterprise Development LP
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License @@ -1841,7 +1841,8 @@ AhciDeviceSetFeature (
IN UINT8 Port,
IN UINT8 PortMultiplier,
IN UINT16 Feature,
- IN UINT32 FeatureSpecificData
+ IN UINT32 FeatureSpecificData,
+ IN UINT64 Timeout
)
{
EFI_STATUS Status;
@@ -1868,7 +1869,7 @@ AhciDeviceSetFeature (
0,
,
,
- ATA_ATAPI_TIMEOUT,
+ Timeout,
NULL
);
@@ -2216,6 +2217,104 @@ Error6:
return Status;
}
+
+/**
+ Spin-up disk if IDD was incomplete or PUIS feature is enabled
+
+ @param PciIo The PCI IO protocol instance.
+ @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS.
+ @param PortThe number of port.
+ @param PortMultiplier The multiplier of port.
+ @param IdentifyDataA pointer to data buffer which is used to
contain IDENTIFY data.
+
+**/
+EFI_STATUS
+AhciSpinUpDisk (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS*AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT EFI_IDENTIFY_DATA *IdentifyData
+ )
+{
+ EFI_STATUS Status;
+ EFI_ATA_COMMAND_BLOCKAtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+ UINT8Buffer[512];
+
+ if (IdentifyData->AtaData.specific_config ==
ATA_SPINUP_CFG_REQUIRED_IDD_INCOMPLETE) {
+//
+// Use SET_FEATURE subcommand to spin up the device.
+//
+Status = AhciDeviceSetFeature (
+ PciIo, AhciRegisters, Port, PortMultiplier,
+ ATA_SUB_CMD_PUIS_SET_DEVICE_SPINUP, 0x00, ATA_SPINUP_TIMEOUT
+ );
+DEBUG ((DEBUG_INFO, "CMD_PUIS_SET_DEVICE_SPINUP for device at port [%d]
PortMultiplier [%d] - %r!\n",
+Port, PortMultiplier, Status));
+if (EFI_ERROR (Status)) {
+ return Status;
+}
+ } else {
+ASSERT (IdentifyData->AtaData.specific_config ==
+ ATA_SPINUP_CFG_NOT_REQUIRED_IDD_INCOMPLETE);
+
+//
+// Use READ_SECTORS to spin up the device if SpinUp SET FEATURE subcommand
is not supported
+//
+ZeroMem (, sizeof (EFI_ATA_COMMAND_BLOCK));
+ZeroMem (, sizeof (EFI_ATA_STATUS_BLOCK));
+//
+// Perform READ SECTORS PIO Data-In command to Read LBA 0
+//
+AtaCommandBlock.AtaCommand = ATA_CMD_READ_SECTORS;
+AtaCommandBlock.AtaSectorCount = 0x1;
+
+Status = AhciPioTransfer (
+ PciIo,
+ AhciRegisters,
+ Port,
+ PortMultiplier,
+ NULL,
+ 0,
+ TRUE,
+ ,
+ ,
+ ,
+ sizeof (Buffer),
+ ATA_SPINUP_TIMEOUT,
+ NULL
+ );
+DEBUG ((DEBUG_INFO, "Read LBA 0 for device at port [%d] PortMultiplier
[%d] - %r!\n",
+Port, PortMultiplier, Status));
+if (EFI_ERROR (Status)) {
+ return Status;
+}
+ }
+
+ //
+ // Read the complete IDENTIFY DEVICE data.
+ //
+ ZeroMem (IdentifyData, sizeof (*IdentifyData)); Status =
+ AhciIdentify (PciIo, AhciRegisters, Port, PortMultiplier,
+ IdentifyData); if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "Read IDD failed for device at port [%
Re: [edk2] [PATCH 4/4] MdeModulePkg/Ata/AtaAtapiPassThru: Enable/disable DEVSLP per policy
Reviewed-by: Chasel Chiu
-Original Message-
From: Ni, Ruiyu
Sent: Friday, June 1, 2018 1:39 PM
To: edk2-devel@lists.01.org
Cc: Chiu, Chasel ; Wu, Hao A
Subject: [PATCH 4/4] MdeModulePkg/Ata/AtaAtapiPassThru: Enable/disable DEVSLP
per policy
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Chasel Chiu
Cc: Hao A Wu
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 214 +++
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 23 ++-
2 files changed, 235 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 46d5c68996..3741e3b782 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -2217,6 +2217,213 @@ Error6:
return Status;
}
+/**
+ Read logs from SATA device.
+
+ @param PciIo The PCI IO protocol instance.
+ @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS.
+ @param PortThe number of port.
+ @param PortMultiplier The timeout value of stop.
+ @param Buffer The data buffer to store IDENTIFY PACKET data.
+
+ @retval EFI_DEVICE_ERRORThe cmd abort with error occurs.
+ @retval EFI_TIMEOUT The operation is time out.
+ @retval EFI_UNSUPPORTED The device is not ready for executing.
+ @retval EFI_SUCCESS The cmd executes successfully.
+
+**/
+EFI_STATUS
+AhciReadLogExt (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS*AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN OUT UINT8 *Buffer,
+ IN UINT8 LogNumber,
+ IN UINT8 PageNumber
+ )
+{
+ EFI_ATA_COMMAND_BLOCKAtaCommandBlock;
+ EFI_ATA_STATUS_BLOCK AtaStatusBlock;
+
+ if (PciIo == NULL || AhciRegisters == NULL || Buffer == NULL) {
+return EFI_INVALID_PARAMETER;
+ }
+
+ ///
+ /// Read log from device
+ ///
+ ZeroMem (, sizeof (EFI_ATA_COMMAND_BLOCK)); ZeroMem
+ (, sizeof (EFI_ATA_STATUS_BLOCK)); ZeroMem (Buffer,
+ 512);
+
+ AtaCommandBlock.AtaCommand = ATA_CMD_READ_LOG_EXT;
+ AtaCommandBlock.AtaSectorCount = 1;
+ AtaCommandBlock.AtaSectorNumber = LogNumber;
+ AtaCommandBlock.AtaCylinderLow = PageNumber;
+
+ return AhciPioTransfer (
+ PciIo,
+ AhciRegisters,
+ Port,
+ PortMultiplier,
+ NULL,
+ 0,
+ TRUE,
+ ,
+ ,
+ Buffer,
+ 512,
+ ATA_ATAPI_TIMEOUT,
+ NULL
+ );
+}
+
+/**
+ Enable DEVSLP command of the disk if supported.
+ Support for S3 resume to be added later
+
+ @param PciIo The PCI IO protocol instance.
+ @param AhciRegisters The pointer to the EFI_AHCI_REGISTERS.
+ @param PortThe number of port.
+ @param PortMultiplier The multiplier of port.
+ @param IdentifyDataA pointer to data buffer which is used to
contain IDENTIFY data.
+
+**/
+EFI_STATUS
+AhciEnableDevSlp (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN EFI_AHCI_REGISTERS*AhciRegisters,
+ IN UINT8 Port,
+ IN UINT8 PortMultiplier,
+ IN EFI_IDENTIFY_DATA *IdentifyData
+ )
+{
+ EFI_STATUS Status;
+ UINT32 Offset;
+ UINT32 Capability2;
+ UINT8LogData[512];
+ DEVSLP_TIMING_VARIABLES DevSlpTiming;
+ UINT32 PortCmd;
+ UINT32 PortDevSlp;
+
+ if (mAtaAtapiPolicy->DeviceSleepEnable == 0) {
+return EFI_SUCCESS;
+ }
+
+ //
+ // Do not enable DevSlp if DevSlp is not supported.
+ //
+ Capability2 = AhciReadReg (PciIo, AHCI_CAPABILITY2_OFFSET); DEBUG
+ ((DEBUG_INFO, "AHCI CAPABILITY2 = %08x\n", Capability2)); if
+ ((Capability2 & AHCI_CAP2_SDS) == 0) {
+return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Do not enable DevSlp if DevSlp is not present // Do not enable
+ DevSlp if Hot Plug or Mechanical Presence Switch is supported //
+ Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH;
+ PortCmd= AhciReadReg (PciIo, Offset + EFI_AHCI_PORT_CMD);
+ PortDevSlp = AhciReadReg (PciIo, Offset + AHCI_PORT_DEVSLP); DEBUG
+ ((DEBUG_ERROR, "Port CMD/DEVSLP = %08x / %08x\n", PortCmd,
+ PortDevSlp)); if (((PortDevSlp & AHCI_PORT_DEVSLP_DSP) == 0) ||
+ ((PortCmd & (EFI_AHCI_PORT_CMD_HPCP | EFI_AHCI_PORT_CMD_MPSP)) != 0)
+ ) {
+return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Do not enable DevSlp if the device doesn't support DevSlp //
+ DEBUG ((DEBUG_INFO, "IDENTIFY DEVICE: [77] = %04x, [78] = %04x, [79] =
%04x\n",
+ IdentifyData->AtaData.reserved_77,
+ IdentifyData->Ata
Re: [edk2] [PATCH 2/2] MdeModulePkg/PciBus: Do not enable MemWriteAndInvalidate bit for PCIE
Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
-Original Message-
From: Ni, Ruiyu
Sent: Friday, May 25, 2018 6:03 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star <star.z...@intel.com>; Chiu, Chasel <chasel.c...@intel.com>
Subject: [PATCH 2/2] MdeModulePkg/PciBus: Do not enable MemWriteAndInvalidate
bit for PCIE
Per PCIE spec, Memory Write and Invalidate is hardwired to 0b so PciBus driver
shouldn't write 1b to it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu...@intel.com>
Cc: Star Zeng <star.z...@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
---
MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index 81171c82d9..6f3d1bebc6 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -1,7 +1,7 @@
/** @file
PCI emumeration support functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015 Hewlett Packard Enterprise Development LP This program
and the accompanying materials are licensed and made available under the terms
and conditions of the BSD License @@ -1254,9 +1254,11 @@
DetermineDeviceAttribute (
PciSetDeviceAttribute (PciIoDevice, OldCommand, OldBridgeControl,
EFI_SET_ATTRIBUTES);
//
-// Enable other supported attributes but not defined in PCI_IO_PROTOCOL
-//
-PCI_ENABLE_COMMAND_REGISTER (PciIoDevice,
EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE);
+// Enable other PCI supported attributes but not defined in PCI_IO_PROTOCOL
+// For PCI Express devices, Memory Write and Invalidate is hardwired to 0b
so only enable it for PCI devices.
+if (!PciIoDevice->IsPciExp) {
+ PCI_ENABLE_COMMAND_REGISTER (PciIoDevice,
EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE);
+}
}
FastB2BSupport = TRUE;
--
2.16.1.windows.1
___
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Re: [edk2] [PATCH] SignedCapsulePkg SystemCapsuleLib: Change some dbg level to DEBUG_INFO
Thanks!
Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
-Original Message-
From: Zeng, Star
Sent: Wednesday, April 4, 2018 4:39 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star <star.z...@intel.com>; Yao, Jiewen <jiewen....@intel.com>; Chiu,
Chasel <chasel.c...@intel.com>; Chan, Amy <amy.c...@intel.com>; Chaganty,
Rangasai V <rangasai.v.chaga...@intel.com>
Subject: [PATCH] SignedCapsulePkg SystemCapsuleLib: Change some dbg level to
DEBUG_INFO
This debug message should be info instead of error. This patch is to change the
debug level to DEBUG_INFO.
DEBUG((DEBUG_ERROR, "checking FV0x%08x - 0x%x\n",
FvHeader, FvHeader->FvLength));// "Mark"
This comment is inaccurate. This patch is to remove it.
//
// Check section
//
This debug message should be removed as FvHeader may have been out of range
FdStart and FdSize, and the loop will go to "Mark" above again if FvHeader is
not out of range FdStart and FdSize, and then that debug message will be shown.
This patch is to remove this debug message.
DEBUG((DEBUG_ERROR, "Next FV0x%08x - 0x%x\n",
FvHeader, FvHeader->FvLength));
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
Cc: Amy Chan <amy.c...@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaga...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.z...@intel.com>
---
.../Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git
a/SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.c
b/SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.c
index 876d2257b365..5cb97bf93118 100644
--- a/SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.c
+++ b/SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleL
+++ ib.c
@@ -6,7 +6,7 @@
CapsuleAuthenticateSystemFirmware(), ExtractAuthenticatedImage() will receive
untrusted input and do basic validation.
- Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2018, Intel Corporation. All rights
+ reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at @@ -188,7 +188,7 @@ GetFfsByName (
FvHeader = (EFI_FIRMWARE_VOLUME_HEADER *)((UINTN)FvHeader + SIZE_4KB);
continue;
}
-DEBUG((DEBUG_ERROR, "checking FV0x%08x - 0x%x\n", FvHeader,
FvHeader->FvLength));
+DEBUG((DEBUG_INFO, "checking FV0x%08x - 0x%x\n", FvHeader,
+ FvHeader->FvLength));
FvFound = TRUE;
if (FvHeader->FvLength > FvSize) {
DEBUG((DEBUG_ERROR, "GetFfsByName - FvSize: 0x%08x, MaxSize - 0x%08x\n",
(UINTN)FvHeader->FvLength, (UINTN)FvSize)); @@ -225,9 +225,6 @@ GetFfsByName (
if (CompareGuid(FileName, >Name) &&
((Type == EFI_FV_FILETYPE_ALL) || (FfsHeader->Type == Type))) {
-//
-// Check section
-//
*OutFfsBuffer = FfsHeader;
*OutFfsBufferSize = FfsSize;
return TRUE;
@@ -248,7 +245,6 @@ GetFfsByName (
// Next FV
//
FvHeader = (VOID *)(UINTN)((UINTN)FvHeader + FvHeader->FvLength);
-DEBUG((DEBUG_ERROR, "Next FV0x%08x - 0x%x\n", FvHeader,
FvHeader->FvLength));
}
if (!FvFound) {
--
2.7.0.windows.1
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Re: [edk2] [PATCH] MdeModulePkg Variable: Align TPL level for (Smm)EndOfDxe callback
Reviewed-by: Chasel Chiu <chasel.c...@intel.com> -Original Message- From: Zeng, Star Sent: Wednesday, March 28, 2018 5:31 PM To: edk2-devel@lists.01.org Cc: Zeng, Star <star.z...@intel.com>; Chiu, Chasel <chasel.c...@intel.com>; Ni, Ruiyu <ruiyu...@intel.com>; Gao, Liming <liming@intel.com>; Yao, Jiewen <jiewen@intel.com> Subject: [PATCH] MdeModulePkg Variable: Align TPL level for (Smm)EndOfDxe callback VariableRuntimeDxe will have OnEndOfDxe() callback function at TPL_NOTIFY level on EndOfDxe event when DXE variable solution is used. Status = gBS->CreateEventEx ( EVT_NOTIFY_SIGNAL, TPL_NOTIFY, OnEndOfDxe, NULL, , ); VariableSmm will have SmmEndOfDxeCallback() callback function at TPL_CALLBACK level on SmmEndOfDxe event when SMM variable solution is used. SmmIplGuidedEventNotify() - PiSmmIpl.c TPL_CALLBACK on EndOfDxe -> SmmEndOfDxeHandler() - PiSmmCore.c install SmmEndOfDxe protocol -> SmmEndOfDxeCallback() - VariableSmm.c The TPL level for (Smm)EndOfDxe callback between VariableRuntimeDxe and VariableSmm is inconsistent, it will make the unified platform code could not make sure its TPL_NOTIFY EndOfDxe callback function (to use variable lock/check) executed before (Smm)EndOfDxe callback function in variable driver. The variable lock/check will start to protect after (Smm)EndOfDxe callback function in variable driver is executed. This patch is to algin the TPL level to TPL_CALLBACK for (Smm)EndOfDxe callback between VariableRuntimeDxe and VariableSmm. Cc: Chasel Chiu <chasel.c...@intel.com> Cc: Ruiyu Ni <ruiyu...@intel.com> Cc: Liming Gao <liming@intel.com> Cc: Jiewen Yao <jiewen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.z...@intel.com> --- MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c index b2a373cf98aa..6b04f4f7b394 100644 --- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c +++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c @@ -3,7 +3,7 @@ and volatile storage space and install variable architecture protocol. Copyright (C) 2013, Red Hat, Inc. -Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved. +Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. (C) Copyright 2015 Hewlett Packard Enterprise Development LP This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -547,7 +547,7 @@ VariableServiceInitialize ( // Status = gBS->CreateEventEx ( EVT_NOTIFY_SIGNAL, - TPL_NOTIFY, + TPL_CALLBACK, OnEndOfDxe, NULL, , -- 2.7.0.windows.1 ___ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Re: [edk2] [PATCH] MdeModulePkg CapsulePei: Sort and merge memory resource entries
Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
-Original Message-
From: Zeng, Star
Sent: Monday, December 4, 2017 6:01 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star <star.z...@intel.com>; Yao, Jiewen <jiewen....@intel.com>; Chiu,
Chasel <chasel.c...@intel.com>; Chiang, Dakota <dakota.chi...@intel.com>
Subject: [PATCH] MdeModulePkg CapsulePei: Sort and merge memory resource entries
Sort and merge memory resource entries to handle the case that the memory
resource HOBs are reported differently between BOOT_ON_FLASH_UPDATE boot mode
and normal boot mode, and the capsule buffer from UpdateCapsule at normal boot
sits across two memory resource descriptors at BOOT_ON_FLASH_UPDATE boot mode.
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
Cc: Dakota Chiang <dakota.chi...@intel.com>
Tested-by: Dakota Chiang <dakota.chi...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.z...@intel.com>
---
MdeModulePkg/Universal/CapsulePei/UefiCapsule.c | 90 +
1 file changed, 90 insertions(+)
diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
index cca455ec396c..043365f7f770 100644
--- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
+++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
@@ -625,6 +625,82 @@ GetPhysicalAddressBits ( #endif
/**
+ Sort memory resource entries based upon PhysicalStart, from low to high.
+
+ @param[in, out] MemoryResourceA pointer to the memory resource entry
buffer.
+
+**/
+VOID
+SortMemoryResourceDescriptor (
+ IN OUT MEMORY_RESOURCE_DESCRIPTOR *MemoryResource
+ )
+{
+ MEMORY_RESOURCE_DESCRIPTOR*MemoryResourceEntry;
+ MEMORY_RESOURCE_DESCRIPTOR*NextMemoryResourceEntry;
+ MEMORY_RESOURCE_DESCRIPTORTempMemoryResource;
+
+ MemoryResourceEntry = MemoryResource; NextMemoryResourceEntry =
+ MemoryResource + 1; while (MemoryResourceEntry->ResourceLength != 0)
+ {
+while (NextMemoryResourceEntry->ResourceLength != 0) {
+ if (MemoryResourceEntry->PhysicalStart >
NextMemoryResourceEntry->PhysicalStart) {
+CopyMem (, MemoryResourceEntry, sizeof
(MEMORY_RESOURCE_DESCRIPTOR));
+CopyMem (MemoryResourceEntry, NextMemoryResourceEntry, sizeof
(MEMORY_RESOURCE_DESCRIPTOR));
+CopyMem (NextMemoryResourceEntry, , sizeof
(MEMORY_RESOURCE_DESCRIPTOR));
+ }
+
+ NextMemoryResourceEntry = NextMemoryResourceEntry + 1;
+}
+
+MemoryResourceEntry = MemoryResourceEntry + 1;
+NextMemoryResourceEntry = MemoryResourceEntry + 1;
+ }
+}
+
+/**
+ Merge continous memory resource entries.
+
+ @param[in, out] MemoryResourceA pointer to the memory resource entry
buffer.
+
+**/
+VOID
+MergeMemoryResourceDescriptor (
+ IN OUT MEMORY_RESOURCE_DESCRIPTOR *MemoryResource
+ )
+{
+ MEMORY_RESOURCE_DESCRIPTOR*MemoryResourceEntry;
+ MEMORY_RESOURCE_DESCRIPTOR*NewMemoryResourceEntry;
+ MEMORY_RESOURCE_DESCRIPTOR*NextMemoryResourceEntry;
+ MEMORY_RESOURCE_DESCRIPTOR*MemoryResourceEnd;
+
+ MemoryResourceEntry = MemoryResource; NewMemoryResourceEntry =
+ MemoryResource; while (MemoryResourceEntry->ResourceLength != 0) {
+CopyMem (NewMemoryResourceEntry, MemoryResourceEntry, sizeof
(MEMORY_RESOURCE_DESCRIPTOR));
+NextMemoryResourceEntry = MemoryResourceEntry + 1;
+
+while ((NextMemoryResourceEntry->ResourceLength != 0) &&
+ (NextMemoryResourceEntry->PhysicalStart ==
(MemoryResourceEntry->PhysicalStart + MemoryResourceEntry->ResourceLength))) {
+ MemoryResourceEntry->ResourceLength +=
NextMemoryResourceEntry->ResourceLength;
+ if (NewMemoryResourceEntry != MemoryResourceEntry) {
+NewMemoryResourceEntry->ResourceLength +=
NextMemoryResourceEntry->ResourceLength;
+ }
+
+ NextMemoryResourceEntry = NextMemoryResourceEntry + 1;
+}
+
+MemoryResourceEntry = NextMemoryResourceEntry;
+NewMemoryResourceEntry = NewMemoryResourceEntry + 1; }
+
+ //
+ // Set NULL terminate memory resource descriptor after merging.
+ //
+ MemoryResourceEnd = NewMemoryResourceEntry;
+ ZeroMem (MemoryResourceEnd, sizeof (MEMORY_RESOURCE_DESCRIPTOR)); }
+
+/**
Build memory resource descriptor from resource descriptor in HOB list.
@return Pointer to the buffer of memory resource descriptor.
@@ -704,6 +780,20 @@ BuildMemoryResourceDescriptor (
Hob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, Hob.Raw);
}
+ SortMemoryResourceDescriptor (MemoryResource);
+ MergeMemoryResourceDescriptor (MemoryResource);
+
+ DEBUG ((DEBUG_INFO, "Dump MemoryResource[] after sorted and
+ merged\n")); for (Index = 0; MemoryResource[Index].ResourceLength != 0;
Index++) {
+DEBUG ((
+ DEBUG_INFO,
+ " MemoryResource[0x%x] - Start(0x%
Re: [edk2] [PATCH] MdeModulePkg SmbiosMeasurementDxe: Skip measurement for OEM type
Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
-Original Message-
From: Zeng, Star
Sent: Thursday, September 14, 2017 7:29 PM
To: edk2-devel@lists.01.org
Cc: Zeng, Star <star.z...@intel.com>; Yao, Jiewen <jiewen....@intel.com>; Chiu,
Chasel <chasel.c...@intel.com>
Subject: [PATCH] MdeModulePkg SmbiosMeasurementDxe: Skip measurement for OEM
type
The generic driver has no way to know whether an OEM type should be filtered or
not.
This patch is to update the code to skip measurement for OEM type and platform
code can measure it by self if required.
Cc: Jiewen Yao <jiewen@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.z...@intel.com>
---
.../SmbiosMeasurementDxe/SmbiosMeasurementDxe.c| 54 +-
.../SmbiosMeasurementDxe/SmbiosMeasurementDxe.inf | 5 +-
2 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
index bc5e7464e133..4a3e99aefd0f 100644
--- a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
+++ b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
@@ -1,7 +1,7 @@
/** @file
This driver measures SMBIOS table to TPM.
-Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at @@ -277,30 +277,38
@@ FilterSmbiosEntry (
DEBUG ((EFI_D_INFO, "Smbios Table (Type - %d):\n", ((SMBIOS_STRUCTURE
*)TableEntry)->Type));
DEBUG_CODE (InternalDumpHex (TableEntry, TableEntrySize););
- FilterStruct = GetFilterStructByType (((SMBIOS_STRUCTURE
*)TableEntry)->Type);
- if (FilterStruct != NULL) {
-if (FilterStruct->Filter == NULL || FilterStruct->FilterCount == 0) {
- // zero all table entries, except header
- ZeroMem ((UINT8 *)TableEntry + sizeof(SMBIOS_STRUCTURE), TableEntrySize
- sizeof(SMBIOS_STRUCTURE));
-} else {
- Filter = FilterStruct->Filter;
- for (Index = 0; Index < FilterStruct->FilterCount; Index++) {
-if (((SMBIOS_STRUCTURE *) TableEntry)->Length >= (Filter[Index].Offset
+ Filter[Index].Size)) {
- //
- // The field is present in the SMBIOS entry.
- //
- if ((Filter[Index].Flags & SMBIOS_FILTER_TABLE_FLAG_IS_STRING) != 0)
{
-CopyMem (, (UINT8 *)TableEntry + Filter[Index].Offset,
sizeof(StringId));
-if (StringId != 0) {
- // set ' ' for string field
- String = GetSmbiosStringById (TableEntry, StringId, );
- ASSERT (String != NULL);
- //DEBUG ((EFI_D_INFO,"StrId(0x%x)-%a(%d)\n", StringId, String,
StringLen));
- SetMem (String, StringLen, ' ');
+ //
+ // Skip measurement for OEM types.
+ //
+ if (((SMBIOS_STRUCTURE *)TableEntry)->Type >= SMBIOS_OEM_BEGIN) {
+// zero all table fields, except header
+ZeroMem ((UINT8 *)TableEntry + sizeof(SMBIOS_STRUCTURE),
+ TableEntrySize - sizeof(SMBIOS_STRUCTURE)); } else {
+FilterStruct = GetFilterStructByType (((SMBIOS_STRUCTURE
*)TableEntry)->Type);
+if (FilterStruct != NULL) {
+ if (FilterStruct->Filter == NULL || FilterStruct->FilterCount == 0) {
+// zero all table fields, except header
+ZeroMem ((UINT8 *)TableEntry + sizeof(SMBIOS_STRUCTURE),
TableEntrySize - sizeof(SMBIOS_STRUCTURE));
+ } else {
+Filter = FilterStruct->Filter;
+for (Index = 0; Index < FilterStruct->FilterCount; Index++) {
+ if (((SMBIOS_STRUCTURE *) TableEntry)->Length >=
(Filter[Index].Offset + Filter[Index].Size)) {
+//
+// The field is present in the SMBIOS entry.
+//
+if ((Filter[Index].Flags & SMBIOS_FILTER_TABLE_FLAG_IS_STRING) !=
0) {
+ CopyMem (, (UINT8 *)TableEntry + Filter[Index].Offset,
sizeof(StringId));
+ if (StringId != 0) {
+// set ' ' for string field
+String = GetSmbiosStringById (TableEntry, StringId,
);
+ASSERT (String != NULL);
+//DEBUG ((EFI_D_INFO,"StrId(0x%x)-%a(%d)\n", StringId, String,
StringLen));
+SetMem (String, StringLen, ' ');
+ }
}
+// zero non-string field
+ZeroMem ((UINT8 *)TableEntry + Filter[Index].Offset,
+ Filter[Index].Size);
}
- // zero non-string field
- ZeroMem ((UINT8 *)TableEntry + Filter[Index].Offset,
Filter[Index].Size);
}
}
