.org] On Behalf Of Leif
Lindholm
Sent: Thursday, September 15, 2016 6:20 PM
To: Kinney, Michael D <michael.d.kin...@intel.com>
Cc: Tian, Feng <feng.t...@intel.com>; edk2-devel@lists.01.org; Zeng, Star
<star.z...@intel.com>
Subject: Re: [edk2] [patch] MdeModulePkg/Xhci: add 1ms de
On Wed, Sep 14, 2016 at 05:14:19PM +, Kinney, Michael D wrote:
> MdePkg/Include/Library/UefiLib.h does have some helper macros for
> setting timer events periods that are in 100 nS units:
>
> #define EFI_TIMER_PERIOD_MICROSECONDS(Microseconds)
> MultU64x32((UINT64)(Microseconds), 10)
>
10:37 AM
> To: Kinney, Michael D <michael.d.kin...@intel.com>
> Cc: Leif Lindholm <leif.lindh...@linaro.org>; Tian, Feng
> <feng.t...@intel.com>; edk2-
> de...@lists.01.org; Zeng, Star <star.z...@intel.com>
> Subject: Re: [edk2] [patch] MdeModulePkg/Xhci:
t; Thanks,
>
> Mike
>
>
>> -Original Message-
>> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Leif
>> Lindholm
>> Sent: Wednesday, September 14, 2016 6:09 AM
>> To: Tian, Feng <feng.t...@intel.com>
>> Cc: edk2-dev
rg] On Behalf Of Leif
> Lindholm
> Sent: Wednesday, September 14, 2016 6:09 AM
> To: Tian, Feng <feng.t...@intel.com>
> Cc: edk2-devel@lists.01.org; Zeng, Star <star.z...@intel.com>
> Subject: Re: [edk2] [patch] MdeModulePkg/Xhci: add 1ms delay before access
> MMIO reg
>
On Wed, Sep 14, 2016 at 09:37:13AM +0800, Feng Tian wrote:
> Some XHCI host controllers require to have extra 1ms delay before
> accessing any MMIO register during HC reset.
Is this compliant with the XHCI specification or a bug workaround?
I am not going to argue about the delay, but I would
Ok, I will update the commit title to highlight it's a change in XhciDxe.
Thanks
Feng
-Original Message-
From: Zeng, Star
Sent: Wednesday, September 14, 2016 10:58 AM
To: Tian, Feng
Cc: edk2-devel@lists.01.org
Subject: RE: [patch] MdeModulePkg/Xhci: add 1ms delay
How about to use XhciDxe instead of Xhci in the title to be more differentiated
with another change in XhciPei?
Reviewed-by: Star Zeng
Thanks,
Star
-Original Message-
From: Tian, Feng
Sent: Wednesday, September 14, 2016 9:37 AM
To: Zeng, Star
Some XHCI host controllers require to have extra 1ms delay before
accessing any MMIO register during HC reset.
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian
---
MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 6
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