On Wed, Oct 11, 2017 at 06:53:05AM +0200, Marcin Wojtas wrote:
> >> I think Contibuted-under: still needs to come first.
> >>
> >> I don't think we have an explicit policy for how to deal with
> >> multi-contributor patches. The ones we do see tend to just keep a
> >> single commit message and
On Wed, Oct 11, 2017 at 10:43:14AM +0200, Marcin Wojtas wrote:
> >> I think it's fairly easy thing, needlessly twisted... How does above
> >> reflect the requirement to add contributor sign-off to someone else's
> >> patch (with his authorship and original sign-off - should they be
> >> removed?)?
Jiewen,
Yes, it will always install new protocol and may cause run out of memory. I
have updated code to uninstall this protocol right after install it. please
check the V3 patch which fix your two comments.
Thanks,
Eric
-Original Message-
From: Yao, Jiewen
Sent: Wednesday, October
Leif,
2017-10-11 10:32 GMT+02:00 Leif Lindholm :
> On Wed, Oct 11, 2017 at 06:53:05AM +0200, Marcin Wojtas wrote:
>> >> I think Contibuted-under: still needs to come first.
>> >>
>> >> I don't think we have an explicit policy for how to deal with
>> >> multi-contributor
2017-10-11 11:14 GMT+02:00 Leif Lindholm :
> On Wed, Oct 11, 2017 at 10:43:14AM +0200, Marcin Wojtas wrote:
>> >> I think it's fairly easy thing, needlessly twisted... How does above
>> >> reflect the requirement to add contributor sign-off to someone else's
>> >> patch
Reviewed-by: Ruiyu Ni
Thanks/Ray
> -Original Message-
> From: Gao, Liming
> Sent: Tuesday, October 10, 2017 6:04 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu
> Subject: [Patch] SourceLevelDebugPkg: Update SmmDebugAgentLib to
> restore APIC
I have a question for below:
> + SmmHandle = NULL;
> + Status = SmmInstallProtocolInterface (
> + ,
> + ,
> + EFI_NATIVE_INTERFACE,
> + NULL
> + );
A platform may do S3 multiple times. What happen if the
SmmInstallProtocolInterface()
From: Ard Biesheuvel
There is no point in using the MPCore PrePi, given that only the primary
core will enter UEFI at EL2, and the secondaries will be held in EL3
until summoned by the OS. So use the unicore flavour instead.
Contributed-under: TianoCore Contribution
From: Ard Biesheuvel
The FDFs no longer require explicit alignment for sections containing
aligned objects, so change it to 'Auto' and FIXED (which allows some
padding to be removed), and remove some other cruft while at it.
Contributed-under: TianoCore Contribution
From: Ard Biesheuvel
The GIC architecture mandates that the CPU interface, which consists
of 2 consecutive 4 KB frames, can be mapped using separate mappings.
Since this is problematic on 64 KB pages, the MMU-400 aliases each
frame 16 times, and the two consecutive
This patch removes tabs and wrong line endings in the file, maiking
it acceptable to the PatchCheck.py script.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
---
From: Ard Biesheuvel
This driver allows automatic booting via the network.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Signed-off-by: Marcin Wojtas
Reviewed-by: Leif Lindholm
From: Ard Biesheuvel
For some reason, one of the early ARM platforms disabled all the
diagnostics related to the UEFI driver model, resulting in the
output of UEFI shell utilities such as 'devices' or 'drivers' to
become completely useless. Armada's shared .DSC include
Hi,
This is a second version of misc, general improvements patchset.
There are minor changes, comparing to v1 - please refer to the
changelog below.
The patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/misc-upstream-r20171011
I'm
In order to enable modification of dynamic PCD's for the libraries
and DXE drivers, this patch introduces new driver. It is
executed prior to other drivers. Mpp, ComPhy and Utmi libraries
initialization were moved from PrePi stage to DXE.
To force the correct driver dispatch sequence, introduce a
From: Ard Biesheuvel
For full functionality, including HII forms wired to non-volatile UEFI
variables, we need dynamic PCDs as well. So let's enable those.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
From: Ard Biesheuvel
To avoid dereferencing junk when walking the call stack in exception
handlers (which may prevent us from getting a full backtrace), set
the frame pointer to 0x0 when first entering UEFI.
Contributed-under: TianoCore Contribution Agreement 1.1
From: Ard Biesheuvel
Switch from the Intel BDS to the generic BDS, which is preferred for
ARM platforms given that it is completely legacy free.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
From: Ard Biesheuvel
Remove the gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask
setting so it reverts to its default of 0, and disables performance
profiling.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
From: Ard Biesheuvel
Enable strict memory protection at boot time and under the OS, by using
4 KB section alignment for DXE_DRIVER, UEFI_DRIVER and UEFI_APPLICATION
modules, and 64 KB alignment for DXE_RUNTIME_DRIVER modules. Note that
the latter is mandated by the
Please don't forget to change the structure name as proposed by Jiewen.
Reviewed-by: Ruiyu Ni
Thanks/Ray
> -Original Message-
> From: Dong, Eric
> Sent: Wednesday, October 11, 2017 1:32 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Yao,
This patch series add new SmmEndOfS3Resume event which required by some
SMM drivers.
It will implmented by SmmCore to install the gEdkiiSmmEndOfS3ResumeProtocolGuid
Protocol. Smm drivers can install this protocol's notification functions to
hoot this envet.
It will be trigged right after the
Add gEdkiiSmmEndOfS3ResumeProtocolGuid which used by SmmCore to
notify smm drives that S3 resume has finished.
Cc: Ruiyu Ni
Cc: Jiewen Yao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
Driver will send S3 resume finished event to SmmCore through communicate
buffer after it signals EndOfPei event.
V2 Changes:
1. Change structures name to avoid they start with EFI_.
2. Base on DXE phase bits to provide communication buffer, current implement
check both PEI and DXE phase.
V3
2017-10-11 13:38 GMT+02:00 Leif Lindholm :
> On Wed, Oct 11, 2017 at 12:15:27PM +0200, Marcin Wojtas wrote:
>> Hi,
>>
>> This is a second version of misc, general improvements patchset.
>> There are minor changes, comparing to v1 - please refer to the
>> changelog below.
This patch breaks the GCC5 build:
On 10/09/17 16:17, Jian J Wang wrote:
> diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
> b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
> index 3d9a8b9649..f42c13cd89 100644
> --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
> +++
This patch corrects the Management Mode(MM) return codes as specified in
http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Achin Gupta
Signed-off-by:
On Wed, Oct 11, 2017 at 12:15:27PM +0200, Marcin Wojtas wrote:
> Hi,
>
> This is a second version of misc, general improvements patchset.
> There are minor changes, comparing to v1 - please refer to the
> changelog below.
>
> The patches are available in the github:
>
Cc: Laszlo Ersek
Cc: Liming Gao
Cc: Dandan Bi
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang
---
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c | 3 ---
1 file changed,
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Dong, Eric
> Sent: Wednesday, October 11, 2017 4:22 PM
> To: edk2-devel@lists.01.org
> Cc: Ni, Ruiyu ; Yao, Jiewen
> Subject: [Patch v3 0/3] Add SmmEndOfS3Resume event.
>
> This
Thanks for catching this issue. Patch has been sent out.
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, October 12, 2017 5:30 AM
> To: Wang, Jian J ; edk2-devel@lists.01.org
> Cc: Kinney, Michael D
Add the comments to address security problems in the Pkcs7Verify Protocol
per UEFI 2.7 updates.
The Pkcs7Verifier function VerifySignature() has problematic use cases
where it might be used to unwittingly bypass security checks. The specific
problem is that if the supplied hash is a different
This is the regression issue. After apply CalculateCrc32(), the parameter
check is missing.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
Cc: Wu Hao A
---
MdeModulePkg/Core/RuntimeDxe/Crc32.c | 4
1 file
Hi Leif,
2017-10-11 20:18 GMT+02:00 Ard Biesheuvel :
> On 11 October 2017 at 18:08, Leif Lindholm wrote:
>> Subject: from->for ?
>>
>> On Wed, Oct 11, 2017 at 05:40:45PM +0200, Marcin Wojtas wrote:
>>> From: Ard Biesheuvel
Reviewed-by: Hao Wu
Best Regards,
Hao Wu
> -Original Message-
> From: Gao, Liming
> Sent: Thursday, October 12, 2017 12:26 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A
> Subject: [Patch] MdeModulePkg: Update RuntimeDxe Crc32 to check the input
> parameter
>
>
2017-10-11 19:56 GMT+02:00 Leif Lindholm :
> On Wed, Oct 11, 2017 at 05:40:47PM +0200, Marcin Wojtas wrote:
>> Instead of using hardcoded value in PcdSystemMemorySize PCD,
>> obtain DRAM size directly from SoC registers, which are filled
>> by firmware during early
On Wed, Oct 11, 2017 at 05:40:42PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> Add an implementation of EFI_RNG_PROTOCOL so that the OS loader has
> access to entropy for KASLR and other purposes (i.e., seeding the OS's
> entropy pool very early on).
>
>
On Wed, Oct 11, 2017 at 05:40:43PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> In order to prevent fragmentation of the UEFI memory map, increase the
> sizes of the preallocated regions. Note that this does not increase the
> memory footprint of UEFI, it
On Wed, Oct 11, 2017 at 05:40:46PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> The default MemoryInitPeiLib implementation insists on reserving the
> region occupied by our own FV, while this is not necessary at all (the
> compressed payload is uncompressed
On Wed, Oct 11, 2017 at 05:40:44PM +0200, Marcin Wojtas wrote:
> When switching to generic PSCI reset library, obsolete parts
> of previous custom reset library (PCDs, documentation) remained.
> Remove them.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin
Subject: from->for ?
On Wed, Oct 11, 2017 at 05:40:45PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> The Armada 70x0/80x0 DRAM controller allows a single window of DRAM
> to be remapped to another location in the physical address space. This
> allows us to
From: Ard Biesheuvel
Add an implementation of EFI_RNG_PROTOCOL so that the OS loader has
access to entropy for KASLR and other purposes (i.e., seeding the OS's
entropy pool very early on).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard
From: Ard Biesheuvel
The Armada 70x0/80x0 DRAM controller allows a single window of DRAM
to be remapped to another location in the physical address space. This
allows us to free up some memory in the 32-bit addressable region for
peripheral MMIO and PCI MMIO32 and
Hi,
We have a good upstream momentum, so let's keep it:)
This patchset is a second part of general platform support improvements.
Mostly, it consists of the changes around DRAM handling (remapping feature,
dynamic size detection and others). It also enables 32-bit ARM build and
implements
From: Ard Biesheuvel
The default MemoryInitPeiLib implementation insists on reserving the
region occupied by our own FV, while this is not necessary at all (the
compressed payload is uncompressed elsewhere, so the moment we enter
DXE core, we don't care about the FV
From: Ard Biesheuvel
Add an ARM implementation of ArmPlatformHelper.S.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
Signed-off-by: Marcin Wojtas
---
Instead of using hardcoded value in PcdSystemMemorySize PCD,
obtain DRAM size directly from SoC registers, which are filled
by firmware during early initialization stage.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
On 10 October 2017 at 17:59, Laszlo Ersek wrote:
> On 10/10/17 10:58, Ruiyu Ni wrote:
>> Current implementation skips to check whether the last four
>> characters are digits when the OptionNumber is NULL.
>> Even worse, it may incorrectly return FALSE when OptionNumber is
>>
On Wed, Oct 11, 2017 at 05:40:49PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> Update the included components and library classes to make this platform
> build for 32-bit ARM.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard
On 11 October 2017 at 18:08, Leif Lindholm wrote:
> Subject: from->for ?
>
> On Wed, Oct 11, 2017 at 05:40:45PM +0200, Marcin Wojtas wrote:
>> From: Ard Biesheuvel
>>
>> The Armada 70x0/80x0 DRAM controller allows a single window of DRAM
>> to
On Wed, Oct 11, 2017 at 05:40:47PM +0200, Marcin Wojtas wrote:
> Instead of using hardcoded value in PcdSystemMemorySize PCD,
> obtain DRAM size directly from SoC registers, which are filled
> by firmware during early initialization stage.
>
> Contributed-under: TianoCore Contribution Agreement
On Wed, Oct 11, 2017 at 05:40:48PM +0200, Marcin Wojtas wrote:
> From: Ard Biesheuvel
>
> Add an ARM implementation of ArmPlatformHelper.S.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
>
On 11 October 2017 at 17:47, Leif Lindholm wrote:
> On Wed, Oct 11, 2017 at 05:40:42PM +0200, Marcin Wojtas wrote:
>> From: Ard Biesheuvel
>>
>> Add an implementation of EFI_RNG_PROTOCOL so that the OS loader has
>> access to entropy for KASLR
On 11 October 2017 at 18:58, Leif Lindholm wrote:
> On Wed, Oct 11, 2017 at 05:40:49PM +0200, Marcin Wojtas wrote:
>> From: Ard Biesheuvel
>>
>> Update the included components and library classes to make this platform
>> build for 32-bit ARM.
Set global variables on Constructor function based on CPUID checks.
The variables replace Intel macros to allow support on AMD x86 systems.
Specifically, the replaced macros are:
1) SRAM_SAVE_STATE_MAP_OFFSET
2) TXT_SMM_PSD_OFFSET
Cc: Jiewen Yao
Cc: Ruiyu Ni
Set global variables on Entry function based on CPUID checks.
The variables replace Intel macros to allow support on AMD x86 systems.
Specifically, the replaced macros are:
1) SRAM_SAVE_STATE_MAP_OFFSET
2) SMM_PSD_OFFSET
Cc: Jiewen Yao
Cc: Ruiyu Ni
Cc:
This patch-set replaces Intel-specific macros with global variables
to provide support for AMD-based x86 systems.
The replaced macros are:
1) SRAM_SAVE_STATE_MAP_OFFSET
2) TXT_SMM_PSD_OFFSET
3) SMM_PSD_OFFSET
Changes since v4:
Make runtime CPUID checks and use global variables instead of
Jiewen,
Got it. If just change structure name, I prefer to do it when I push the code.
Thanks,
Eric
-Original Message-
From: Yao, Jiewen
Sent: Wednesday, October 11, 2017 2:25 PM
To: Dong, Eric ; edk2-devel@lists.01.org
Cc: Ni, Ruiyu
Subject:
Hi Eric
I do not think IA64 is a good term. Traditionally, IA64 means the IPF platform,
which is deprecated.
We use X64 to indicate it is Intel 64bit platform.
If it is just a general 64bit indicator, I suggest we use
SMM_COMMUNICATE_HEADER_64 and SMM_COMMUNICATE_HEADER_32.
Thank you
Yao
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