Doug:
A picture says a 1000 words.
Well Done.
Ralph Cameron
- Original Message -
From: POWELL, DOUG doug.pow...@aei.com
To: rehel...@mmm.com; emc-p...@majordomo.ieee.org
Sent: Monday, January 22, 2001 11:40 AM
Subject: RE: Copper Thieving
I would like to add a little more
I would like to add a little more to this discussion.
Last August we had a serious problem occur when a board house arbitrarily
added thieving dots to one of our PCBs. This significantly reduced the
spacing requirement in a safe-unsafe area. As it turned out, we did not
catch the problem
Hi! Michael:
Thank you for your suggestion. It seems that copper fill that you and
several other guys mentioned does not applied in my board. For external
layers, you can implement the copper ring or, as other people suggested,
using copper fill but grounded it. In my case, I have a high-layer
...@majordomo.ieee.org
Subject: Re: Copper Thieving
How does electrically floating copper interact with electromagnetic fields?
David
---
This message is from the IEEE EMC Society Product Safety
Technical Committee emc-pstc discussion list.
To cancel your
: Re: Copper Thieving
Hi! Dan:
I understand that EMC guys don't want to see the floating coppers on the PCB
because of ESD and/or emission problem. But on the manufacture side, they
claim
that if you don't do copper balance on the layer where you have large area
without copper, you will sure
I agree - what is it? I tried looking it up in some of my PC design books at
the start of this one and came up blank. Does it go by another name?
-Original Message-
From: rehel...@mmm.com [mailto:rehel...@mmm.com]
Sent: Thursday, January 18, 2001 8:15 AM
To: emc-p...@majordomo.ieee.org
I make them ground it with appropriately spaced vias.
-Original Message-
From: Perry Qu [mailto:perry...@alcatel.com]
Sent: Thursday, January 18, 2001 4:19 PM
To: Roman, Dan
Cc: 'Stephen Phillips'; rehel...@mmm.com; emc-p...@majordomo.ieee.org;
DORIN OPREA
Subject: Re: Copper Thieving
. It has
lead to many arguments with the CAD department over the years!
-- Dan
-Original Message-
From: Stephen Phillips [mailto:step...@cisco.com]
Sent: Thursday, January 18, 2001 9:33 AM
To: rehel...@mmm.com; emc-p...@majordomo.ieee.org
Subject: Re: Copper Thieving
Copper
[mailto:step...@cisco.com]
Sent: Thursday, January 18, 2001 9:33 AM
To: rehel...@mmm.com; emc-p...@majordomo.ieee.org
Subject: Re: Copper Thieving
Copper applied to the outer PCB layers, in a pattern,
to even out the copper placement so the board is less
likely to warp through soldering. Obviously
to many arguments with the CAD department over the years!
-- Dan
-Original Message-
From: Stephen Phillips [mailto:step...@cisco.com]
Sent: Thursday, January 18, 2001 9:33 AM
To: rehel...@mmm.com; emc-p...@majordomo.ieee.org
Subject: Re: Copper Thieving
Copper applied to the outer PCB
]
Sent: Thursday, January 18, 2001 9:33 AM
To: rehel...@mmm.com; emc-p...@majordomo.ieee.org
Subject: Re: Copper Thieving
Copper applied to the outer PCB layers, in a pattern,
to even out the copper placement so the board is less
likely to warp through soldering. Obviously, it would
be put
...@majordomo.ieee.org
Subject: Re: Copper Thieving
Copper applied to the outer PCB layers, in a pattern,
to even out the copper placement so the board is less
likely to warp through soldering. Obviously, it would
be put where there is not etch, large open areas, to
somewhat offset where you
Copper applied to the outer PCB layers, in a pattern,
to even out the copper placement so the board is less
likely to warp through soldering. Obviously, it would
be put where there is not etch, large open areas, to
somewhat offset where you might have planes of
copper elsewhere on the
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