On Wed, Mar 28, 2018 at 06:49:09PM +0200, Luc Verhaegen wrote:
> On Wed, Mar 28, 2018 at 04:24:25PM +0200, Idwer Vollering wrote:
> > I took the liberty to submit this change to gerrit;
> > https://review.coreboot.org/#/c/flashrom/+/25396/
>
> Please fix the author.
Thanks!
Luc Verhaegen.
On Wed, Mar 28, 2018 at 04:24:25PM +0200, Idwer Vollering wrote:
> I took the liberty to submit this change to gerrit;
> https://review.coreboot.org/#/c/flashrom/+/25396/
Please fix the author.
Luc Verhaegen.
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I took the liberty to submit this change to gerrit;
https://review.coreboot.org/#/c/flashrom/+/25396/
2018-03-20 18:14 GMT+01:00 Luc Verhaegen :
> On Tue, Mar 20, 2018 at 02:27:54PM +0100, Luc Verhaegen wrote:
>>
>> What this board needs is a call to intel_ich_gpio20_raise();
>>
The patch worked. Thanks for your help!
Cheers,
Björn
Am 20.03.2018 um 18:14 schrieb Luc Verhaegen:
On Tue, Mar 20, 2018 at 02:27:54PM +0100, Luc Verhaegen wrote:
What this board needs is a call to intel_ich_gpio20_raise();
Will provide a patch later today.
Attached.
I am a bit worried
On Tue, Mar 20, 2018 at 02:27:54PM +0100, Luc Verhaegen wrote:
>
> What this board needs is a call to intel_ich_gpio20_raise();
>
> Will provide a patch later today.
Attached.
> I am a bit worried though that the lpc io BAR is empty in your lspci. I
> am not sure whether that is handled in
On Tue, Mar 20, 2018 at 12:22:02PM +0100, Björn Tantau wrote:
>
>
> Am 19. März 2018 18:21:36 MEZ schrieb Luc Verhaegen :
> >On Mon, Mar 19, 2018 at 05:01:06PM +0100, Björn Tantau wrote:
> >> Am 19.03.2018 um 00:08 schrieb Luc Verhaegen:
> >> >
> >> >My current hypothesis: smsc
On Mon, Mar 19, 2018 at 05:01:06PM +0100, Björn Tantau wrote:
> Am 19.03.2018 um 00:08 schrieb Luc Verhaegen:
> >
> >My current hypothesis: smsc at 0x480
> >
> >Action required: 0x48E |= 0x10.
> Do you want to scan for Super I/O sensors? (YES/no): Probing for Super-I/O at
> 0x2e/0x2f
> Trying
On Sun, Feb 25, 2018 at 11:49:40AM +0100, Luc Verhaegen wrote:
> On Thu, Feb 22, 2018 at 08:40:58PM +0100, Björn Tantau wrote:
> >
> > Reverse engineering seems to be the only option left. Unfortunately
> > I'm not well versed in these arcane arts. ;-)
>
> Your BIOS is an award and should be
On Thu, Feb 22, 2018 at 08:40:58PM +0100, Björn Tantau wrote:
>
> Reverse engineering seems to be the only option left. Unfortunately
> I'm not well versed in these arcane arts. ;-)
I held a talk about this in 2010 at FOSDEM.
Here is the pdf of it:
Is it possible for you to tear down your computer and directly attach
some test clip
to a BIOS chip (e.g. SOIC8 test clip if your BIOS chip is SOIC8 format) ?
That will bypass the write protection and no soldering is required. However,
if your BIOS chip has a weird format for which no test clip
Am 22. Februar 2018 17:56:31 MEZ schrieb Nico Huber :
>Hello Björn,
>
>On 20.02.2018 12:57, Björn Tantau wrote:
>> I tried to flash a new BIOS to my AOpen i965GMt-LA motherboard.
>Reading
>> the ROM worked, but flashing did not. I'll gladly give you more
>> information, just tell
Hello Björn,
On 20.02.2018 12:57, Björn Tantau wrote:
> Hi!
>
> I tried to flash a new BIOS to my AOpen i965GMt-LA motherboard. Reading
> the ROM worked, but flashing did not. I'll gladly give you more
> information, just tell me what you need. :-)
boards of that generation often have a
Hi!
I tried to flash a new BIOS to my AOpen i965GMt-LA motherboard. Reading
the ROM worked, but flashing did not. I'll gladly give you more
information, just tell me what you need. :-)
Cheers,
Björn
$ sudo flashrom --programmer internal -c "W39V040FA" -w IGC1B.BIN
flashrom v0.9.9-rc1-r1942
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