David O'Brien [EMAIL PROTECTED] wrote:
On Sun, Oct 28, 2001 at 02:06:00PM -, cameron grant wrote:
my system with dual 1.1ghz durons identifies as:
CPU: AMD Duron(tm) MP Processor (1110.94-MHz 686-class CPU)
Origin = AuthenticAMD Id = 0x670 Stepping = 0
Wonder why you
On 29-Oct-01 cameron grant wrote:
from what i can see, identcpu.c fetches the cpu name using a cpuid
instruction.
The part cpuid gives you is AuthenticAMD.
The fancy name is determined by switching on the Id.
read identcpu.c. you are correct for k6 and lesser processors. the code
from what i can see, identcpu.c fetches the cpu name using a cpuid
instruction.
The part cpuid gives you is AuthenticAMD.
The fancy name is determined by switching on the Id.
read identcpu.c. you are correct for k6 and lesser processors. the code in
question is around line 323:
Message -
From: David O'Brien [EMAIL PROTECTED]
To: cameron grant [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED]; [EMAIL PROTECTED];
[EMAIL PROTECTED]; [EMAIL PROTECTED];
[EMAIL PROTECTED];
[EMAIL PROTECTED]
Sent: Sunday, October 28, 2001 4:42 PM
Subject: Re: adding athlon xp to bsd.cpu.mk
On Sun, Oct 28
On Mon, Oct 29, 2001 at 10:29:00AM -0800, matt wrote:
any one know if my 4.3 stable work with all AMD
processors, as well as with SMP enabled?
Yes it will. I certifed 4.3 RELEASE (and thus 4.3-STABLE) on the SMP
Thunder for AMD.
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[EMAIL PROTECTED] writes:
how about the following patch (untested) regarding the newer athlon xp
processor type ? if needed, I could submit a PR.
AthlonXP is same as AthlonMP. It's better of the name palomino,
isn't it? (But morgan Duron will have same feature such
What about new Durons based on the Palomino core? The problem is
that as far as I know they have nothing in their name (like XP in
Athlon's case) that distinguishes them from older Durons based on
the Thunderbird core, while they do support SSE in addition to
3DNow and MMX. Perhaps it would
On Sun, 28 Oct 2001, Maxim Sobolev wrote:
AFAIK, not quite. The core name is Palomino and there are three
processors based on it: Athlon XP, Athlon MP and Duron.
The AMD Athlon XP, MP, and mobile Athlon4 are based on the Palomino
core. The 1Ghz+ Durons are based on the Morgan core, a Palomino
On Sun, Oct 28, 2001 at 01:49:05AM -0500, Chip Marshall wrote:
Couldn't a test be done on the Features information of the processor
to determine the best optimizations? Or would that break
cross-compiliation of optimized code?
So I compile something on my AMD box which I expect to run
only
On Sun, 28 Oct 2001, Cyrille Lefevre wrote:
Athlon (alias k7) already has MMX. the objective of this patch
was to add SSE to the set of XP (alias MP) processors.
I haven't seen the patch you're talking about, nor do I have any newer
Athlons here that support SSE, but it seems like it's pretty
On Sun, 28 Oct 2001, mikea wrote:
On Sun, Oct 28, 2001 at 01:49:05AM -0500, Chip Marshall wrote:
Couldn't a test be done on the Features information of the processor
to determine the best optimizations? Or would that break
cross-compiliation of optimized code?
So I compile something on my
On October 28, 2001, Maxim Sobolev sent me the following:
On Sun, 28 Oct 2001 02:30:40 +0200 (CEST), Cyrille Lefevre wrote:
Athlon XP (commercial name) == Athlon MP (core name)
AFAIK, not quite. The core name is Palomino and there are three
processors based on it: Athlon XP, Athlon MP and
On Sun, Oct 28, 2001 at 02:06:00PM -, cameron grant wrote:
my system with dual 1.1ghz durons identifies as:
CPU: AMD Duron(tm) MP Processor (1110.94-MHz 686-class CPU)
Origin = AuthenticAMD Id = 0x670 Stepping = 0
On 28-Oct-01 cameron grant wrote:
What about new Durons based on the Palomino core? The problem is
that as far as I know they have nothing in their name (like XP in
Athlon's case) that distinguishes them from older Durons based on
the Thunderbird core, while they do support SSE in addition
Hi,
how about the following patch (untested) regarding the newer athlon xp
processor type ? if needed, I could submit a PR.
Index: bsd.cpu.mk
===
RCS file: /home/ncvs/src/share/mk/bsd.cpu.mk,v
retrieving revision 1.2.2.4
diff -u
On Sat, Oct 27, 2001 at 10:00:44PM +0200, Cyrille Lefevre wrote:
: Hi,
:
: how about the following patch (untested) regarding the newer athlon xp
: processor type ? if needed, I could submit a PR.
Shouldn't Athlons and AthlonXPs be able to use i686 (pentiumpro)
instruction set optimizations?
On Sat, Oct 27, 2001 at 04:23:13PM -0400, Jerry A! wrote:
On Sat, Oct 27, 2001 at 10:00:44PM +0200, Cyrille Lefevre wrote:
: Hi,
:
: how about the following patch (untested) regarding the newer athlon xp
: processor type ? if needed, I could submit a PR.
Shouldn't Athlons and AthlonXPs be
Jerry A! wrote:
On Sat, Oct 27, 2001 at 10:00:44PM +0200, Cyrille Lefevre wrote:
: Hi,
:
: how about the following patch (untested) regarding the newer athlon xp
: processor type ? if needed, I could submit a PR.
Shouldn't Athlons and AthlonXPs be able to use i686 (pentiumpro)
Shouldn't Athlons and AthlonXPs be able to use i686 (pentiumpro)
instruction set optimizations?
No. They are different cpu cores that have different optimization
strategies.
Yes, all Athlons can use i686 code while the k6's can't. Further, without
doing any scientific testing, I would
On Sun, 28 Oct 2001 02:30:40 +0200 (CEST), Cyrille Lefevre wrote:
Peter Wemm wrote:
Jerry A! wrote:
On Sat, Oct 27, 2001 at 10:00:44PM +0200, Cyrille Lefevre wrote:
: Hi,
:
: how about the following patch (untested) regarding the newer athlon xp
: processor type ? if needed, I
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