Re: [Freedreno] [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting

Hi Sean Thanks for reviewing. Reply inline. On 2018-04-16 10:07, Sean Paul wrote: On Fri, Apr 13, 2018 at 03:04:48PM -0700, abhin...@codeaurora.org wrote: On 2018-04-13 14:10, abhin...@codeaurora.org wrote: > Hi Sean > > Thanks for the review. > > Reply inline. > > On 2018-04-13 13:26, Sean

Re: [Freedreno] [Intel-gfx] [PATCH 01/10] include: Move ascii85 functions from i915 to linux/ascii85.h

Chris Wilson writes: > Quoting Jordan Crouse (2018-04-05 23:06:53) >> On Thu, Apr 05, 2018 at 04:00:47PM -0600, Jordan Crouse wrote: >> > The i915 DRM driver very cleverly used ascii85 encoding for their >> > GPU state file. Move the encode functions to a general header

[Freedreno] [DPU PATCH 3/6] drm/msm: remove panel autorefresh support for SDM845

Remove autorefresh support for smart panels in SDM845 for now. It needs more discussion to figure out the user space communication to set preference for the feature. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 7 -

Re: [Freedreno] [[RFC]DPU PATCH 1/2] drm/bridge: add support for sn65dsi86 bridge driver

On Mon, Apr 16, 2018 at 11:32:50AM +0530, spa...@codeaurora.org wrote: > On 2018-04-14 00:59, Sean Paul wrote: > > On Fri, Apr 13, 2018 at 10:53:00AM +0530, Sandeep Panda wrote: > > > Add support for TI's sn65dsi86 dsi2edp bridge chip. > > > The chip converts DSI transmitted signal to eDP signal,

Re: [Freedreno] [DPU PATCH 2/2] drm/panel: add backlight control support for truly panel

On Fri, Apr 13, 2018 at 01:59:29PM -0700, abhin...@codeaurora.org wrote: > Hi Sean > > Thanks for the comments. > > Some replies inline. > > On 2018-04-13 13:46, Sean Paul wrote: > > On Sat, Apr 07, 2018 at 12:06:53AM -0700, Abhinav Kumar wrote: > > > Register truly panel as a backlight led

[Freedreno] [DPU PATCH 2/6] drm/msm: remove support for ping pong split topology

Ping pong split topology was meant for low end soc's which doesn't have enough layer mixers to support split panels. Considering how uncommon the topology is for current chipset's and also to simply the driver programming, striping off the support for SDM845. Signed-off-by: Jeykumar Sankaran

[Freedreno] [DPU PATCH 0/6] Switch DPU to use upstream DSI driver for SDM845

SDM845 DPU driver was talking to dsi-staging driver for its dsi operations through the customized dpu_connector layer. The following series of patches removes DPU dependency from various dpu connector API's before purging the dpu_connector altogether. It also completes the switch to upstream DSI

[Freedreno] [DPU PATCH 5/6] drm/msm: hook up DPU with upstream DSI

Switch DPU from dsi-staging to upstream dsi driver. To make the switch atomic, this change includes: - remove dpu connector layers - clean up dpu connector dependencies in encoder/crtc - compile out writeback and display port drivers - compile out dsi-staging driver (separate patch submitted to

[Freedreno] [DPU PATCH 1/6] drm/msm: remove display stream compression(DSC) support for SM845

Upstream DSI driver doesn't support DSC panels yet. Remove the support for compression from DPU for now. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_connector.c | 4 -

[Freedreno] [DPU PATCH 4/6] drm/msm: strip down custom event ioctl's

Remove custom ioctl support in SDM845 which allows user space to register/unregister for hw events. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 218 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 1 -

Re: [Freedreno] [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting

On Fri, Apr 13, 2018 at 03:04:48PM -0700, abhin...@codeaurora.org wrote: > On 2018-04-13 14:10, abhin...@codeaurora.org wrote: > > Hi Sean > > > > Thanks for the review. > > > > Reply inline. > > > > On 2018-04-13 13:26, Sean Paul wrote: > > > On Tue, Apr 10, 2018 at 06:54:06PM -0700, Abhinav

Re: [Freedreno] [DPU PATCH v2 1/2] drm/msm/dsi: check video mode engine status before waiting

On Mon, Apr 16, 2018 at 10:44:57AM -0700, abhin...@codeaurora.org wrote: > Hi Sean > > Thanks for reviewing. > > Reply inline. > > On 2018-04-16 10:07, Sean Paul wrote: > > On Fri, Apr 13, 2018 at 03:04:48PM -0700, abhin...@codeaurora.org wrote: > > > On 2018-04-13 14:10,

Re: [Freedreno] [[RFC]DPU PATCH 2/2] dt-bindings: drm/bridge: Document sn65dsi86 bridge bindings

On Fri, Apr 13, 2018 at 10:53:01AM +0530, Sandeep Panda wrote: > Document the bindings used for the sn65dsi86 DSI to eDP bridge. > > Signed-off-by: Sandeep Panda > --- > .../bindings/display/bridge/ti,sn65dsi86.txt | 75 > ++ > 1 file changed,

Re: [Freedreno] [[RFC]DPU PATCH] drm/bridge: add sn65dsi86 bridge driver support

Hi, On 09.04.2018 12:46, Sandeep Panda wrote: > Add support for TI's sn65dsi86 dsi2edp bridge chip. > The chip converts DSI transmitted signal to eDP signal, > which is fed to the connected eDP panel. Add info about control bus. It looks like the chip can be controlled via i2c, dsi or both, am

Re: [Freedreno] [DPU PATCH v2 2/2] drm/panel: add backlight control support for truly panel

Hi Bjorn Thanks for the review. Reply inline. On 2018-04-16 09:41, Bjorn Andersson wrote: On Sat 14 Apr 00:25 PDT 2018, Abhinav Kumar wrote: Register truly panel as a backlight led device and provide methods to control its backlight operation. Changes in v2: - Removed redundant NULL checks

Re: [Freedreno] [[RFC]DPU PATCH 1/2] drm/bridge: add support for sn65dsi86 bridge driver

On 2018-04-14 00:59, Sean Paul wrote: On Fri, Apr 13, 2018 at 10:53:00AM +0530, Sandeep Panda wrote: Add support for TI's sn65dsi86 dsi2edp bridge chip. The chip converts DSI transmitted signal to eDP signal, which is fed to the connected eDP panel. This chip can be controlled via either i2c

[Freedreno] [DPU PATCH v2 0/2] Connector virtualization for Dual-DSI

This patch series adds support to DSI connector virtualization for Dual-DSI configuration. These changes have been tested using dual-dsi truly panel on sdm845 platform. Additional changes that will be needed to have end-to-end functionality: --> DSI6G-v2 changes:

[Freedreno] [DPU PATCH v2 2/2] drm/msm/dsi: Use one connector for dual DSI mode

Current DSI driver uses two connectors for dual DSI case even though we only have one panel. Fix this by implementing one connector/bridge for dual DSI use case. Use master DSI controllers to register one connector/bridge. Changes in V2: -Removed Change-Id from the commit text tags.

[Freedreno] [DPU PATCH] drm/msm/dsi: check return value for video done waits

Check for the return value of wait for video done waits and print appropriate error message. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/dsi/dsi_host.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c

[Freedreno] [DPU PATCH v3 1/2] drm/msm/dsi: check video mode engine status before waiting

Make sure the video mode engine is on before waiting for the video done interrupt. Changes in v2: - Replace pr_err with dev_err - Changed error message Changes in v3: - Move the return value check to another patch Signed-off-by: Abhinav Kumar ---

[Freedreno] [DPU PATCH v3 2/2] drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY

Currently the DSI PHY timings are hard-coded for a specific panel for the 10nm PHY. Replace this with the auto PHY timing calculator which can calculate the PHY timings for any panel. Changes in v3: - None Changes in v2: - None Reviewed-by: Sean Paul Reviewed-by: Archit