[Freedreno] [PATCH] drm/msm/dp: Drop unnecessary NULL checks after container_of

2021-05-24 Thread Guenter Roeck
The result of container_of() operations is never NULL unless the embedded element is the first element of the structure. This is not the case here. The NULL check on the result of container_of() is therefore unnecessary and misleading. Remove it. This change was made automatically with the

Re: [Freedreno] [PATCH v18 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings

2021-05-24 Thread Rob Herring
On Mon, 24 May 2021 17:14:11 +0530, Krishna Manikandan wrote: > Add YAML schema for the device tree bindings for DSI > > Signed-off-by: Krishna Manikandan > Reviewed-by: Bjorn Andersson > Reviewed-by: Stephen Boyd > --- > Changes in v1: > - Separate dsi controller bindings to a separate

Re: [Freedreno] [PATCH v2 6/6] drm/msm/dpu: simplify IRQ enabling/disabling

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: Merge dpu_core_irq_enable() into dpu_core_irq_register_callback() and dpu_core_irq_disable() into dpu_core_irq_unregister_callback(), because they are called in pairs. There is no need to have separate enable/disable pair, we can enable hardware IRQ

Re: [Freedreno] [PATCH v2 4/6] drm/msm/dpu: replace IRQ lookup with the data in hw catalog

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: The IRQ table in the dpu_hw_interrupts.h is big, ugly, and hard to maintain. There are only few interrupts used from that table. Newer generations use different IRQ locations. Move this data to hw catalog. I think you can drop the line that "only few

Re: [Freedreno] [PATCH v2 3/6] drm/msm/dpu: define interrupt register names

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: In order to make mdss_irqs readable (and error-prone) define names for I think you meant "less error-prone" here. interrupt register indices. Signed-off-by: Dmitry Baryshkov With that nit fixed, Reviewed-by: Abhinav Kumar ---

Re: [Freedreno] [PATCH v2 2/6] drm/msm/dpu: hw_intr: always call dpu_hw_intr_clear_intr_status_nolock

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: Always call dpu_hw_intr_clear_intr_status_nolock() from the dpu_hw_intr_dispatch_irqs(). This simplifies the callback function (which call clears the interrupts anyway) and enforces clearing the hw interrupt status. In the subject line you can

Re: [Freedreno] [PATCH v2 1/6] drm/msm/dpu: merge dpu_hw_intr_get_interrupt_statuses into dpu_hw_intr_dispatch_irqs

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: There is little sense in reading interrupt statuses and right after that going after the array of statuses to dispatch them. Merge both loops into single function doing read and dispatch. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson

Re: [Freedreno] [PATCH 3/3] drm/msm/dp: Handle aux timeouts, nacks, defers

2021-05-24 Thread khsieh
On 2021-05-07 14:25, Stephen Boyd wrote: Let's look at the irq status bits after a transfer and see if we got a nack or a defer or a timeout, instead of telling drm layers that everything was fine, while still printing an error message. I wasn't sure about NACK+DEFER so I lumped all those

Re: [Freedreno] [PATCH 3/3] drm/msm/dp: Handle aux timeouts, nacks, defers

2021-05-24 Thread khsieh
On 2021-05-24 12:19, Stephen Boyd wrote: Quoting khs...@codeaurora.org (2021-05-24 09:33:49) On 2021-05-07 14:25, Stephen Boyd wrote: > @@ -367,36 +347,38 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux > *dp_aux, > } > > ret = dp_aux_cmd_fifo_tx(aux, msg); > - > if (ret <

Re: [Freedreno] [PATCH 3/3] drm/msm/dp: Handle aux timeouts, nacks, defers

2021-05-24 Thread Stephen Boyd
Quoting khs...@codeaurora.org (2021-05-24 09:33:49) > On 2021-05-07 14:25, Stephen Boyd wrote: > > @@ -367,36 +347,38 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux > > *dp_aux, > > } > > > > ret = dp_aux_cmd_fifo_tx(aux, msg); > > - > > if (ret < 0) { > > if

Re: [Freedreno] [PATCH 3/3] drm/msm/dp: Handle aux timeouts, nacks, defers

2021-05-24 Thread khsieh
On 2021-05-07 14:25, Stephen Boyd wrote: Let's look at the irq status bits after a transfer and see if we got a nack or a defer or a timeout, instead of telling drm layers that everything was fine, while still printing an error message. I wasn't sure about NACK+DEFER so I lumped all those

Re: [Freedreno] [PATCH 2/3] drm/msm/dp: Shrink locking area of dp_aux_transfer()

2021-05-24 Thread khsieh
On 2021-05-07 14:25, Stephen Boyd wrote: We don't need to hold the lock to inspect the message we're going to transfer, and we don't need to clear the busy flag either. Take the lock later and bail out earlier if conditions aren't met. Cc: Dmitry Baryshkov Cc: Abhinav Kumar Cc: Kuogee Hsieh

Re: [Freedreno] [PATCH 1/3] drm/msm/dp: Simplify aux irq handling code

2021-05-24 Thread khsieh
On 2021-05-07 14:25, Stephen Boyd wrote: We don't need to stash away 'isr' in the aux structure to pass to two functions. Let's use a local variable instead. And we can complete the completion variable in one place instead of two to simplify the code. Cc: Dmitry Baryshkov Cc: Abhinav Kumar

Re: [Freedreno] [RFC PATCH 02/13] dt-bindings: msm/dsi: Document Display Stream Compression (DSC) parameters

2021-05-24 Thread Bjorn Andersson
On Mon 24 May 02:30 CDT 2021, Vinod Koul wrote: > On 21-05-21, 09:42, Bjorn Andersson wrote: > > On Fri 21 May 07:49 CDT 2021, Vinod Koul wrote: > > > > > DSC enables streams to be compressed before we send to panel. This > > > requires DSC enabled encoder and a panel to be present. So we add

[Freedreno] [PATCH v18 1/4] dt-bindings: msm: disp: add yaml schemas for DPU bindings

2021-05-24 Thread Krishna Manikandan
MSM Mobile Display Subsystem (MDSS) encapsulates sub-blocks like DPU display controller, DSI etc. Add YAML schema for DPU device tree bindings. Signed-off-by: Krishna Manikandan Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd --- Changes in v2: - Changed

[Freedreno] [PATCH v18 2/4] dt-bindings: msm: dsi: add yaml schemas for DSI bindings

2021-05-24 Thread Krishna Manikandan
Add YAML schema for the device tree bindings for DSI Signed-off-by: Krishna Manikandan Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd --- Changes in v1: - Separate dsi controller bindings to a separate patch (Stephen Boyd) - Merge dsi-common-controller.yaml and

[Freedreno] [PATCH v18 4/4] dt-bindings: msm/dp: Add bindings of MSM DisplayPort controller

2021-05-24 Thread Krishna Manikandan
Add bindings for Snapdragon DisplayPort controller driver. Signed-off-by: Chandan Uddaraju Signed-off-by: Vara Reddy Signed-off-by: Tanmay Shah Signed-off-by: Kuogee Hsieh Signed-off-by: Krishna Manikandan Reviewed-by: Bjorn Andersson Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd ---

[Freedreno] [PATCH v18 3/4] dt-bindings: msm: dsi: add yaml schemas for DSI PHY bindings

2021-05-24 Thread Krishna Manikandan
Add YAML schema for the device tree bindings for DSI PHY. Signed-off-by: Krishna Manikandan Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Reviewed-by: Rob Herring --- Changes in v1: - Merge dsi-phy.yaml and dsi-phy-10nm.yaml (Stephen Boyd) - Remove

Re: [Freedreno] [RFC PATCH 02/13] dt-bindings: msm/dsi: Document Display Stream Compression (DSC) parameters

2021-05-24 Thread Vinod Koul
On 21-05-21, 09:42, Bjorn Andersson wrote: > On Fri 21 May 07:49 CDT 2021, Vinod Koul wrote: > > > DSC enables streams to be compressed before we send to panel. This > > requires DSC enabled encoder and a panel to be present. So we add this > > information in board DTS and find if DSC can be

Re: [Freedreno] [RFC PATCH 01/13] drm/dsc: Add dsc pps header init function

2021-05-24 Thread Vinod Koul
On 21-05-21, 17:29, Daniel Vetter wrote: > On Fri, May 21, 2021 at 06:19:30PM +0530, Vinod Koul wrote: > > We required a helper to create and set the dsc_dce_header, so add the > > dsc_dce_header and API drm_dsc_dsi_pps_header_init > > > > Signed-off-by: Vinod Koul > > --- > >

Re: [Freedreno] [PATCH 7/7] drm/msm: Migrate to aggregate driver

2021-05-24 Thread Stephen Boyd
Quoting Daniel Vetter (2021-05-20 12:58:52) > On Wed, May 19, 2021 at 05:25:19PM -0700, Stephen Boyd wrote: > > @@ -1306,7 +1322,8 @@ static int msm_pdev_probe(struct platform_device > > *pdev) > > if (ret) > > goto fail; > > > > - ret =

Re: [Freedreno] [PATCH 3/7] component: Introduce struct aggregate_device

2021-05-24 Thread Stephen Boyd
Quoting Saravana Kannan (2021-05-20 13:20:45) > On Wed, May 19, 2021 at 5:25 PM Stephen Boyd wrote: > > > > - master->parent = parent; > > - master->ops = ops; > > - master->match = match; > > + id = ida_alloc(_ida, GFP_KERNEL); > > + if (id < 0) { > > +