Re: [Freedreno] [PATCH v2 3/6] drm/msm/dpu: define interrupt register names

2021-05-24 Thread abhinavk
On 2021-05-16 13:29, Dmitry Baryshkov wrote: In order to make mdss_irqs readable (and error-prone) define names for I think you meant "less error-prone" here. interrupt register indices. Signed-off-by: Dmitry Baryshkov With that nit fixed, Reviewed-by: Abhinav Kumar ---

[Freedreno] [PATCH v2 3/6] drm/msm/dpu: define interrupt register names

2021-05-16 Thread Dmitry Baryshkov
In order to make mdss_irqs readable (and error-prone) define names for interrupt register indices. Signed-off-by: Dmitry Baryshkov --- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 45 --- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 18 2 files changed, 58