Re: [Freetel-codec2] 4FSK/FreeDV

2020-06-22 Thread David Rowe
Hi Glen, First of all, some definitions: FreeDV is an open source digital voice protocol that integrates the modems, codecs, and FEC. FreeDV is available as a GUI application, an open source library (FreeDV API), and in hardware (the SM1000 FreeDV adaptor). So I think you are asking "is there

Re: [Freetel-codec2] VHF/UHF data physical layer testing

2020-06-22 Thread Steve
On Sun, Jun 21, 2020 at 5:37 PM Al Beard wrote: > > Have you seen the Ham Radio Mesh network: It looks like interest is waning as a lot of those nodes haven't been updated for 5 years. I know the ones around me are all dead. It's kind of expensive for the range. Many of the nodes depended on

Re: [Freetel-codec2] LPCNET on Xilinx FPGA

2020-06-22 Thread Al Beard
Hi all, LPCNet and mode 2020 Can the modem process be separated from the "decode to audio" process? If the audio generation process in Rx could not miss Rx packets I believe this would help. ie. modem feeds into FIFO, LPCNet reads FIFO. Is this feasible? Alan VK2ZIW On Mon, 22 Jun 2020

Re: [Freetel-codec2] LPCNET on Xilinx FPGA

2020-06-22 Thread glen english
Hi David OK on the CPU load of LPCnet. One thing Codec2 700D has shown is that high performance speech coding can be done at VERY low power consumption. That is a pretty deal for many tasks and applications. That's really important. If LPCnet203 consumes that much of the AVX512 on a large,

[Freetel-codec2] 4FSK/FreeDV

2020-06-22 Thread glen english
David, is there a tie-up (IE an implementation that can be hung together)  with your 4FSK modem, LDPC  and FreeDV with 700D or 2020 ? -glen On 22/06/2020 9:31 pm, David ___ Freetel-codec2 mailing list Freetel-codec2@lists.sourceforge.net

Re: [Freetel-codec2] LPCNET on Xilinx FPGA

2020-06-22 Thread David Rowe
Hi Glen, Codec 2 runs well on small floating point uCs, so not much to be gained there in a FPGA implementation. A few years ago Danilo did some fine work on making it run faster on the stm32 but that's been the last real effort. It's probably fast enough. Most of the LPCNet CPU load is in some

Re: [Freetel-codec2] LPCNET on Xilinx FPGA

2020-06-22 Thread Al Beard
Hi Glen, Greg, Steve, Onno and David, With such cheap Pi and Pi clone boards, is there a way to use more of their CPU "horsepower" such as other CPU cores or perhaps the GPU? The Odroid N2 here 'nearly' runs mode 2020 in the Freedv GUI decoding the sample WAV file. With only Fujitsu making a

Re: [Freetel-codec2] FreeDV Tx power PAPR- SM1000

2020-06-22 Thread glen english
Hi Greg I did mention that  I was only considering computing the PAPR, and then if it exceeded some threshold, produce a new sequence... On the likelihood you wont get another bad one.  IE a gamble. I'm interested that you are considering what can be done at the receiver end to improve