Re: [RFC][PATCH]Merge VEC_COND_EXPR into MASK_STORE after loop vectorization

2018-11-20 Thread Renlin Li
Hi Richard, On 11/14/2018 02:59 PM, Richard Biener wrote: On Fri, Nov 9, 2018 at 4:49 PM Renlin Li wrote: Hi Richard, On 11/09/2018 11:48 AM, Richard Biener wrote: On Thu, Nov 8, 2018 at 5:55 PM Renlin Li wrote: Hi Richard, I don't see the masked load here on x86_64 btw. (I don't see

Re: [PATCH] Come up with gcc/testsuite/g++.target/i386/i386.dg and move there some tests.

2018-11-16 Thread Renlin Li
Hi Martin, Seems the change is not checked in yet? Thanks, Renlin On 10/22/2018 01:22 PM, Martin Liška wrote: On 10/22/18 12:09 PM, Jakub Jelinek wrote: On Mon, Oct 22, 2018 at 12:04:23PM +0200, Martin Liška wrote: I noticed that before the tests were run with all of

Re: [Patch, libstdc++.exp]Update the usage of cached result, rebuild nlocale wrapper for each variant.

2018-11-16 Thread Renlin Li
On 11/16/2018 01:20 PM, Jonathan Wakely wrote: On 16/11/18 10:42 +, Renlin Li wrote: Hi all, Please remember that all patches for libstdc++ must be sent to the libstdc++ list, as documented at https://gcc.gnu.org/lists.html Just CCing me is not enough. Hi Jonathan, I knew I missed

[Patch, libstdc++.exp]Update the usage of cached result, rebuild nlocale wrapper for each variant.

2018-11-16 Thread Renlin Li
with default unix variant. There is no change on the result. Okay to commit? Regards, Renlin gcc/libstdc++-v3/: 2018-11-16 Renlin Li Tejas Belagod testsuite/lib/libstdc++.exp (check_v3_target_prop_cached): New proc. (check_v3_target): Use

Re: [PATCH][LRA] Fix PR87899: r264897 cause mis-compiled native arm-linux-gnueabihf toolchain

2018-11-13 Thread Renlin Li
related issues are fixed. Thanks for fixing it! Regards, Renlin On 11/12/2018 08:25 PM, Peter Bergner wrote: On 11/12/18 6:25 AM, Renlin Li wrote: I tried to build a native arm-linuxeabihf toolchain with the patch. But I got the following ICE: Ok, the issue was a problem in handling the src

Re: [PATCH][LRA] Fix PR87899: r264897 cause mis-compiled native arm-linux-gnueabihf toolchain

2018-11-12 Thread Renlin Li
Hi Peter, Thanks for the patch! It makes much more sense to me to split those functions, and use them separately. I tried to build a native arm-linuxeabihf toolchain with the patch. But I got the following ICE: /home/renlin/try-new/./gcc/xgcc -B/home/renlin/try-new/./gcc/

Re: [RFC][PATCH]Merge VEC_COND_EXPR into MASK_STORE after loop vectorization

2018-11-09 Thread Renlin Li
Hi Richard, On 11/09/2018 11:48 AM, Richard Biener wrote: On Thu, Nov 8, 2018 at 5:55 PM Renlin Li wrote: Hi Richard, *However*, after I rebased my patch on the latest trunk. Got the following dump from ifcvt: [local count: 1006632961]: # i_20 = PHI # ivtmp_18 = PHI a_10

[AARCH64][SVE]Add extract_last for mask/predicates mode register

2018-11-08 Thread Renlin Li
to be discovered/fixed. Regards, Renlin gcc/ChangeLog: 2018-11-08 Renlin Li * config/aarch64/aarch64-sve.md (extract_last): Add new modes. * config/aarch64/iterators.md (PREDV): predicate mode to vector mode mapping. (predv): Likewise, lower case. gcc/testsuite

Re: [RFC][PATCH]Merge VEC_COND_EXPR into MASK_STORE after loop vectorization

2018-11-08 Thread Renlin Li
Hi Richard, On 11/08/2018 12:09 PM, Richard Biener wrote: On Thu, Nov 8, 2018 at 12:02 PM Renlin Li wrote: Hi all, When allow-store-data-races is enabled, ifcvt would prefer to generated conditional select and unconditional store to convert certain if statement into: _ifc_1 = val _ifc_2

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-08 Thread Renlin Li
Hi Peter, On 11/08/2018 03:21 PM, Peter Bergner wrote: On 11/8/18 4:57 AM, Renlin Li wrote: I think I found the problem! As described in the PR, a hard register is used in an pre/post modify expression. The hard register is live, but updated. In this case, we should make it conflicting

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-08 Thread Renlin Li
Hi Peter, On 11/08/2018 12:35 PM, Peter Bergner wrote: On 11/8/18 4:57 AM, Renlin Li wrote: I think I found the problem! As described in the PR, a hard register is used in an pre/post modify expression. The hard register is live, but updated. In this case, we should make it conflicting

[RFC][PATCH]Merge VEC_COND_EXPR into MASK_STORE after loop vectorization

2018-11-08 Thread Renlin Li
transformation. Any thoughts on the best way to fix the issue? This patch has been tested with aarch64-none-elf, no regressions. Regards, Renlin gcc/ChangeLog: 2018-11-08 Renlin Li * tree-vectorizer.h (combine_sel_mask_store): Declare new function. * tree-vect-loop.c

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-08 Thread Renlin Li
Hi, On 11/06/2018 06:58 PM, Jeff Law wrote: On 11/6/18 3:52 AM, Renlin Li wrote: Hi Jeff & Peter, On 11/05/2018 07:41 PM, Jeff Law wrote: On 11/5/18 12:36 PM, Peter Bergner wrote: On 11/5/18 1:20 PM, Jeff Law wrote: On 11/1/18 4:07 PM, Peter Bergner wrote: On 11/1/18 1:50 PM, Renli

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-06 Thread Renlin Li
Hi Ramana, On 11/06/2018 10:57 AM, Ramana Radhakrishnan wrote: On Tue, Nov 6, 2018 at 10:52 AM Renlin Li wrote: Hi Jeff & Peter, On 11/05/2018 07:41 PM, Jeff Law wrote: On 11/5/18 12:36 PM, Peter Bergner wrote: On 11/5/18 1:20 PM, Jeff Law wrote: On 11/1/18 4:07 PM, Peter Bergner w

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-06 Thread Renlin Li
Hi Jeff & Peter, On 11/05/2018 07:41 PM, Jeff Law wrote: On 11/5/18 12:36 PM, Peter Bergner wrote: On 11/5/18 1:20 PM, Jeff Law wrote: On 11/1/18 4:07 PM, Peter Bergner wrote: On 11/1/18 1:50 PM, Renlin Li wrote: Is there any update on this issues? arm-none-linux-gnueabihf native toolc

Re: [PATCH] combine: Do not combine moves from hard registers

2018-11-05 Thread Renlin Li
On 11/05/2018 12:35 PM, Renlin Li wrote: Hi Segher, On 11/03/2018 02:34 AM, Jeff Law wrote: On 11/2/18 5:54 PM, Segher Boessenkool wrote: On Fri, Nov 02, 2018 at 06:03:20PM -0500, Segher Boessenkool wrote: The original rtx is generated by expand_builtin_setjmp_receiver to adjust the frame

Re: [PATCH] combine: Do not combine moves from hard registers

2018-11-05 Thread Renlin Li
Hi Segher, On 11/03/2018 02:34 AM, Jeff Law wrote: On 11/2/18 5:54 PM, Segher Boessenkool wrote: On Fri, Nov 02, 2018 at 06:03:20PM -0500, Segher Boessenkool wrote: The original rtx is generated by expand_builtin_setjmp_receiver to adjust the frame pointer. And later in LRA, it will try to

Re: [PATCH] combine: Do not combine moves from hard registers

2018-11-02 Thread Renlin Li
Hi Segher, I find a problem with your change to add make_more_copies. I am investigating those regressions, a big amount of them are wrong code generation. One problem is that, make_more_copies will split the assignment of fp to sfp. From: (insn 48 26 28 5 (set (reg/f:SI 102 sfp)

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-02 Thread Renlin Li
Hi Peter, On 11/01/2018 10:07 PM, Peter Bergner wrote: On 11/1/18 1:50 PM, Renlin Li wrote: Is there any update on this issues? arm-none-linux-gnueabihf native toolchain has been mis-compiled for a while. From the analysis I've done, my commit is just exposing latent issues in LRA. Yes

Re: [PATCH 2/2 v3][IRA,LRA] Fix PR86939, IRA incorrectly creates an interference between a pseudo register and a hard register

2018-11-01 Thread Renlin Li
Hi Peter, Is there any update on this issues? arm-none-linux-gnueabihf native toolchain has been mis-compiled for a while. I got the following dump from the test case. x1 is an early clobber operand in the inline assembly statement, r92 should conflict with x1? ;; a0(r93,l0) conflicts:

[PR87815]Don't generate shift sequence for load replacement in DSE when the mode size is not compile-time constant

2018-10-31 Thread Renlin Li
processing. We need to improve that. aarch64 sve test Okay, Okay to commit? Regards, Renlin gcc/ChangeLog: 2018-10-31 Renlin Li PR target/87815 * dse.c (get_stored_val): Add check for compile-time constantness of gap. gcc/testsuite/ChangeLog: 2018-10-31 Renlin Li

Re: [PATCH] Initial commit of Networking TS implementation

2018-10-18 Thread Renlin Li
Hi Jonathan, I saw those tests failed to compile on baremetal targets with the following error: ``` libstdc++-v3/include/experimental/io_context:45: fatal error: poll.h: No such file or directory ``` Should we add a check to prevent it from running on unsupported platforms? Thanks! Renlin

[AARCH64]Don't force symbols which referencing per-function literal pool into memory

2018-10-16 Thread Renlin Li
should be applicable at O0 optimization level for all memory models (tiny, small and large). Okay to commit? gcc/ChangeLog: 2018-10-15 Renlin Li * config/aarch64/aarch64.c (aarch64_classify_symbol): Direct address symbols referencing per function literl pool. gcc/testsuit

[PR87563][AARCH64-SVE]: Don't keep ifcvt loop when COND_ ifn could not be vectorized.

2018-10-12 Thread Renlin Li
extension, I only run the aarch64-sve testsuites, no change to the result. Okay to commit? Regards, Renlin gcc/ChangeLog: 2018-10-12 Renlin Li PR target/87563 * tree-vectorizer.c (try_vectorize_loop_1): Don't use if-conversioned loop when it contains ifn with types

Re: [PATCH] Redirect call within specific target attribute among MV clones (PR ipa/82625).

2018-10-08 Thread Renlin Li
Hi Martin, pr82625.C failed on compiler builds which don't support "default" and "avx" target. For example, arm/aarch64 native linux gcc compiler. As I found in this gcc wiki: https://gcc.gnu.org/wiki/FunctionMultiVersioning ''' This support is available in GCC 4.8 and later. Support is only

Re: [PATCH][PR84877]Dynamically align the address for local parameter copy on the stack when required alignment is larger than MAX_SUPPORTED_STACK_ALIGNMENT

2018-07-23 Thread Renlin Li
Hi Jeff, On 06/29/2018 08:34 PM, Jeff Law wrote: On 03/22/2018 05:56 AM, Renlin Li wrote: Hi all, As described in PR84877. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877 The local copy of parameter on stack is not aligned. For BLKmode paramters, a local copy on the stack will be saved

Re: Re: [GCC][PATCH][Aarch64] Exploiting BFXIL when OR-ing two AND-operations with appropriate bitmasks

2018-07-23 Thread Renlin Li
+(define_insn "*aarch64_bfxil" + [(set (match_operand:GPI 0 "register_operand" "=r,r") +(ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "r,0") + (match_operand:GPI 3 "const_int_operand" "n, Ulc")) + (and:GPI (match_operand:GPI 2 "register_operand" "0,r")

Re: [PATCH]Correct comment for ADDR_EXPR tree code.

2018-03-24 Thread Renlin Li
Hi Jeff, On 23/03/18 23:19, Jeff Law wrote: On 03/23/2018 09:44 AM, Renlin Li wrote: Hi all, This is a simple patch to correct the comment for ADDR_EXPR tree code. The resulting expression of ADDR_EXPR is a tree with POINTER_TYPE. So the result mode should ptr_mode instead of Pmode. As far

[PATCH]Correct comment for ADDR_EXPR tree code.

2018-03-23 Thread Renlin Li
(or address?). Okay to commit? Regards, Renlin gcc/ChangeLog: 2018-03-23 Renlin Li <renlin...@arm.com> * tree.def (ADDR_EXPR): Correct the commnet. diff --git a/gcc/tree.def b/gcc/tree.def index 31de6c0994de43c175b924d4ba578a131fb4d524..1e5aca811f801c54be9215a9d86028f50a4ec608

Re: [PATCH][PR84877]Dynamically align the address for local parameter copy on the stack when required alignment is larger than MAX_SUPPORTED_STACK_ALIGNMENT

2018-03-22 Thread Renlin Li
Hi H.J. On 22/03/18 12:55, H.J. Lu wrote: On Thu, Mar 22, 2018 at 5:52 AM, H.J. Lu <hjl.to...@gmail.com> wrote: On Thu, Mar 22, 2018 at 4:56 AM, Renlin Li <renlin...@foss.arm.com> wrote: Hi all, As described in PR84877. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877 Th

[PATCH][PR84877]Dynamically align the address for local parameter copy on the stack when required alignment is larger than MAX_SUPPORTED_STACK_ALIGNMENT

2018-03-22 Thread Renlin Li
-linux, arm-none-eabi, aarch64-one-elf regression test Okay. linux-armhf bootstrap Okay. I assume there are other targets which will be affected by the change. But I don't have environment to test. Okay the commit? Regards, Renlin gcc/ 2018-03-22 Renlin Li <renlin...@arm.

Re: BLKmode parameters are stored in unaligned stack slot when passed via registers.

2018-03-12 Thread Renlin Li
Hi Jeff, On 07/03/18 17:02, Jeff Law wrote: On 03/06/2018 08:21 AM, Renlin Li wrote: Hi all, The problem described here probably only affects targets whose ABI allow to pass structured arguments of certain size via registers. If the mode of the parameter type is BLKmode, in the callee

[PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.

2018-03-07 Thread Renlin Li
to commit the patch? Regards, Renlin gcc/ChangeLog: 2018-03-07 Renlin Li <renlin...@arm.com> * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to aarch64_output_scalar_simd_mov_immediate. gcc/testsuite/ChangeLog: 2018-03-07 Renlin Li <renlin..

Re: BLKmode parameters are stored in unaligned stack slot when passed via registers.

2018-03-06 Thread Renlin Li
Hi Richard, On 06/03/18 16:04, Richard Biener wrote: On Tue, Mar 6, 2018 at 4:21 PM, Renlin Li <renlin...@arm.com> wrote: Hi all, The problem described here probably only affects targets whose ABI allow to pass structured arguments of certain size via registers. If the mode of the par

BLKmode parameters are stored in unaligned stack slot when passed via registers.

2018-03-06 Thread Renlin Li
Hi all, The problem described here probably only affects targets whose ABI allow to pass structured arguments of certain size via registers. If the mode of the parameter type is BLKmode, in the callee, during RTL expanding, a stack slot will be reserved for this parameter, and the incoming

Re: [PR83370][AARCH64]Use tighter register constraints for sibcall patterns.

2018-02-01 Thread Renlin Li
Hi James, Thanks for the review! I committed it on trunk. Is it Okay to backport this patch to release branch 5, 6,7? It applies cleanly without any logic changes. Regards, Renlin On 31/01/18 17:56, James Greenhalgh wrote: On Tue, Jan 30, 2018 at 03:45:17PM +, Renlin Li wrote: Hi

Re: [PATCH] have -Wformat-overflow handle -fexec-charset (PR 80503)

2018-02-01 Thread Renlin Li
Hi Martin, On 01/02/18 00:40, Martin Sebor wrote: On 01/31/2018 10:36 AM, Renlin Li wrote: Hi there, I have a patch to fix to regressions we observed in armhf native environment. To effectively check out of range for format string, a target type should be used. And according to the standard

Re: Re: [PATCH] have -Wformat-overflow handle -fexec-charset (PR 80503)

2018-01-31 Thread Renlin Li
to commit? Regards, Renlin gcc/ChangeLog: 2018-01-31 Renlin Li <renlin...@arm.com> * gimple-ssa-sprintf.c (target_strtol10): Use target integer to check the range. Rename it into (target_strtoi10): This. (parse_directive): Compare with target int max in

Re: [PR83370][AARCH64]Use tighter register constraints for sibcall patterns.

2018-01-30 Thread Renlin Li
add x0, sp, 16 str x0, [sp, 8] mov x0, x16 mov x16, 20016 add sp, sp, x16 br x0 I updated the patch with the new test case, the wording about the register constraint is also updated. Thanks, Renlin gcc/ChangeLog: 2018

[AARCH64]Fix ldr_got_small and ldr_got_small_28k patterns to only allow DImode address.

2018-01-03 Thread Renlin Li
-elf regression test Okay without regressions. Okay to commit? Regards, Renlin gcc/ChangeLog: 2018-01-03 Renlin Li <renlin...@arm.com> * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Make sure address is Pmode. * config/aarch64/aarch64.md (ldr_got

Re: [PR83370][AARCH64]Use tighter register constraints for sibcall patterns.

2017-12-20 Thread Renlin Li
Ping ~ On 11/12/17 15:27, Renlin Li wrote: Hi all, In aarch64 backend, ip0/ip1 register will be used in the prologue/epilogue as temporary register. When the compiler is performing sibcall optimization. It has the chance to use ip0/ip1 register for indirect function call to hold the address

[PR83370][AARCH64]Use tighter register constraints for sibcall patterns.

2017-12-11 Thread Renlin Li
ffects gcc-6, gcc-7 as well. Backport are needed for those branches. Regards, Renlin gcc/ChangeLog: 2017-12-11 Renlin Li <renlin...@arm.com> PR target/83370 * config/aarch64/aarch64.c (aarch64_class_max_nregs): Handle TAILCALL_ADDR_REGS. (aarch64_re

Re: Fix profile update in switch conversion

2017-10-10 Thread Renlin Li
Hi Honza, The change here cause the following failures: FAIL: gcc.dg/tree-prof/switch-case-1.c scan-rtl-dump-times expand ";; basic block[^\\n]*count 2000" 1 FAIL: gcc.dg/tree-prof/switch-case-2.c scan-rtl-dump-times expand ";; basic block[^\\n]*count 2000" 1 I checked that, after the

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

2017-08-31 Thread Renlin Li
for TImode register pair case. It only documents the most common cases I can think of. Any other suggestions are welcome. Is Okay to trunk? Regards, Renlin gcc/ChangeLog: 2017-08-31 Renlin Li <renlin...@arm.com> PR target/63359 * doc/extend.texi (AArch64Operandmodifers

Re: [TESTSUITE]Use strncpy instead of strcpy in testsuite/gcc.dg/memcmp-1.c

2017-08-30 Thread Renlin Li
Hi Aaron, On 30/08/17 15:37, Aaron Sawdey wrote: On Wed, 2017-08-30 at 10:16 +0100, Renlin Li wrote: Hi, Hi, Renlin you are correct that it shouldn't be using strcpy because the string may not be null terminated. However I would suggest we use memcpy instead of strncpy. The reason

[TESTSUITE]Use strncpy instead of strcpy in testsuite/gcc.dg/memcmp-1.c

2017-08-30 Thread Renlin Li
/testsuite/ChangeLog: 2017-08-30 Renlin Li <renlin...@arm.com> * gcc.dg/memcmp-1.c (test_strncmp): Use strncpy instead of strcpy. diff --git a/gcc/testsuite/gcc.dg/memcmp-1.c b/gcc/testsuite/gcc.dg/memcmp-1.c index 828a0ca..d258354 100644 --- a/gcc/testsuite/gcc.dg/memcmp-1.c +++

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

2017-06-27 Thread Renlin Li
Hi Andrew, On 27/06/17 17:11, Andrew Pinski wrote: On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Andrew, On 25/06/17 22:38, Andrew Pinski wrote: On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li <renlin...@foss.arm.com> wrote: Hi all, In this patch, a

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

2017-06-27 Thread Renlin Li
Hi Andrew, On 25/06/17 22:38, Andrew Pinski wrote: On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li <renlin...@foss.arm.com> wrote: Hi all, In this patch, a new integer register operand modifier 'r' is added. This will use the proper register name according to the mode of corresponding operan

Re: [PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

2017-06-23 Thread Renlin Li
Hi Martin, On 23/06/17 16:27, Martin Sebor wrote: On 06/23/2017 03:19 AM, Renlin Li wrote: Hi all, After the change r249278. bcopy is folded into memmove. And in newlib aarch64 memmove implementation, it will call memcpy in certain conditions. The memcpy defined in memops-asm-lib.c will abort

[PATCH][Testsuite] Use user defined memmove in gcc.c-torture/execute/builtins/memops-asm-lib.c

2017-06-23 Thread Renlin Li
the library one. So that memcpy won't be called accidentally. Okay to commit? gcc/testsuite/ChangeLog: 2017-06-22 Renlin Li <renlin...@arm.com> Szabolcs Nagy <szabolcs.n...@arm.com> * gcc.c-torture/execute/builtins/memops-asm-lib.c (my_memmove): New. * g

Re: [PATCH] have -Wformat-overflow handle -fexec-charset (PR 80503)

2017-06-20 Thread Renlin Li
cated to LONG_MAX (in target_strtol10 function) I have checked in cross build environment (host x86_64), this variable is true. Regards, Renlin On 13/06/17 09:16, Renlin Li wrote: Hi Martin, On 04/06/17 23:24, Martin Sebor wrote: On 06/02/2017 09:38 AM, Renlin Li wrote: Hi Martin, After r247444, I saw

Re: [PATCH] have -Wformat-overflow handle -fexec-charset (PR 80503)

2017-06-13 Thread Renlin Li
Hi Martin, On 04/06/17 23:24, Martin Sebor wrote: On 06/02/2017 09:38 AM, Renlin Li wrote: Hi Martin, After r247444, I saw the following two regressions in arm-linux-gnueabihf environment: FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-18.c (test for warnings, line 119) PASS: gcc.dg/tree-ssa

Re: Statically propagate basic blocks which are likely executed 0 times

2017-06-12 Thread Renlin Li
alls option. This patch changes the dump_stack function call conditional, which fixes the regression. Okay to commit? Regards, Renlin gcc/testsuite/ChangeLog: 2017-06-12 Renlin Li <renlin...@arm.com> * gcc.target/arm/cold-lc.c: Update coding style, call dump_stack con

Re: [PING][PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2017-06-07 Thread Renlin Li
Ping ~ On 14/12/16 15:33, Renlin Li wrote: Ping~ Regards, Renlin On 16/06/16 12:04, Renlin Li wrote: Hi all, GCC has startfile and endfile spec string built into it. startfile is used to specify objects files to include at the start of the link process. While endfile, on the other hand

Re: [Patch, fortran] PR35339 Optimize implied do loops in io statements

2017-06-07 Thread Renlin Li
171.swim fails on aarch64-linux as well. I dis a bisect and confirm it's r248877 causing the miscompare. Regards, Renlin On 06/06/17 12:05, Markus Trippelsdorf wrote: On 2017.06.05 at 22:39 +0200, Nicolas Koenig wrote: With all the style fixes committed as r248877. 171_swim fails now. I

[RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

2017-06-06 Thread Renlin Li
in? gcc/ChangeLog: 2017-06-06 Renlin Li <renlin...@arm.com> PR target/63359 * config/aarch64/aarch64.c (aarch64_print_operand): Add 'r' modifier. * doc/extend.texi (AArch64Operandmodifiers): New section. commit f8725ffd1375a8347cc8f4f183262c08ce2f73c6 Author: Ren

Re: [PATCH] add more detail to -Wconversion and -Woverflow (PR 80731)

2017-06-02 Thread Renlin Li
is not a large_long_double target. The patch here add the missing target selector. After the change, those test won't checked in arm target. Here I have a simple fix to it. Okay to commit? gcc/testsuite/ChangeLog: 2017-06-02 Renlin Li <renlin...@arm.com> * c-c++-common/Wfloat-conversion.c: Add large_long_double

Re: [PATCH] have -Wformat-overflow handle -fexec-charset (PR 80503)

2017-06-02 Thread Renlin Li
Hi Martin, After r247444, I saw the following two regressions in arm-linux-gnueabihf environment: FAIL: gcc.dg/tree-ssa/builtin-sprintf-warn-18.c (test for warnings, line 119) PASS: gcc.dg/tree-ssa/builtin-sprintf-warn-18.c (test for warnings, line 121) FAIL:

Re: [PATCH,testsuite] Add check_effective_target_rdynamic and use it in g++.dg/lto/pr69589_0.C.

2017-06-02 Thread Renlin Li
Hi Toma, Thanks for fixing this! Do you have plan to backport the fix to gcc-6 branch? Regards, Renlin On 09/03/17 15:08, Toma Tabacu wrote: Ok for mainline with that fixed. Thanks. Rainer Committed as r246004. Thanks, Toma

Re: [PATCH][AARCH64]Simplify call, call_value, sibcall, sibcall_value patterns.

2017-05-15 Thread Renlin Li
Hi Richard, Thanks! committed with all the comments resolved. Regards, Renlin On 02/05/17 13:53, Richard Earnshaw (lists) wrote: On 01/12/16 15:39, Renlin Li wrote: Hi all, This patch refactors the code used in call, call_value, sibcall, sibcall_value expanders. Before the change

Re: [PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2017-01-13 Thread Renlin Li
Hi Christophe, On 13/01/17 11:14, Christophe Lyon wrote: On 13 January 2017 at 11:22, Renlin Li <renlin...@foss.arm.com> wrote: Hi Christophe, Thanks for testing the patch! I check the test case gcc.dg/lto/pr54709, it seems the test case is not properly written. It add extra ld

Re: [PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2017-01-13 Thread Renlin Li
quire shared object support will fail. So this "shared" target checking mechanism is not reliable. The patch is to change this. Regards, Renlin On 13/01/17 08:48, Christophe Lyon wrote: Hi Renlin, On 12 January 2017 at 16:50, Renlin Li <renlin...@foss.arm.com> wrote: Hi Ku

Re: [PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2017-01-12 Thread Renlin Li
tml Regards, Renlin On 12/01/17 11:47, kugan wrote: Hi, On 16/06/16 21:04, Renlin Li wrote: /* Now we define the strings used to build the spec file. */ -#define UNKNOWN_ELF_STARTFILE_SPEC" crti%O%s crtbegin%O%s crt0%O%s" +#define UNKNOWN_ELF_STARTFILE_SPEC\ + "crti%O

Re: [PING][PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2017-01-12 Thread Renlin Li
~ Ping https://gcc.gnu.org/ml/gcc-patches/2016-06/msg01227.html Regards, Renlin On 14/12/16 15:33, Renlin Li wrote: Ping~ Regards, Renlin On 16/06/16 12:04, Renlin Li wrote: Hi all, GCC has startfile and endfile spec string built into it. startfile is used to specify objects files

[PING][PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2016-12-14 Thread Renlin Li
Ping~ Regards, Renlin On 16/06/16 12:04, Renlin Li wrote: Hi all, GCC has startfile and endfile spec string built into it. startfile is used to specify objects files to include at the start of the link process. While endfile, on the other hand, is used to specify objects files to include

[PATCH][AARCH64]Simplify call, call_value, sibcall, sibcall_value patterns.

2016-12-01 Thread Renlin Li
This also fixes the two issues Richard Henderson suggests in comments 8: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64971 aarch64-none-elf regression test Okay, aarch64-linux bootstrap Okay. Okay for trunk? Regards, Renlin Li gcc/ChangeLog: 2016-12-01 Renlin Li <renlin...@

Re: [PATCH][AARCH64]Skip gcc.target/aarch64/pr66912.c in tiny or large memory model.

2016-10-27 Thread Renlin Li
On 27/10/16 16:28, Andrew Pinski wrote: On Thu, Oct 27, 2016 at 4:24 AM, Renlin Li <renlin...@foss.arm.com> wrote: Hi, On 27/10/16 11:48, Szabolcs Nagy wrote: On 27/10/16 11:25, Renlin Li wrote: Hi all, This a simple patch to fix gcc.target/aarch64/pr66912.c. It's a test cas

Re: [PATCH][AARCH64]Skip gcc.target/aarch64/pr66912.c in tiny or large memory model.

2016-10-27 Thread Renlin Li
Hi, On 27/10/16 11:48, Szabolcs Nagy wrote: On 27/10/16 11:25, Renlin Li wrote: Hi all, This a simple patch to fix gcc.target/aarch64/pr66912.c. It's a test case only applicable to small memory model which is the default one. /* { dg-final { scan-assembler ":got(page_lo15)?:n_c

[PATCH][AARCH64]Skip gcc.target/aarch64/pr66912.c in tiny or large memory model.

2016-10-27 Thread Renlin Li
Hi all, This a simple patch to fix gcc.target/aarch64/pr66912.c. It's a test case only applicable to small memory model which is the default one. It has been tested to run only when the memory model is small. Okay to commit? Regards, Renlin Li gcc/testsuite/ChangeLog: 2016-10-27 Renlin Li

[RFC][IRA]Initialize ira_use_lra_p early by moving the initialization into ira_init_once ().

2016-09-21 Thread Renlin Li
suggests, it's called once to initialize function independent data structure. aarch64-none-elf regression test Okay, x86-64-linux bootstrap Okay. Regards, Renlin gcc/ChangeLog: 2016-09-21 Renlin Li <renlin...@arm.com> * ira.c (ira): Move ira_use_lra_p initializatio

Re: [PATCH][COMMITTED] Revert r238497 because of PR 71961.

2016-08-05 Thread Renlin Li
Hi Joost, I am not familiar with fortran code. Maybe Thomas can do something in his new patch? Regards, Renlin On 28/07/16 12:34, VandeVondele Joost wrote: Thanks.. I wonder if you could add the testcase in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71961#c11 to the testsuite, as it

[PATCH][PR64971]Convert function pointer to Pmode when emit call

2016-08-04 Thread Renlin Li
bi is LP64. It will be great if Andrew you can help to do regression test in your aarch64 ilp32 environment. And I double checked that, the backend fix can be removed without any problem. It's good to expose middle-end bugs. Okay for trunk and backport to branch 6? gcc/ChangeLog: 2016-08-04 Renlin L

[PATCH][COMMITTED] Revert r238497 because of PR 71961.

2016-07-28 Thread Renlin Li
/bugzilla/show_bug.cgi?id=71902 Regards, Renlin Li gcc/fortran/ChangeLog: c 2016-07-28 Renlin Li <renlin...@arm.com> Revert 2016-07-19 Thomas Koenig <tkoe...@gcc.gnu.org> PR fortran/71902 * dependency.c (gfc_check_dependency): Use dep_ref.

Re: C++ PATCH for c++/71913 (copy elision choices)

2016-07-25 Thread Renlin Li
Hi Jason, On 22/07/16 04:01, Jason Merrill wrote: 71913 is a case where unsafe_copy_elision_p was being too conservative. We can allow copy elision in a new expression; the only way we could end up initializing a base subobject without knowing it would be through a placement new, in which case

Re: [PATCH] correct atomic_compare_exchange_n return type (c++/71675)

2016-07-25 Thread Renlin Li
Hi Martin, I observed the following error: ERROR: gcc.dg/atomic/pr71675.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects : syntax error in target selector "target c11" for " dg-do 3 compile { target c11 } " It seems we don't have a c11 effective target check available in dejagnu

Re: [PATCH PR71734] Add missed check that reference defined inside loop.

2016-07-19 Thread Renlin Li
only. Regards, Renlin Li On 08/07/16 15:07, Yuri Rumyantsev wrote: Hi Richard, Thanks for your help - your patch looks much better. Here is new patch in which additional argument was added to determine source loop of reference. Bootstrap and regression testing did not show any new failures

Re: Update probabilities in predict.def to match reality

2016-06-20 Thread Renlin Li
ts as well since the commit. Regards, Renlin Li Andreas.

[PATCH]Fix scan-tree-dump-times syntax errors in gcc.dg/tree-ssa/attr-hotcold-2.c

2016-06-20 Thread Renlin Li
environment. However, the last two checks seem failing. This is another issue. Okay to commit? Regards, Renlin gcc/testsuite/ChangeLog: 2016-06-20 Renlin Li <renlin...@arm.com> * gcc.dg/tree-ssa/attr-hotcold-2.c: Fix syntax errors. On 13/06/16 17:35, Kyrill Tkachov wrote: Hi

[PATCH][ARM]Use different startfile and endfile for elf target when generating shared object.

2016-06-16 Thread Renlin Li
Still, those specs strings built into GCC can be overridden by using -specs=command-line switch to specify a spec file. arm-none-eabi regression test without new issues, OK for trunk? Regards, Renlin Li gcc/ChangeLog: 2016-06-16 Renlin Li <renlin...@arm.com> * config/arm/unknown

Re: [PATCH, aarch64] Fix 70048

2016-06-07 Thread Renlin Li
s me this is c++ initialization. Ah, yes it is! But I believe this is an coincident? As you have different initialization code above. I made an obvious patch to make it looks more intuitive, is it Okay? Regards, Renlin Li gcc/changelog: 2016-06-06 renlin li <renlin...@arm.com>

Re: [PATCH]Replace -shared with -r -nostdlib in gcc.dg/lto/pr61526 pr54709 pr64415 test cases.

2016-03-03 Thread Renlin Li
Hi Richard, On 03/03/16 12:47, Richard Biener wrote: On Thu, Mar 3, 2016 at 1:07 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Richard, On 03/03/16 10:13, Richard Biener wrote: On Wed, Mar 2, 2016 at 5:12 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Richard, On 02

Re: [PATCH]Replace -shared with -r -nostdlib in gcc.dg/lto/pr61526 pr54709 pr64415 test cases.

2016-03-03 Thread Renlin Li
Hi Richard, On 03/03/16 10:13, Richard Biener wrote: On Wed, Mar 2, 2016 at 5:12 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Richard, On 02/03/16 13:35, Richard Biener wrote: On Tue, Mar 1, 2016 at 4:56 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Richard, On 01

Re: [PATCH]Replace -shared with -r -nostdlib in gcc.dg/lto/pr61526 pr54709 pr64415 test cases.

2016-03-02 Thread Renlin Li
Hi Richard, On 02/03/16 13:35, Richard Biener wrote: On Tue, Mar 1, 2016 at 4:56 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi Richard, On 01/03/16 09:16, Richard Biener wrote: On Mon, Feb 29, 2016 at 5:13 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi all, The gcc.dg

Re: [PATCH]Replace -shared with -r -nostdlib in gcc.dg/lto/pr61526 pr54709 pr64415 test cases.

2016-03-01 Thread Renlin Li
Hi Richard, On 01/03/16 09:16, Richard Biener wrote: On Mon, Feb 29, 2016 at 5:13 PM, Renlin Li <renlin...@foss.arm.com> wrote: Hi all, The gcc.dg/lto/pr54709, pr61526, pr64415 linking testcases keep failing on arm/aarch64 bare-metal target. It's because statically built newlib l

[PATCH]Replace -shared with -r -nostdlib in gcc.dg/lto/pr61526 pr54709 pr64415 test cases.

2016-02-29 Thread Renlin Li
option is replace by -r -nostdlib. So that the standard system startup files or libraries are not used when linking. arm-none-eabi, aarch64-none-elf regression test OK, OK for trunk? Regards, Renlin Li gcc/testsuite/ChangeLog: 2016-02-29 Renlin Li<renlin...@arm.com> * gcc.dg/lto/pr5

Re: [PATCH][LRA]Don't generate reload for output scratch operand from reload instruction.

2016-02-29 Thread Renlin Li
e problem for correct scratch generation during LRA. I am going to work on this problem on the next week. A test case would be a help for me. gcc/ChangeLog: 2016-02-26 Renlin Li<renlin...@arm.com> * lra-constraints.c (curr_insn_transform): Don't generate reload for output scratch

Re: [PATCH][LRA]Don't generate reload for output scratch operand from reload instruction.

2016-02-26 Thread Renlin Li
Hi Richard, On 26/02/16 12:57, Richard Biener wrote: On Fri, Feb 26, 2016 at 1:54 PM, Renlin Li <renlin...@foss.arm.com> wrote: I have checked, x86, arm, aarch64, mips, arc all have such patterns. But it's not triggered. In my case, it's triggered by compiling glibc with local

[PATCH][LRA]Don't generate reload for output scratch operand from reload instruction.

2016-02-26 Thread Renlin Li
imple change is made in this patch. The output operand is reloaded only when it's not a scratch operand and it's not unused since then. aarch64-none-linux-gnu bootstrap and regression test OK. x86_64-linux bootstrap and regression test OK. OK for trunk? Regards, Renlin Li gcc/ChangeLog: 2

[4.9][PR69082]Backport "[PATCH][ARM]Tighten the conditions for arm_movw, arm_movt"

2016-01-12 Thread Renlin Li
is not added as the one provided in the bugzilla ticket is too big and complex. arm-none-linux-gnueabihf regression tested without any issues. Is Okay to backport to branch 4.9? Renlin Li gcc/ChangeLog 2016-01-08 Renlin Li <renlin...@arm.com> PR target/69082 Backpor

Re: [PR67383][ARM][4.9]Backport of "Allow any register for DImode values in Thumb2"

2015-11-27 Thread Renlin Li
Hi Ramana, On 16/10/15 14:54, Renlin Li wrote: The command line implies we remove r7 (frame pointer in Thumb2 - historical accident, fno-omit-frame-pointer), r9 (ffixed-r9), r10 (-mpic-register) which leaves us with: * r0, r1 * r2, r3 * r4, r5 as the only free registers available

Re: [PATCH] g++.dg/init/vbase1.C and g++.dg/cpp/ucn-1.C

2015-11-16 Thread Renlin Li
. This passes for aarch64 and mips as they have zero register to do that. However, other RISC might not have that feature, for example arm and RS6000 in this case. https://gcc.gnu.org/ml/gcc-patches/2015-10/msg03239.html Regards, Renlin Li Dollar sign is not a valid identifier on AIX, so g

[PATCH][ARM]Fix addsi3_compare_op2 pattern.

2015-11-12 Thread Renlin Li
to branch 5 and 4.9? Regards, Renlin Li gcc/ChangeLog: 2015-11-12 Renlin Li <renlin...@arm.com> * config/arm/arm.md (addsi3_compare_op2): Make the order of assembly pattern consistent with constraint order. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 8ebb1bf..7

Re: [PING][PATCH][4.9]Backport "Fix register corruption bug in ree"

2015-11-06 Thread Renlin Li
[ __x+-8 ]))) /libstdc++-v3/include/complex:861 689 {aarch64_movtfhigh_di} (nil)) Regards, Renlin Li On 29/10/15 16:33, Richard Biener wrote: On October 29, 2015 4:37:08 PM GMT+01:00, Ramana Radhakrishnan <ramana@googlemail.com> wrote: On Thu, Jun 4, 2015 at 2:16 PM, Renlin Li <

Re: RFA: PATCH to store_field for storing a CONSTRUCTOR into a base subobject

2015-10-29 Thread Renlin Li
Hi Jason, On 08/10/15 03:42, Jason Merrill wrote: While looking at another issue I noticed that in g++.dg/init/vbase1.C the Diamond(int) constructor was unnecessarily storing a CONSTRUCTOR into a stack temporary and then copying it into the SubB base subobject rather than directly storing the

Re: [PATCH]Add -fprofile-use option for check_effective_target_freorder.

2015-10-27 Thread Renlin Li
On 26/10/15 13:24, Bernd Schmidt wrote: On 10/26/2015 02:17 PM, Teresa Johnson wrote: On Mon, Oct 26, 2015 at 2:00 AM, Renlin Li <renlin...@arm.com> wrote: * lib/target-supports.exp (check_effective_target_freorder): Add -fprofile-use flag. Hmmm, the testcases themselves

[PATCH]Add -fprofile-use option for check_effective_target_freorder.

2015-10-26 Thread Renlin Li
ck. Okay to commit on the trunk? Regards, Renlin Li gcc/testsuite/ChangeLog: 2015-10-26 Renlin Li <renlin...@arm.com> * lib/target-supports.exp (check_effective_target_freorder): Add -fprofile-use flag. diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/tar

Re: [PR67383][ARM][4.9]Backport of "Allow any register for DImode values in Thumb2"

2015-10-16 Thread Renlin Li
Hi Ramana, On 16/10/15 11:52, Ramana Radhakrishnan wrote: On Thu, Oct 15, 2015 at 03:01:24PM +0100, Renlin Li wrote: Hi all, This is a backport patch to loosen restrictions on core registers for DImode values in Thumb2. It fixes PR67383. In this particular case, reload tries to spill a hard

[PR67383][ARM][4.9]Backport of "Allow any register for DImode values in Thumb2"

2015-10-15 Thread Renlin Li
to 4.9? Regards, Renlin Li gcc/ChangeLog: 2015-10-15 Renlin Li <renlin...@arm.com> PR target/67383 Backport from mainline. 2014-04-22 Ramana Radhakrishnan <ramana.radhakrish...@arm.com> * config/arm/arm.c (arm_hard_regno_mode_ok): Loosen

[PATCH][ARM]Add earlyclobber modifier for neon_(vtrn, vuzp, vzip)_insn rtx pattern.

2015-10-06 Thread Renlin Li
arm-none-linux-gnueabihf regression tests Okay. Okay to commit? Regards, Renlin Li gcc/ChangeLog: 2015-10-06 Renlin Li <renlin...@arm.com> * config/arm/neon.md (neon_vuzp_insn): Add & modifier for operands[0] and operands[2]. (neon_vtrn_insn): Likewise. (n

[PR66776][PATCH][AARCH64] Add cmovdi_insn_uxtw pattern.

2015-10-02 Thread Renlin Li
w0, wzr cselw0, w1, w2, ne ret Without the path, the old code-generation is like this: uxtwx2, w2 uxtwx1, w1 cmp w0, wzr cselx0, x2, x1, eq ret aarch64-none-elf regression test Okay. Okay to commit? Regards, Renlin Li gcc

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