https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Georg-Johann Lay changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #30 from CVS Commits ---
The master branch has been updated by Georg-Johann Lay :
https://gcc.gnu.org/g:20643513b8dd34c07f2b0fccf119153a30735f66
commit r14-1694-g20643513b8dd34c07f2b0fccf119153a30735f66
Author: Georg-Johann Lay
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #29 from Andrew Pinski ---
(In reply to Andrew Pinski from comment #25)
> Created attachment 55175 [details]
> Patch which fixes `signed < 0`
>
> This patch improves comment #20 .
I ran into a code generation regression with this
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #28 from Andrew Pinski ---
(In reply to Andrew Pinski from comment #26)
> (In reply to Andrew Pinski from comment #25)
> > Created attachment 55175 [details]
> > Patch which fixes `signed < 0`
> >
> > This patch improves comment
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--- Comment #27 from Andrew Pinski ---
I should note the middle-end could also improve here:
/* If we are comparing a double-word integer with zero or -1, we can
convert the comparison into one involving a single word. */
if
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--- Comment #26 from Andrew Pinski ---
(In reply to Andrew Pinski from comment #25)
> Created attachment 55175 [details]
> Patch which fixes `signed < 0`
>
> This patch improves comment #20 .
Note this patch does not work for the case of
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--- Comment #25 from Andrew Pinski ---
Created attachment 55175
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55175=edit
Patch which fixes `signed < 0`
This patch improves comment #20 .
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #24 from Andrew Pinski ---
(In reply to Georg-Johann Lay from comment #23)
> Thank you so much for looking into this.
>
> For the test case from comment #21 though, the problem is somewhere in tree
> optimizations.
>
> > unsigned
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--- Comment #23 from Georg-Johann Lay ---
Thank you so much for looking into this.
For the test case from comment #21 though, the problem is somewhere in tree
optimizations.
> unsigned char lfsr32_mpp_ge0 (unsigned long number)
> {
>
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--- Comment #22 from Andrew Pinski ---
(In reply to Georg-Johann Lay from comment #20)
> What then happens is:
>
> expr.cc::do_store_flag()
> expmed.cc::emit_store_flag_force()
> expmed.cc::emit_store_flag()
> expmed.cc::emit_store_flag_1()
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #21 from Georg-Johann Lay ---
One more test:
unsigned char lfsr32_mpp_ge0 (unsigned long number)
{
unsigned char b = 0;
if (number >= 0) b--;
if (number & (1UL << 29)) b++;
if (number & (1UL << 13)) b++;
return b;
}
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #20 from Georg-Johann Lay ---
Here is a testcase similar to the one from PR55181, where the first test is for
the sign bit:
unsigned char lfsr32_mpp_sign (unsigned long number)
{
unsigned char b = 0;
if (number & (1UL << 31))
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #19 from Georg-Johann Lay ---
Created attachment 55139
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55139=edit
C test case, insert bits in place
This testcase is from PR82931. It transfers one bit to the same bit-position
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #18 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #16)
> But that still fails because combine really does not like subregs:
> [...]
> Failed to match this instruction:
> (set (reg/i:QI 24 r24)
> (subreg:QI
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #17 from Georg-Johann Lay ---
Created attachment 55129
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55129=edit
Patch for AVR backend: combine patterns, "extzv", test case
For now I have the attaches patch that resolves all
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #16 from Andrew Pinski ---
(In reply to Andrew Pinski from comment #14)
> Actually I take back on what is going on those 3. But I will be looking into
> it.
>
>
> x.0_1 = (signed long) x_4(D);
> _2 = x.0_1 >> 31;
> _3 =
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--- Comment #15 from Andrew Pinski ---
So there is another way of fixing this. take:
Trying 6 -> 12:
6: r49:SI=r50:SI>>0x1f
REG_DEAD r50:SI
12: r24:QI=r49:SI#0&0x1
REG_DEAD r49:SI
Failed to match this instruction:
(set
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Andrew Pinski changed:
What|Removed |Added
Depends on|108847 |
--- Comment #14 from Andrew Pinski
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Andrew Pinski changed:
What|Removed |Added
Depends on||108847
--- Comment #13 from Andrew
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #12 from Georg-Johann Lay ---
...my bad, I tried "extzv", which didn't work out as expected.
So we have shifts : bit-extract = 3 : 2.
Is it worth trying to write combine patterns to catch this? Or will there be
better lowering
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #11 from Georg-Johann Lay ---
I tried with the test case, but the expensive shifts are still there except for
the cset_32bit30_not case, which improved as noted above.
cset_32bit30 however goes from the 3-instruction code to:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Andrew Pinski changed:
What|Removed |Added
Status|ASSIGNED|NEW
Assignee|pinskia at gcc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #9 from Andrew Pinski ---
(In reply to Georg-Johann Lay from comment #6)
> Quite impressive improvement. Maybe the last step can be achieved with a
> combiner pattern that combines extzv with a bit flip.
>
> One problem is usually
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--- Comment #8 from Georg-Johann Lay ---
avr.md has this:
> ;; ??? do_store_flag emits a hard-coded right shift to extract a bit without
> ;; even considering rtx_costs, extzv, or a bit-test. See PR55181 for an
> example.
And I already
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--- Comment #7 from Andrew Pinski ---
(In reply to Georg-Johann Lay from comment #6)
> (define_expand "extzv"
> [(set (match_operand:QI 0 "register_operand")
> (zero_extract:QI (match_operand:QI 1 "register_operand")
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #6 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #4)
> For cset_32bit30_not with some patches which I will be posting, I get:
> bst r25,6; 23 [c=4 l=3] *extzv/4
> clr r24
> bld
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--- Comment #5 from Andrew Pinski ---
Created attachment 55121
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55121=edit
patch set
here is the patch set that improves cset_32bit30_not . I am still looking into
improving the other one.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #4 from Andrew Pinski ---
For cset_32bit30_not with some patches which I will be posting, I get:
bst r25,6; 23 [c=4 l=3] *extzv/4
clr r24
bld r24,0
ldi r25,lo8(1) ; 24 [c=4 l=1]
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
--- Comment #3 from Andrew Pinski ---
Note this code has been in expr.cc since before 1992 even :).
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109907
Andrew Pinski changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed|
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