in the existing code and to be slightly more efficient.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2019-02-07 Tamar Christina
PR target/88530
* config/aarch64/aarch64-option-extensions.def: Document
Hi Gerard,
>
> On Wed, 6 Feb 2019, Tamar Christina wrote:
> > I've updated the patch with your suggested changes and have grouped
> > the Arm and AArch64 targets a bit.
>
> Thanks, Tamar!
>
> > Ok for commit?
>
> Yes, I had meant to imply this in
Hi Gerald,
I've updated the patch with your suggested changes and have grouped
the Arm and AArch64 targets a bit.
Ok for commit?
Thanks,
Tamar
The 01/31/2019 10:21, Ramana Radhakrishnan wrote:
>
>
> On Thu, 31 Jan 2019, 10:09 Tamar Christina
> mailto:tamar.christ...@arm.com&
Friendly Ping, is there anything I can do to move this one along?
Thanks,
Tamar
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Wednesday, January 30, 2019 14:02
> To: Kyrill Tkachov
> Cc: gcc-patches@gcc.gnu.org; nd
Hi Kyrill,
>
> So you add a new alternative but don't modify any of the output logic, which
> means it will use output_move_double. Can that handle an "r,r" alternative?
> Or do you expect a split to always happen here? If so, the output should be
> '#'
Yes.. so output_move_double can't indeed
lly has no choice.
As such we add a new neon r -> r move pattern but also hide it from being used
to determine register preferences and also disparage it during LRA.
Bootstrapped Regtested on arm-none-gnueabihf and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2019-02-05 Tamar Chr
y opinions guys?
Thanks,
Tamar
From: Gerald Pfeifer
Sent: Thursday, January 31, 2019 12:29 AM
To: Tamar Christina
Cc: gcc-patches@gcc.gnu.org; nd; James Greenhalgh; Richard Earnshaw; Marcus
Shawcroft; Ramana Radhakrishnan; ni...@redhat.com; Kyrylo Tkachov
S
Hi Gerald,
Yup that's fine :) I won't be able to commit it before Monday anyway.
Cheers,
Tamar
From: Gerald Pfeifer
Sent: Wednesday, January 30, 2019 3:37 PM
To: James Greenhalgh
Cc: Tamar Christina; gcc-patches@gcc.gnu.org; nd; Richard Earnshaw; Marcus
Hi Jakub,
On Wed, Jan 30, 2019 at 02:06:01PM +, Tamar Christina wrote:
> > Thanks for the feedback, but I think those are changes for another patch.
>
> At least the memory leak is something that should be fixed even in stage4
> IMNSHO.
I'll provide a separate patch for this
From: Jakub Jelinek
Sent: Wednesday, January 23, 2019 4:27:40 PM
To: Kyrill Tkachov
Cc: Tamar Christina; gcc-patches@gcc.gnu.org; nd; James Greenhalgh; Richard
Earnshaw; Marcus Shawcroft
Subject: Re: [PATCH][GCC][AArch64] Have empty HWCAPs string ignored during
native feature detection
Ping.
From: gcc-patches-ow...@gcc.gnu.org on behalf
of Tamar Christina
Sent: Tuesday, January 15, 2019 5:12:46 PM
To: Kyrill Tkachov
Cc: gcc-patches@gcc.gnu.org; nd; James Greenhalgh; Richard Earnshaw; Marcus
Shawcroft
Subject: Re: [PATCH][GCC][AArch64
Ping.
From: gcc-patches-ow...@gcc.gnu.org on behalf
of Tamar Christina
Sent: Wednesday, January 23, 2019 10:43:02 AM
To: gcc-patches@gcc.gnu.org
Cc: nd; James Greenhalgh; Richard Earnshaw; Marcus Shawcroft; Ramana
Radhakrishnan; ni...@redhat.com
Ellcey
> Sent: Tuesday, January 22, 2019 10:34 PM
> To: Tamar Christina; Richard Sandiford
> Cc: gcc-patches@gcc.gnu.org; nd; christophe.l...@linaro.org
> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
>
> On Mon, 2019-01-21 at 18:00 +, Tamar Ch
Hi All,
This patch adds the documentation for Stack clash protection and Armv8.3-a
support to
changes.html for GCC 9.
I have validated the html using the W3C validator.
Ok for cvs?
Thanks,
Tamar
--
Index: htdocs/gcc-9/changes.html
Sent: Tuesday, January 22, 2019 10:34 PM
To: Tamar Christina; Richard Sandiford
Cc: gcc-patches@gcc.gnu.org; nd; christophe.l...@linaro.org
Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
On Mon, 2019-01-21 at 18:00 +, Tamar Christina wrote:
>
> > That w
Hi All,
This fixes the failing testcase for simd-clone-7.cc for the ILP32
case and big-endian.
Regtested on aarch64-none-linux-gnu and aarch6_be-none-elf and no issues.
Committed under the GCC obvious rule.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2019-01-21 Tamar Christina
* g
Hi Richard,
> -Original Message-
> From: Richard Sandiford
> Sent: Monday, January 21, 2019 16:42
> To: Tamar Christina
> Cc: Steve Ellcey ; christophe.l...@linaro.org; gcc-
> patc...@gcc.gnu.org; nd
> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Imple
Hi All,
The simd-clone-7.cc tests seem to fail on big-endian with
testsuite/g++.dg/vect/simd-clone-7.cc:7:1: warning: GCC does not currently
support mixed size types for 'simd' functions
The test probably miss an effective target check?
Cheers,
Tamar
> -Original Message-
> From:
Forwarding to list.
> -Original Message-
> From: Tamar Christina
> Sent: Monday, January 21, 2019 15:25
> To: 'Jakub Jelinek' ; Jason Merrill
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Fix gcc.dg/utf-array.c testcase
>
> Hi,
>
> These fail on
-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2019-01-21 Tamar Christina
PR/tree-optimization 88903
* gcc.dg/vect/pr88903-1.c: Add explicit &.
--
diff --git a/gcc/testsuite/gcc.dg/vect/pr88903-1.c b/gcc/testsuite/gcc.dg/vect/pr88903-1
Boessenkool
Sent: Sunday, January 20, 2019 3:48 PM
To: Tamar Christina
Cc: gcc-patches@gcc.gnu.org; nd ; Ramana Radhakrishnan
; Richard Earnshaw ;
ni...@redhat.com; Kyrylo Tkachov
Subject: Re: [PATCH][GCC][Arm] Rewrite arm testcase to use intrinsics
Hi!
On Thu, Jan 17, 2019 at 03:02:00PM
-none-eabi and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2019-01-17 Tamar Christina
PR target/88850
* gcc.target/arm/pr51968.c: Use neon intrinsics.
--
diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c b/gcc/testsuite/gcc.target/arm/pr51968.c
index
obvious rules.
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2019-01-16 Tamar Christina
PR debug/88046
* g++.dg/lto/pr88046_0.C: Check for shared and fPIC.
--
diff --git a/gcc/testsuite/g++.dg/lto/pr88046_0.C b/gcc/testsuite/g++.dg/lto/pr88046_0.C
index
2019-01-16 Tamar Christina
PR target/88851
* config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
* config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
it and document registers.
gcc/testsuite/ChangeLog:
2019-01-16 Tamar Christina
Hi Kyrill,
Thanks for the review,
I have respun the patch on top of trunk and
here is the new changelog to account for the
updates of the new extensions.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2019-01-15 Tamar Christina
:
2019-01-15 Tamar Christina
* config/arm/arm-protos.h (neon_vcmla_lane_prepare_operands): Remove
patternmode.
* config/arm/arm.c (neon_vcmla_lane_prepare_operands): Likewise.
* config/arm/neon.md (neon_vcmla_lane,
neon_vcmla_laneq,
neon_vcmlaq_lane): Remove
in GCC 10 so they're more
aligned with AArch64.
Thanks,
Tamar
-Original Message-
From: Christophe Lyon
Sent: Monday, January 14, 2019 1:46 PM
To: Tamar Christina
Cc: gcc-patches@gcc.gnu.org; nd ; Ramana Radhakrishnan
; Richard Earnshaw ;
ni...@redhat.com; Kyrylo Tkachov
Subject: Re
and regtested on aarch64_be-none-elf and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2019-01-14 Tamar Christina
* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
correct
max nunits for endian swap.
(aarch64_expand_fcmla_builtin): Correct
-11 Tamar Christina
* gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c: Require
neon
and add options.
--
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vector-complex_f16.c
, splitting of the patches
from the remainder of the series
had some casualties.. These should be the last.
Thanks and happy new years to you too!
Kind Regards,
Tamar
-Original Message-
From: Christophe Lyon
Sent: Friday, January 11, 2019 10:02 AM
To: Tamar Christina
Cc: Kyrill Tkachov
Hi All,
This fixes an issue where the +nosimd option causes the builtins for fcmla_laneq
not to be defined at all. This fixes the regression by initializing the
built-ins together with the rest of the SIMD ones.
Thanks,
Tamar
gcc/ChangeLog:
2019-01-10 Tamar Christina
* config
, January 10, 2019 3:35:18 PM
To: Tamar Christina
Cc: Kyrill Tkachov; gcc-patches@gcc.gnu.org; nd; Ramana Radhakrishnan; Richard
Earnshaw; ni...@redhat.com
Subject: Re: [PATCH 9/9][GCC][Arm] Add ACLE intrinsics for complex
mutliplication and addition
Hi Tamar,
On Thu, 10 Jan 2019 at 04:44, Tamar
Hi James,
Committed with the refactoring requested and the addition of a few trivial
Defines and iterators that were missing due to the patch series being split.
Thanks,
Tamar
-Original Message-
From: James Greenhalgh
Sent: Wednesday, January 9, 2019 3:37 PM
To: Tamar Christina
Cc
Hi Kyrill,
Committed with a the addition of a few trivial defines and iterators that were
missing due to
The patch being split.
Thanks,
Tamar
-Original Message-
From: Kyrill Tkachov
Sent: Friday, December 21, 2018 11:40 AM
To: Tamar Christina ; gcc-patches@gcc.gnu.org
Cc: nd
Hi Marc,
> >>> + (nop:type (op (convert:ty1 @1) (convert:ty2 @2)
> >>
> >> Please don't use 'nop' directly, use 'convert' instead. This line is very
> >> suspicious, both arguments of op should have the same type. Specifying the
> >> outertype should be unnecessary, it is always 'type'.
Hi Marc
The 01/04/2019 17:50, Marc Glisse wrote:
> > +(convert:newtype (op (convert:newtype @1) (convert:newtype @2)))
>
> The outer 'convert' is unnecessary, op already has the same type.
>
Does it? The only comparison that has been done between the type of op and
"type" is that
they
Tamar
gcc/ChangeLog:
2019-01-04 Tamar Christina
* convert.c (convert_to_real_1): Move part of conversion code...
* match.pd: ...To here.
gcc/testsuite/ChangeLog:
2019-01-04 Tamar Christina
* gcc.dg/type-convert-var.c: New test.
--
diff --git a/gcc/convert.c b/gcc/conve
ze.
Most simple math operations would have a known size based on the vectorization
factor, in any case, I'll hold off this patch then
Until the rest of the series is retried in stage 1.
Thanks,
Tamar
>
> Thanks,
> Kyrill
>
> > Ok for trunk?
> >
> > Thanks,
Hi All,
I have made a trivial change in the patch and will assume the OK still applies.
I have also changed it from a compile to assemble tests.
Kind Regards,
Tamar
The 12/21/2018 11:40, Kyrill Tkachov wrote:
> Hi Tamar,
>
> On 11/12/18 15:46, Tamar Christina wrote:
&
-linux-gnu and no issues.
Additional runtime checks done but not posted with the patch.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-12-22 Tamar Christina
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add
qualifier_lane_pair_index.
(emit-rtl.h): Include
Ping
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Tuesday, December 11, 2018 15:47
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; Ramana Radhakrishnan
> ; Richard Earnshaw
> ; ni...@redhat.com; Kyrylo Tkachov
>
Ping.
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Sunday, November 11, 2018 10:28
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; Ramana Radhakrishnan
> ; Richard Earnshaw
> ; ni...@redhat.com; Kyrylo Tkachov
>
Ping arm maintainers.
> -Original Message-
> From: James Greenhalgh
> Sent: Wednesday, November 28, 2018 17:18
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; ni...@redhat.com; Ramana Radhakrishnan
> ; Kyrylo
was added a bug
was preventing any feature bits from being added by native detections.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-12-18 Tamar Christina
PR target/88530
* config/aarch64/aarch64-option
haviors stay the same.
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-12-17 Tamar Christina
PR target/88530
* common/config/aarch64/aarch64-common.c
(struct aarch64_option_extension): Add
-a-architecture-profile
[2] https://developer.arm.com/docs/101028/latest
Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-12-11 Tamar Christina
* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add
-a-architecture-profile
[2] https://developer.arm.com/docs/101028/latest
Bootstrapped Regtested on arm-none-gnueabihf and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-12-11 Tamar Christina
* config/arm/arm-builtins.c
(enum arm_type_qualifiers): Add
;
*c = (_Float16)e;
and
*c = (_Float16)((float)a * (float)b);
Thanks,
Tamar
gcc/ChangeLog:
2018-11-28 Tamar Christina
* convert.c (convert_to_real_1): Move part of conversion code...
* match.pd: ...To here.
gcc/testsuite/ChangeLog:
2018-11-28 Tamar Christina
Hi James,
> -Original Message-
> From: James Greenhalgh
> Sent: Wednesday, November 28, 2018 17:27
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw
> ; Marcus Shawcroft
> ; ni...@redhat.com; Ramana Radhakrishnan
> ; Kyrylo Tkachov
>
Hi Richard,
Thanks for the feedback, I've replied inline below.
I'll wait for your answers before making changes.
> -Original Message-
> From: Richard Biener
> Sent: Wednesday, November 14, 2018 12:21
> To: Tamar Christina
> Cc: GCC Patches ; nd ; Richard
> Guenth
he values to have been
loaded
using a simple load and not a LOAD_LANES. So I am intended to prevent combine
from
recognizing the operation for that reason. For the ADD combine can be used but
then you'd
have to match the load and store since you have to change these, for
unit-size
align:32 warn_if_not_align:0 symtab:0 alias-set -1 canonical-type
0x7ffb18e362a0 precision:32
pointer_to_this >
side-effects
arg:0 -----Original Message-
> From: Joseph Myers
> Sent: Tuesday, November 13, 2018 00:49
> To: Tamar Chri
Hi Kyrill,
> Hi Tamar,
>
> On 11/11/18 10:26, Tamar Christina wrote:
> > Hi All,
> >
> > This patch adds the expander support for supporting autovectorization of
> > complex number operations
> > such as Complex addition with a rotation along the Arg
Hi Sandra,
> > Ok for trunk?
> >
> > +@cindex @code{xorsign@var{m}3} instruction pattern
> > +@item @samp{xorsign@var{m}3}
> > +Target suppports an efficient expansion of x * copysign (1.0, y)
> > +as xorsign (x, y). Store a value with the magnitude of operand 1
> > +and the sign of operand 2
and Regtest on aarch64-none-linux-gnu, arm-none-gnueabihf and
x86_64-pc-linux-gnu
are still on going but previous patch showed no regressions.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* config/arm/arm.c (arm_preferred_simd_mode): Add V4HF and V8HF.
--
diff
and -march=Armv8.3-a+fp16 and all tests pass.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* config/arm/arm.c (arm_arch8_3, arm_arch8_4): New.
* config/arm/arm.h (TARGET_COMPLEX, arm_arch8_3, arm_arch8_4): New.
(arm_option_reconfigure_globals): Use
tested on aarch64-none-elf and arm-none-eabi on
a Armv8.3-a model
and -march=Armv8.3-a+fp16 and all tests pass.
Ok for trunk?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2018-11-11 Tamar Christina
* lib/target-supports.exp
(check_effective_target_arm_v8_3a_complex_neon_ok_nocache
on aarch64-none-elf on a Armv8.3-a model
and -march=Armv8.3-a+fp16 and all tests pass.
Ok for trunk?
Thanks,
Tamar
gcc/testsuite/ChangeLog:
2018-11-11 Tamar Christina
* gcc.target/aarch64/advsimd-intrinsics/vcadd-arrays-autovec-270.c: New
test.
* gcc.target/aarch64/advsimd
and -march=Armv8.3-a+fp16 and all tests pass.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* config/aarch64/aarch64-simd.md (aarch64_fcadd,
fcadd3, aarch64_fcmla,
fcmla4): New.
* config/aarch64/aarch64.h (TARGET_COMPLEX): New
posting the patch for comments.
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* match.pd: Add type conversion stripping.
--
diff --git a/gcc/match.pd b/gcc/match.pd
index d07ceb7d087b8b5c5a7d7362ad9d8f71ac90dc08..3c2f8caca42d6a163fbf7faba6220d7304200100 100644
--- a/gcc
and -march=Armv8.3-a+fp16 and all tests pass.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* doc/md.texi (fcadd, fcmla): New.
* doc/sourcebuild.texi (vect_complex_rot_): New.
* internal-fn.def (FCOMPLEX_ADD_ROT90): New
Hi All,
This patch series adds support for SLP vectorization of complex instructions
[1].
These instructions exist only in their vector forms and require you to recognize
two statements in parallel. Complex operations usually require a permute due to
the fact that the real and imaginary
Hi All,
This patch just adds documentation for the xorsign optab that was added a while
ago.
Ok for trunk?
Thanks,
Tamar
gcc/ChangeLog:
2018-11-11 Tamar Christina
* doc/md.texi (xorsign): Document it.
--
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index
Hi Eric,
> -Original Message-
> From: Eric Botcazou
> Sent: Friday, October 26, 2018 11:20
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; char...@adacore.com;
> dero...@adacore.com
> Subject: Re: [PATCH][GCC][mingw-w64][Ada] Fix Ada native bootstrap
&g
mismatch here.
[1] https://github.com/Alexpux/MINGW-packages/pull/3877#issuecomment-408651809
[2] https://gcc.gnu.org/ml/gcc/2018-07/msg00410.html
Bootstrapped on x86_64-pc-linux-gnu and mingw-w64-x86_64.
Ok for trunk?
Thanks,
Tamar
gnattools/ChangeLog:
2018-10-25 Tamar Christina
Hi Richard,
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, October 9, 2018 08:28
> To: Tamar Christina
> Cc: Jeff Law ; gcc-patches@gcc.gnu.org; nd
> ; i...@airs.com
> Subject: RE: [PATCH][GCC][mid-end] Add a hook to support telling the mid-
> end
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: Jeff Law
> Sent: Friday, August 3, 2018 19:03
> To: Tamar Christina ; Joseph Myers
>
> Cc: gcc-patches@gcc.
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Friday, September 28, 2018 17:36
> To: Jeff La
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: James Greenhalgh
> Sent: Tuesday, July 31, 2018 22:02
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; R
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: Jeff Law
> Sent: Wednesday, July 11, 2018 19:53
> To: Tamar Christina ; gcc-patches@gcc.gnu.org
> Cc: nd ; rguen
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Wednesday, September 26, 2018 09:30
>
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: James Greenhalgh
> Sent: Tuesday, August 7, 2018 17:18
> To: Tamar Christina
> Cc: Jeff Law ; gcc-patches@
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: James Greenhalgh
> Sent: Tuesday, September 11, 2018 16:56
> To: Tamar Christina
> Cc: Richard Sandiford ; J
Hi All,
I'm looking for permission to backport this patch to the GCC-8 branch
to fix PR86486.
OK for backport?
Thanks,
Tamar
> -Original Message-
> From: Richard Sandiford
> Sent: Friday, September 28, 2018 18:18
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.
. Manually passed invalid params and still errors out doing target
specific validations. Testsuite also has existing validation tests.
Ok for trunk?
Thanks,
Tamar
gcc/:
2018-10-02 Tamar Christina
* params.c (add_params): Fix initialization.
--
diff --git a/gcc/params.c b/gcc
Hi Alexander,
> -Original Message-
> From: Alexander Monakov
> Sent: Tuesday, October 2, 2018 08:01
> To: Tamar Christina
> Cc: Jeff Law ; gcc-patches@gcc.gnu.org; nd
> ; jos...@codesourcery.com
> Subject: RE: [PATCH][GCC][front-end][opt-framework] Updat
Hi Richard,
Here's the updated patch with all the feedback processed.
I have also run the compile tests through with -mabi=ilp32 as well.
Ok for trunk?
Thanks,
Tamar
The 09/27/2018 12:11, Richard Sandiford wrote:
> > It turns out the testsuite didn't have a case in it which would cause a
> >
Hi All,
This is a minor update to fix stack-check-12.c for ilp32.
The datatype would be too small on ilp32 to require a probe.
gcc/testsuite/
2018-08-28 Tamar Christina
PR target/86486
* gcc.dg/pr82788.c: Skip for AArch64.
* gcc.dg/guality/vla-1.c: Turn off stack
> >
> > The error you would get if you do this is very confusing so I thought
> > since it didn't matter much for the regexp only target triple tests
> > that just accepting this would be fine.
>
> Seems a good thing that that's a noisy failure; the function should
> make up its mind whether it
Hi Richard,
Thanks for the review!
The 09/27/2018 09:40, Richard Sandiford wrote:
> Tamar Christina writes:
> >
> > and no testsuite errors. Difference would depend on your site.exp.
> > On arm we get about 4500 new testcases and on aarch64 the low 10s.
> > On Po
,0x8f,0,0x92,0x2e,0,0x8,0x58,0x1e,0x23,0xb0,0x2,0x22
for a 64KB guard size.
I'm also adding a new testcase that causes a large enough spill to enter the
loop.
Ok for trunk?
Thanks,
Tamar
gcc/
2018-09-27 Tamar Christina
PR target/86486
* config/aarch64/aarch64-protos.h
emantics is confusing at times.).
Ok for trunk?
Thank,
Tamar
gcc/testsuite/
2018-09-26 Tamar Christina
* lib/target-supports.exp (check_cached_effective_target_indexed): New.
(check_cached_effective_target, clear_effective_target_cache): Cleanup.
(check_compile): Suppor
://gcc.gnu.org/ml/gcc-patches/2018-09/msg00555.html
and will be committed with the rest.
Thanks,
Tamar
gcc/ChangeLog:
2018-09-26 Tamar Christina
* config/aarch64/aarch64.c (aarch64_layout_frame): Add assert.
--
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index
specific section.
* config/aarch64/aarch64.md (probe_sve_stack_clash): New.
gcc/testsuite/
2018-09-26 Tamar Christina
PR target/86486
* gcc.target/aarch64/stack-check-prologue-16.c: New test
* gcc.target/aarch64/stack-check-cfa-3.c: New test.
The 09/20/2018 10
Hi Richard,
The 09/11/2018 16:20, Richard Sandiford wrote:
> Tamar Christina writes:
> >> > +
> >> > + /* No probe leave. */
> >> > + ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, loop_end_lab);
> >> > + return "";
> >&
Hi All,
I'm looking for a backport of this patch to GCC8.
Ok for backport?
Thanks,
Tamar
> -Original Message-
> From: Kyrill Tkachov
> Sent: Wednesday, August 15, 2018 15:25
> To: Tamar Christina ; Thomas Preudhomme
>
> Cc: gcc-patches@gcc.gnu.org; nd ; Ra
Hi Richard,
> -Original Message-
> From: Richard Sandiford
> Sent: Tuesday, September 11, 2018 15:49
> To: Tamar Christina
> Cc: Jeff Law ; gcc-patches@gcc.gnu.org; nd
> ; James Greenhalgh ;
> Richard Earnshaw ; Marcus Shawcroft
>
> Subject: Re: [PATCH][
,0,0x8,0x58,0x1e,0x23,0xb0,0x2,0x22
stp x29, x30, [sp]
Ok for trunk?
Thanks,
Tamar
gcc/
2018-09-07 Tamar Christina
PR target/86486
* config/aarch64/aarch64-protos.h
(aarch64_output_probe_sve_stack_clash): New.
* config/aarch64/aarch64.c
Hi Richard,
The 08/28/2018 21:58, Richard Sandiford wrote:
> Tamar Christina writes:
> > + HOST_WIDE_INT guard_used_by_caller = STACK_CLASH_CALLER_GUARD;
> > + /* When doing the final adjustment for the outgoing argument size we
> > can't
> > + assume that LR w
by default.
Ok for trunk?
Thanks,
Tamar
gcc/
2018-08-28 Tamar Christina
PR target/86486
* config/aarch64/aarch64-protos.h
(aarch64_output_probe_sve_stack_clash): New.
* config/aarch64/aarch64.c (aarch64_output_probe_sve_stack_clash): New
/
2018-08-28 Jeff Law
Richard Sandiford
Tamar Christina
PR target/86486
* config/aarch64/aarch64.md
(probe_stack_range): Add k (SP) constraint.
* config/aarch64/aarch64.h (STACK_CLASH_CALLER_GUARD,
STACK_CLASH_MAX_UNROLL_PAGES
Hi All,
Since this patch series now contains SVE support I am removing the changes
to the SVE tests in this patch series. I assume the OK still stands as the
only change here is undoing updates to three files.
Thanks,
Tamar
gcc/testsuite/
2018-08-28 Tamar Christina
PR target/86486
gcc/ChangeLog:
2018-08-15 Tamar Christina
* expmed.c (extract_low_bits): Reject invalid subregs early.
gcc/testsuite/ChangeLog:
2018-08-15 Tamar Christina
* gcc.target/aarch64/large_struct_copy.c: New test.
--
diff --git a/gcc/expmed.c b/gcc/expmed.c
index
Christina
* config/aarch64/aarch64.c (aarch64_expand_movmem): Set TImode max.
gcc/testsuite/
2018-08-15 Tamar Christina
* gcc.target/aarch64/large_struct_copy_2.c: New.
The 08/14/2018 13:34, Sudakshina Das wrote:
> Hi Tamar
>
> On 13/08/18 17:27, Tamar Christina wrot
Hi All,
I'd like to ask for permissions to backport of this patch to GCC 8?
Thanks,
Tamar
> -Original Message-
> From: Kyrill Tkachov
> Sent: Tuesday, July 31, 2018 12:55
> To: Segher Boessenkool
> Cc: gcc-patches@gcc.gnu.org; tnfch...@gcc.gnu.org
> Subject: Re: [PATCH] arm: Generate
Hi Thomas,
Thanks for the review.
I’ll correct the typo before committing if I have no other changes required by
a maintainer.
Regards,
Tamar.
From: Thomas Preudhomme
Sent: Monday, August 13, 2018 14:37
To: Tamar Christina
Cc: gcc-patches@gcc.gnu.org; nd ; James Greenhalgh
; Richard
as we expect but an CImode sized copy won't issue CImode operations.
Bootstrapped and regtested on aarch4-none-linux-gnu and no issues.
Crosstested aarch4_be-none-elf and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/
2018-08-13 Tamar Christina
* config/aarch64/aarch64.c
Ping
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Tamar Christina
> Sent: Tuesday, July 31, 2018 10:47
> To: gcc-patches@gcc.gnu.org
> Cc: nd ; Ramana Radhakrishnan
> ; Richard Earnshaw
> ; ni...@redhat.com; Kyrylo Tkachov
> ; Tho
Hi All,
This is a re-spin of the patch to address review comments.
It mostly just adds more comments and corrects typos.
Ok for trunk?
Thanks,
Tamar
gcc/
2018-08-07 Jeff Law
Richard Sandiford
Tamar Christina
PR target/86486
* config/aarch64
Hi All,
This is a re-spin to address review comments. No code change aside from a
variable rename.
Ok for trunk?
Thanks,
Tamar
gcc/
2018-08-07 Tamar Christina
PR target/86486
* config/aarch64/aarch64.h (STACK_CLASH_MIN_BYTES_OUTGOING_ARGS,
STACK_DYNAMIC_OFFSET
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