Re: Reduce inline limits a bit to compensate changes in inlining metrics

On Fri, 9 Feb 2018, Jan Hubicka wrote: > Hi, > this patch addresses the code size regression by reducing > max-inline-insns-auto 40->30 and increasing inline-min-speedup 8->15. > > The main reason why we need retuning is following > > - inline-min-speedup works in a way that if expected

RE: PING [PATCH] RX movsicc degrade fix

Hi Jakub, Thank you for pointing this out, I'm sorry! Can I create a patch to correct the changelog entries? Best Regards, Sebastian >>1) there should be a space between * and the filename The spaces are there (see the changelog), the renesas mail server removes them sometimes > -Original

Re: [PATCH] Improve dead code elimination with -fsanitize=address (PR84307)

On 12/02/2018 09:56, Richard Biener wrote: >>> I think it does, for both ASAN_CHECK and ASAN_MARK the pointer argument >>> is the second one, the first one is an integer argument with flags. >>> And ASAN_MARK, both poison and unpoison, works kind like a clobber on >>> the >>> referenced variable,

RE: [x86,avx] Fix __builtin_cpu_supports for icelake and cannonlake isa

Hi, There is no PR for this. This builtin was just missing for all new cpus. Thanks, Julia > -Original Message- > From: Kirill Yukhin [mailto:kirill.yuk...@gmail.com] > Sent: Monday, February 12, 2018 7:19 AM > To: Koval, Julia > Cc: 'GCC Patches'

Re: [SFN+LVU+IEPM v4 7/9] [LVU] Introduce location views

On Feb 12 2018, Alexandre Oliva wrote: > On Feb 11, 2018, Andreas Schwab wrote: > >> On Feb 09 2018, Alexandre Oliva wrote: > >>> + if (list_head->vl_symbol && dwarf2out_locviews_in_attribute ()) >>> +{ >>> +

[patch, fortran] Fix handling of assumed-size arrays in inline matmul

Hello world, the attached patch fixes a regression where a rejects-valid would be issued. OK for the affected branches, trunk and gcc-7? Regards Thomas 2018-02-12 Thomas Koenig PR fortran/84270 * frontend-passes (scalarized_expr): If the

Re: PING [PATCH] RX movsicc degrade fix

On Mon, Feb 12, 2018 at 11:06:35AM -, Sebastian Perta wrote: > Thank you for pointing this out, I'm sorry! > Can I create a patch to correct the changelog entries? Yes, and no need to add a ChangeLog entry for ChangeLog changes ;) Jakub

Re: [PATCH] Improve dead code elimination with -fsanitize=address (PR84307)

On Mon, Feb 12, 2018 at 01:02:20PM +0100, Paolo Bonzini wrote: > On 12/02/2018 09:56, Richard Biener wrote: > >>> I think it does, for both ASAN_CHECK and ASAN_MARK the pointer argument > >>> is the second one, the first one is an integer argument with flags. > >>> And ASAN_MARK, both poison and

[PATCH] Add limit for maximal alignment options (PR c/84310).

Hi. Following patch fixes 2 issues with -falign-*: 1) when using -malign-x=16 (or corresponding -falign-* value) then ICE appeared as code in final.c can deal just with limited alignment. 2) thus I also documented and limited the maximum value of -falign-* options. Patch can bootstrap on

Re: PING [PATCH] RX movsicc degrade fix

On Mon, 2018-02-12 at 11:06 +, Sebastian Perta wrote: > > > 1) there should be a space between * and the filename > The spaces are there (see the changelog), the renesas mail server > removes them sometimes You might want to send around your patches as email attachments.  That avoids

[COMMITTED][PATCH][GCC][ARM] Change baseline test from armv5t to armv5te

Hi All, This patch updates the pragma_arch_switch_2.c test to use Armv5te from Armv5t to allow the test to be able to run on hard float configurations. Regtested on arm-none-eabi (no hf as hf trunk was broken) and with explicit hard float abi. Committed under the GCC obvious rules. Thanks,

Add a DECL_EXPR for VLA pointer casts (PR 84305)

This PR was about a case in which we ended up with a MULT_EXPR that was shared between an ungimplified VLA type and a pointer calculation. The SSA names used in the pointer calculation were later freed, but they were still there in the VLA, and caused an ICE when remapping the types during

[PATCH] RISC-V: define _REENTRANT with -pthread

This is expected by the AX_PTHREAD autoconf macro from . * config/riscv/linux.h (CPP_SPEC): Define. diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h index 1da1b0a74e..ad03654e8d 100644 ---

Re: Mising Patch #2 from the RISC-V v3 Submission

On Feb 06 2017, Palmer Dabbelt wrote: > +/* Because RISC-V only has word-sized atomics, it requries libatomic where > + others do not. So link libatomic by default, as needed. */ > +#undef LIB_SPEC > +#ifdef LD_AS_NEEDED_OPTION > +#define LIB_SPEC GNU_USER_TARGET_LIB_SPEC

Re: [PATCH 1/3] Remove support for obsolete x86 -malign-foo options

On 05/06/2017 09:20 AM, Uros Bizjak wrote: > On Tue, Apr 18, 2017 at 8:30 PM, Denys Vlasenko wrote: >> 2017-04-18 Denys Vlasenko >> >> * config/i386/i386-common.c (ix86_handle_option): Remove support >> for obsolete -malign-loops, -malign-jumps

[PATCH] More PR84037 fixing

The following fixes two issues I found while investigating the costing of vectorization for capacita. First we are missing to CSE between SLP instances, that's easy to fix. Second we are double-counting hybrid SLP stmts. Fixing both leads to SLP vectorization being profitable for AVX256 (but

Re: PING [PATCH] RX movsicc degrade fix

On Mon, Feb 12, 2018 at 11:06:35AM -, Sebastian Perta wrote: > Hi Jakub, > > Thank you for pointing this out, I'm sorry! > Can I create a patch to correct the changelog entries? > > Best Regards, > Sebastian > > >>1) there should be a space between * and the filename > The spaces are there

RE: PING [PATCH] RX movsicc degrade fix

Hi Jakub, >>Still missing . at the end of the above line. The sentence continues on the next line (so the "." is there): +* config/rx/constraints.md (CALL_OP_SYMBOL_REF): Added new constraint +to allow or block "symbol_ref" depending on the value of TARGET_JSR. I think this is OK, please

Re: PING [PATCH] RX movsicc degrade fix

On Mon, Feb 12, 2018 at 01:27:24PM -, Sebastian Perta wrote: > --- ChangeLog (revision 257583) > +++ ChangeLog (working copy) > @@ -129,8 +129,7 @@ > > 2018-02-09 Sebastian Perta > > - * config/rx.md: updated "movsicc" expand to be matched by GCC > -

RE: PING [PATCH] RX movsicc degrade fix

HI Jakub, I have updated the changelog entries as per your suggestion. Is this OK? Thank you! Best Regards, Sebastian Index: ChangeLog === --- ChangeLog (revision 257583) +++ ChangeLog (working copy) @@ -129,8 +129,7 @@

Fix VR_ANTI_RANGE handling in intersect_range_with_nonzero_bits (PR 84321)

VR_ANTI_RANGE is basically a union of two ranges, and although intersect_range_with_nonzero_bits had code to deal with the upper one being empty, it didn't handle the lower one being empty. There were also some off-by-one errors. This patch rewrites the code in a hopefully clearer way. Tested on

Re: [PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

Hi Carl, On Fri, Feb 09, 2018 at 02:09:06PM -0800, Carl Love wrote: > As pointed out, the dg arguments in new test file was missing the > {target 128}. I updated the arguments to be  > > { dg-do run { target { int128 && powerpc64*-*-* } } } > > Without the powerpc64*-*-* the test was still

Re: [PATCH][AArch64][1/3] PR target/84164: Simplify subreg + redundant AND-immediate

Hi Richard, On 08/02/18 20:29, Richard Sandiford wrote: Thanks for doing this. Kyrill Tkachov writes: diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 2e7aa5c12952ab1a9b49b5adaf23710327e577d3..af06d7502cebac03cefc689b2646874b8397e767 100644 ---

[PATCH] combine: Update links correctly for new I2 (PR84169)

If there is a LOG_LINK between two insns, this means those two insns can be combined, as far as dataflow is concerned. There never should be a LOG_LINK between two unrelated insns. If there is one, combine will try to combine the insns without doing all the needed checks if the earlier

RE: PR84239, Reimplement CET intrinsics for rdssp/incssp insn

> -Original Message- > From: Sandra Loosemore [mailto:san...@codesourcery.com] > Sent: Friday, February 9, 2018 7:42 PM > To: Tsimbalist, Igor V ; gcc- > patc...@gcc.gnu.org > Cc: Uros Bizjak > Subject: Re: PR84239, Reimplement CET

RE: [PATCH] RL78 new "vector" function attribute

Hi DJ, >>Looks OK to me, but wait a day or two for a docs person to comment on... 6 days no comments so far, can I check in now? >>if the new line is too long There are many other lines which have the same length or are even longer this is why I let it as it is. Also based on comments from

Re: PR84300, ICE in dwarf2cfi on ppc64le

On Sat, Feb 10, 2018 at 02:09:57PM +1030, Alan Modra wrote: > On Fri, Feb 09, 2018 at 08:11:44AM -0600, Segher Boessenkool wrote: > > On Fri, Feb 09, 2018 at 04:12:47PM +1030, Alan Modra wrote: > > > ;; Use r0 to stop regrename twiddling with lr restore insns emitted > > > ;; after the call to

Re: [patch, libfortran] Use flexible array members for array descriptor

On Mon, Feb 12, 2018 at 9:41 PM, Thomas Koenig wrote: > Am 08.02.2018 um 12:27 schrieb Richard Biener: >> >> If the effect of the patch is (it doesn't include generated files) that >> the >> function arguments now have pointers to array descriptor types with >> the flexible

Re: [PATCH] combine: Update links correctly for new I2 (PR84169)

On Mon, Feb 12, 2018 at 05:12:20PM +0100, Jakub Jelinek wrote: > On Mon, Feb 12, 2018 at 03:59:05PM +, Segher Boessenkool wrote: > > If there is a LOG_LINK between two insns, this means those two insns > > can be combined, as far as dataflow is concerned. There never should > > be a LOG_LINK

Re: [RFC PATCH] avoid applying attributes to explicit specializations (PR 83871)

On Mon, Feb 12, 2018 at 11:59 AM, Martin Sebor wrote: > On 02/12/2018 09:30 AM, Jason Merrill wrote: >> >> On Fri, Feb 9, 2018 at 6:57 PM, Martin Sebor wrote: >>> >>> On 02/09/2018 12:52 PM, Jason Merrill wrote: On 02/08/2018 04:52 PM, Martin Sebor

[C++ Patch] PR 84333 ("[6/7/8 Regression] ICE with ternary operator in template function")

Hi, this ICE on valid happens only with checking enabled - that explains why we didn't notice it so far - but I think points to a minor but substantive correctness issue. In short, we ICE when build_conditional_expr calls save_expr, which in turn calls contain_placeholder_p, which doesn't

libgo patch committed: Use write barrier for atomic pointer functions

This patch to the Go frontend uses a write barrier for atomic pointer functions. This copies atomic_pointer.go from 1.10rc2. It was omitted during the transition of the runtime from C to Go, and I forgot about it. This may help with PR 84215; I'm not sure since I haven't been able to recreate

Re: [patch, libfortran] Use flexible array members for array descriptor

Am 08.02.2018 um 12:27 schrieb Richard Biener: If the effect of the patch is (it doesn't include generated files) that the function arguments now have pointers to array descriptor types with the flexible array then yes, that's what will be needed anyways, no need for any dust to settle here.

Go patch committed: error on func declaration/definition

Long long long ago Go permitted writing func F() in one file and writing func F() {} in another file. This was removed from the language, and that is now considered to be a multiple definition error. Gccgo never caught up to that, and it has been permitting this invalid code for some

Go patch committed: error on func declaration/definition

Long long long ago Go permitted writing func F() in one file and writing func F() {} in another file. This was removed from the language, and that is now considered to be a multiple definition error. Gccgo never caught up to that, and it has been permitting this invalid code for some

Re: PING [PATCH] RX movsicc degrade fix

On Mon, Feb 12, 2018 at 01:36:54PM +, Sebastian Perta wrote: > Hi Jakub, > > >>Still missing . at the end of the above line. > > The sentence continues on the next line (so the "." is there): > > +* config/rx/constraints.md (CALL_OP_SYMBOL_REF): Added new constraint > +to allow or block

Re: [RFC PATCH] avoid applying attributes to explicit specializations (PR 83871)

On 02/12/2018 09:30 AM, Jason Merrill wrote: On Fri, Feb 9, 2018 at 6:57 PM, Martin Sebor wrote: On 02/09/2018 12:52 PM, Jason Merrill wrote: On 02/08/2018 04:52 PM, Martin Sebor wrote: I took me a while to find DECL_TEMPLATE_RESULT. Hopefully that's the right way to get

Re: [PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

On Mon, 2018-02-12 at 09:17 -0600, Segher Boessenkool wrote: > Hi Carl, > > On Fri, Feb 09, 2018 at 02:09:06PM -0800, Carl Love wrote: > > As pointed out, the dg arguments in new test file was missing the > > {target 128}.  I updated the arguments to be  > > > > { dg-do run { target { int128

Re: [PATCH rs6000] Fix for builtins-4-runnable.c testcase FAIL on power7/BE 32-bit

Hi Carl, On Mon, Feb 12, 2018 at 08:20:16AM -0800, Carl Love wrote: > On Mon, 2018-02-12 at 09:17 -0600, Segher Boessenkool wrote: > > > Without the powerpc64*-*-* the test was still tried to compiled the > > > test case in 32-bit mode on BE and failed. > > > > If the dg-do target clause fails,

[PR 83990] Fix location handling in ipa_modify_call_arguments

Hi, the callee-side arguments manipulation method used by IPA-SRA has two issues with how it deals with locations. First, it gets the location from expressions in an unreliable way rather than the statements it sees and then it forgets to set a location of one gimple assign it creates. Both is

[PATCH][committed] Fix ICE in maybe_record_trace_start

This was something my tester was tripping over on h8-elf. I was hoping it was going to fix the similar ICEs for the SH port, but alas those are different. The fundamental problem is generic code generated something like this: (set (temp) (plus (stack_pointer_rtx) (const_int)) (set

Re: [Patch, Fortran] PR 84273: Reject allocatable passed-object dummy argument (proc_ptr_47.f90)

2018-02-12 8:22 GMT+01:00 Richard Biener : >> 2018-02-10 0:21 GMT+01:00 Steve Kargl : >> > On Fri, Feb 09, 2018 at 06:13:34PM +0100, Janus Weil wrote: >> >> >> >> the attached patch fixes some checking code for PASS arguments in >> >>

Re: [PATCH] combine: Update links correctly for new I2 (PR84169)

On Mon, Feb 12, 2018 at 03:59:05PM +, Segher Boessenkool wrote: > If there is a LOG_LINK between two insns, this means those two insns > can be combined, as far as dataflow is concerned. There never should > be a LOG_LINK between two unrelated insns. If there is one, combine > will try to

Re: [RFC PATCH] avoid applying attributes to explicit specializations (PR 83871)

On Fri, Feb 9, 2018 at 6:57 PM, Martin Sebor wrote: > On 02/09/2018 12:52 PM, Jason Merrill wrote: >> On 02/08/2018 04:52 PM, Martin Sebor wrote: >>> >>> I took me a while to find DECL_TEMPLATE_RESULT. Hopefully >>> that's the right way to get the primary from a TEMPLATE_DECL.

Re: [PR 83990] Fix location handling in ipa_modify_call_arguments

On Mon, Feb 12, 2018 at 06:35:47PM +0100, Martin Jambor wrote: > Hi, > > the callee-side arguments manipulation method used by IPA-SRA has two > issues with how it deals with locations. First, it gets the location > from expressions in an unreliable way rather than the statements it sees > and

[PATCH] Improve pow (C, x) -> exp (log (C) * x) optimization (PR middle-end/84309, take 2)

On Sat, Feb 10, 2018 at 03:26:46PM +0100, Jakub Jelinek wrote: > If use_exp2 is true and (cfun->curr_properties & PROP_gimple_lvec) == 0, > don't fold it? Then I guess if we vectorize or slp vectorize the pow > as vector pow, we'd need to match.pd it into the exp (log (vec_cst) * x). Here is an

Re: [PATCH] Improve pow (C, x) -> exp (log (C) * x) optimization (PR middle-end/84309)

On Sat, 10 Feb 2018, Wilco Dijkstra wrote: > For floats exp2f is ~10% faster than expf, powf is 2.2 times slower, and > exp10f is 3.2 times slower (slower than powf due to using double pow). I expect it would be reasonably straightforward to adapt Szabolcs's optimized expf to produce an

[PATCH] Fix _vpermi2var3_mask (PR target/84336)

Hi! The following testcase ICEs, because the expander is called with a subreg as operands[2], and gen_lowpart on it creates another subreg from the same pseudo; the instructions rely on match_dup working: (define_insn "*_vpermi2var3_mask" [(set (match_operand:VF_AVX512VL 0 "register_operand"

[committed] Fix OpenMP atomic and for condition C++ parsing (PR c++/84341)

Hi! In these cases, we want the tree to be just a placeholder for the operation plus 2 operands, we are going to take it appart later; by using build_min we can avoid the asserts build2_loc does, because the operands might not have the same type etc. Bootstrapped/regtested on x86_64-linux and

[PATCH] Fix ISA masks for wmmintrin.h builtins (PR target/84335)

Hi! While the documentation only mentions AES resp. PCLMUL CPUIDs for these intrinsics, they use and return V2DImode vectors and V2DImode is only in VALID_SSE2_REG_MODE and VALID_AVX512VL_128_REG_MODE, so without -msse2 we can't create registers with that mode. Fixed thusly,

Re: [PATCH] RISC-V: define _REENTRANT with -pthread

On 02/12/2018 03:15 AM, Andreas Schwab wrote: This is expected by the AX_PTHREAD autoconf macro from . * config/riscv/linux.h (CPP_SPEC): Define. OK. Jim

Re: Mising Patch #2 from the RISC-V v3 Submission

On 02/12/2018 03:23 AM, Andreas Schwab wrote: On Feb 06 2017, Palmer Dabbelt wrote: +/* Because RISC-V only has word-sized atomics, it requries libatomic where + others do not. So link libatomic by default, as needed. */ +#undef LIB_SPEC +#ifdef LD_AS_NEEDED_OPTION

Re: [patch, libfortran] Use flexible array members for array descriptor

On Mon, Feb 12, 2018 at 08:41:56PM +0100, Thomas Koenig wrote: > Am 08.02.2018 um 12:27 schrieb Richard Biener: > > If the effect of the patch is (it doesn't include generated files) that the > > function arguments now have pointers to array descriptor types with > > the flexible array then yes,

[patch, testcase, fortran, committed] Fix read_dir.f90

Hello world, I just committed (in two attempts...) the patch below as obvious. Reading a byte is fine on some operating systems, just not on Linux. I verified this on AIX first. I'll keep the PR open for a few days to see if this fix really works on all affected system. Regards

[PATCH] Fix get_range_strlen (PR tree-optimization/84339)

Hi! get_range_strlen fails to tell the caller that array_at_struct_end_p has been involved in cases like (>arr[0]), while it handles (ptr->arr). Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2018-02-12 Jakub Jelinek PR

[PATCH, rs6000] fix-up le-altivec-const.c and altivec-const.c tests

Hi, Noticed during review of test results. I expect the intent here was to compile in cases where the run command was not valid. But for the scan-assembler stanza to work, need to have compile results in all cases. /* { dg-do run { target { powerpc*-*-* && vmx_hw } } } */ /* { dg-do compile {

Re: [PATCH 1/3] Add PTWRITE builtins for x86

On Sun, 11 Feb 2018, Andi Kleen wrote: > @@ -27064,6 +27064,9 @@ preferred alignment to > @option{-mpreferred-stack-boundary=2}. > @itemx -mfsgsbase > @opindex mfsgsbase > @need 200 > +@itemx -mptwrite > +@opindex mptwrite > +@need 200 > @itemx -mrdrnd > @opindex mrdrnd > @need 200 This

Re: [patch, libfortran] Use flexible array members for array descriptor

Hi Jakub, Or if we have some easy way to find out what objects will need local variables with descriptors (those need the non-flexible array member stuff) and others (e.g. dummy arguments etc.) where we could use just the flexible array members. Descriptors are used for passing arguments to

Re: PING Fwd: [patch] implement generic debug() for vectors and hash sets

On Mon, Nov 20, 2017 at 6:47 AM, Aldy Hernandez wrote: > Minor oversight... > > debug_vec_tree() no longer exist. I forgot to remove the prototype. > > Also, gdbinit.in has a macro that uses it, but this is no longer > necessary as we can print tree vectors generically with

Re: Add a DECL_EXPR for VLA pointer casts (PR 84305)

On Mon, 12 Feb 2018, Richard Sandiford wrote: > 2018-02-11 Richard Sandiford > > gcc/c/ > PR c/84305 > * c-decl.c (grokdeclarator): Create an anonymous TYPE_DECL > in PARM and TYPENAME contexts too, but attach it to a BIND_EXPR > and

Re: Mising Patch #2 from the RISC-V v3 Submission

On Mon, 12 Feb 2018, Andreas Schwab wrote: > On Feb 06 2017, Palmer Dabbelt wrote: > > > +/* Because RISC-V only has word-sized atomics, it requries libatomic where > > + others do not. So link libatomic by default, as needed. */ > > +#undef LIB_SPEC > > +#ifdef

Re: [PATCH, rs6000] fix-up le-altivec-const.c and altivec-const.c tests

Hi! On Mon, Feb 12, 2018 at 03:35:27PM -0600, Will Schmidt wrote: > Noticed during review of test results. I expect the intent > here was to compile in cases where the run command was not > valid. > But for the scan-assembler stanza to work, need to have compile results > in all cases. > ---

Re: [PATCH] Improve dead code elimination with -fsanitize=address (PR84307)

On Fri, Feb 9, 2018 at 9:10 PM, Richard Biener wrote: > On February 9, 2018 7:07:45 PM GMT+01:00, Jakub Jelinek > wrote: >>On Fri, Feb 09, 2018 at 07:01:08PM +0100, Richard Biener wrote: >>> >which indeed fixes the testcase and seems not to break

[PATCH][committed][PR target/83760] Fix several instances of maybe_record_trace_start ICEs on sh

The SH port has a pass which looks for suitable places to put its constant table. Ideally it finds a barrier (within a certain range from the first use of the pool) and shoves the constant pool after that barrier. Otherwise it'll create jump/barrier/ style sequence and insert the constant pool

Re: Merge from trunk to gccgo branch

I merged trunk revision 257610 to the gccgo branch. Ian

[PATCH] adjust warning_n() to take uhwi (PR 84207)

Bug 84207 - Hard coded plural in gimple-fold.c points out one of a number of warning_at() calls where warning_n() should have been used. The attached patch both replaces the calls and also changes the signatures of the warning_n(), error_n(), and inform_n() functions to take an unsigned

Re: [PING #3] [PATCH] make -Wrestrict for strcat more meaningful (PR 83698)

Ping: https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01488.html On 02/05/2018 08:20 PM, Martin Sebor wrote: Ping: https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01488.html As I mentioned, this doesn't solve a regression per se but rather implements what I consider an important usability

[PATCH, rs6000] Fix PR84279, powerpc64le ICE on cvc4

PR84279 is a similar problem to PR83399, in that we generate an altivec load/store through an explicit call to the altivec_{l,st}vx_v4si_2op pattern and then due to spilling, we end up calling recog() and we match an earlier pattern, in this case vsx_movv4si_64bit. That is ok, since this pattern

[PATCH] diagnose specializations of deprecated templates (PR c++/84318)

While testing my fix for 83871 (handling attributes on explicit specializations) I noticed another old regression: while GCC 4.4 would diagnose declarations of explicit soecializations of all primary templates declared deprecated, GCC 4.5 and later only diagnose declarations of explicit

Re: [RFC PATCH] avoid applying attributes to explicit specializations (PR 83871)

On 02/12/2018 10:11 AM, Jason Merrill wrote: On Mon, Feb 12, 2018 at 11:59 AM, Martin Sebor wrote: On 02/12/2018 09:30 AM, Jason Merrill wrote: On Fri, Feb 9, 2018 at 6:57 PM, Martin Sebor wrote: On 02/09/2018 12:52 PM, Jason Merrill wrote: On

[RFC] Tree loop unroller pass

Hi All, Based on the previous discussions, I tried to implement a tree loop unroller for partial unrolling. I would like to queue this RFC patches for next stage1 review. In summary: * Cost-model for selecting the loop uses the same params used elsewhere in related optimizations. I was told

[RFC][AARCH64] Machine reorg pass for aarch64/Falkor to handle prefetcher tag collision

Implements a machine reorg pass for aarch64/Falkor to handle prefetcher tag collision. This is strictly not part of the loop unroller but for Falkor, unrolling can make h/w prefetcher performing badly if there are too much tag collisions based on the discussions in

Re: [PATCH 1/2] Untangle stddef.h a little

ping, let me know if there is anything wrong with it.

Re: [PATCH] Improve dead code elimination with -fsanitize=address (PR84307)

On 09/02/2018 19:07, Jakub Jelinek wrote: > On Fri, Feb 09, 2018 at 07:01:08PM +0100, Richard Biener wrote: >>> which indeed fixes the testcase and seems not to break asan.exp. >> >> Huh. Need to double check why that makes sense ;) > > I think it does, for both ASAN_CHECK and ASAN_MARK the

Re: [PATCH] RL78 new "vector" function attribute

"Sebastian Perta" writes: >>>Looks OK to me, but wait a day or two for a docs person to comment on... > 6 days no comments so far, can I check in now? Yup, go ahead. >>>if the new line is too long > There are many other lines which have the same length or are even

[RFC] Tree Loop Unroller Pass

Implements tree loop unroller using the infrastructure provided. gcc/ChangeLog: 2018-02-12 Kugan Vivekanandarajah * Makefile.in (OBJS): Add tree-ssa-loop-unroll.o. * common.opt (ftree-loop-unroll): New option. * passes.def: Add pass_tree_loop_uroll *

[RFC] Adds a target hook

Adds a target hook TARGET_HW_MAX_MEM_READ_STREAMS. Loop unroller, if defined, will try to limit the unrolling factor based on this. gcc/ChangeLog: 2018-02-12 Kugan Vivekanandarajah * doc/tm.texi.in (TARGET_HW_MAX_MEM_READ_STREAMS): Dcoument. * doc/tm.texi:

[RFC][AARCH64] Implements target hook

Implements target hook TARGET_HW_MAX_MEM_READ_STREAMS for aarch64 gcc/ChangeLog: 2018-02-12 Kugan Vivekanandarajah * config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): Add new entry hw_prefetchers_avail. * config/aarch64/aarch64.c

Re: [SFN+LVU+IEPM v4 9/9] [IEPM] Introduce inline entry point markers

On Feb 9, 2018, Alexandre Oliva wrote: > On Feb 9, 2018, Jakub Jelinek wrote: >> On Fri, Feb 09, 2018 at 07:01:25PM -0200, Alexandre Oliva wrote: >>> So, as discussed on IRC, I'm trying to use a target hook to allow >>> targets to indicate that their

Re: [PATCH] Fix _vpermi2var3_mask (PR target/84336)

Hello Jakub! > On 13 Feb 2018, at 00:59, Jakub Jelinek wrote: > > Hi! > > The following testcase ICEs, because the expander is called with > a subreg as operands[2], and gen_lowpart on it creates another subreg > from the same pseudo; the instructions rely on match_dup

Re: [SFN+LVU+IEPM v4 7/9] [LVU] Introduce location views

On Feb 12, 2018, Andreas Schwab wrote: > On Feb 12 2018, Alexandre Oliva wrote: >> On Feb 11, 2018, Andreas Schwab wrote: >> >>> On Feb 09 2018, Alexandre Oliva wrote: >> + if (list_head->vl_symbol &&