[gem5-dev] Change in gem5/gem5[master]: cpu: Refactored branch predictor common functionalities

: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I23cecbc5502f5433fc17589ec733a38e295f2ae9 Gerrit-Change-Number: 19349 Gerrit-PatchSet: 3 Gerrit-Owner: Jairo Balart Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Ilias

[gem5-dev] Change in gem5/gem5[master]: cpu: Refactored branch predictor common functionalities

Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I23cecbc5502f5433fc17589ec733a38e295f2ae9 Gerrit-Change-Number: 19349 Gerrit-PatchSet: 2 Gerrit-Owner: Jairo Balart Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Ilias Vougioukas Gerrit

[gem5-dev] Change in gem5/gem5[master]: cpu: Added MTAGE-SC and multi-poTAGE+SC branch predictors

Jairo Balart has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/19350 Change subject: cpu: Added MTAGE-SC and multi-poTAGE+SC branch predictors .. cpu: Added MTAGE-SC and

[gem5-dev] Change in gem5/gem5[master]: cpu: Refactored branch predictor common functionalities

include "cpu/pred/counter_functions.hh" #include "debug/TageSCL.hh" TAGE_SC_L_8KB_StatisticalCorrector::TAGE_SC_L_8KB_StatisticalCorrector( @@ -145,11 +146,11 @@ // (they do not seem to depend on any parameter) for (int i = 1; i <= nHistoryTables; i++) {

[gem5-dev] Change in gem5/gem5[master]: cpu: Added MTAGE-SC and multi-poTAGE+SC branch predictors

Gerrit-Owner: Pau Cabre Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Ilias Vougioukas Gerrit-Reviewer: Jairo Balart Gerrit-Reviewer: Pau Cabre Gerrit-Reviewer: Sudhanshu Jha Gerrit-MessageType: newpatchset __

[gem5-dev] Change in gem5/gem5[master]: cpu: Make the indirect predictor into a SimObject

const bool hashTargets; +const unsigned numSets; +const unsigned numWays; +const unsigned tagBits; +const unsigned pathLength; +const unsigned instShift; +const unsigned ghrNumBits; +const unsigned ghrMask; + +struct IPredEntry + { + IPredEntry() : tag(0), target(0)

[gem5-dev] Change in gem5/gem5[master]: config: add an option to list and select indirect branch predictor

ons.indirect_bp_type) +system.cpu[i].branchPred.indirectBranchPred = indirectBPClass() + system.cpu[i].createThreads() system.redirect_paths = redirect_paths(os.path.expanduser(options.chroot)) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15320 To unsubscribe, o

[gem5-dev] Change in gem5/gem5[master]: config: add command line flags to list and select available indirect ...

Gerrit-Branch: master Gerrit-Change-Id: I9a855d36de7d95b7785ff8a897899037cea6a3d8 Gerrit-Change-Number: 15320 Gerrit-PatchSet: 4 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Jairo Balart Gerrit-CC: Pau Cabre Gerrit-MessageType

[gem5-dev] Change in gem5/gem5[master]: cpu: Make the indirect predictor into a SimObject

-Change-Id: Ice6549773def7d3e944fae450d4a079bc351e2ba Gerrit-Change-Number: 15319 Gerrit-PatchSet: 3 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Andreas Sandberg Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Ivan Pizarro Gerrit-CC: Pau Cabre

[gem5-dev] Change in gem5/gem5[master]: cpu: Fixed the indirect branch predictor GHR handling

sit https://gem5-review.googlesource.com/c/public/gem5/+/16928 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ibc797816974cba6719da65122801e8919559a003 Gerrit-Change-Number: 16928 Gerr

[gem5-dev] Change in gem5/gem5[master]: config: add command line flags to list and select available indirect ...

Gerrit-Branch: master Gerrit-Change-Id: I9a855d36de7d95b7785ff8a897899037cea6a3d8 Gerrit-Change-Number: 15320 Gerrit-PatchSet: 3 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Jairo Balart Gerrit-CC: Pau Cabre Gerrit-MessageType

[gem5-dev] Change in gem5/gem5[master]: cpu: move indirect predictor interface to a base class inheriting fro...

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[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 CPU interface code and fixes

-PatchSet: 2 Gerrit-Owner: Jairo Balart Gerrit-Reviewer: Giacomo Travaglini Gerrit-CC: Juha Jäykkä Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 code

edFor1toNInterrupt(Gicv3::GroupId group) const; +void deactivateIRQ(uint32_t int_id); -Gicv3CPUInterface * +inline Gicv3CPUInterface * getCPUInterface() const { return cpuInterface; } -bool canBeSelectedFor1toNInterrupt(Gicv3::GroupId group); +Gicv3::Gro

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 code

: I9aba90022f6408838c4ab87c6b90bba438752e53 Gerrit-Change-Number: 16222 Gerrit-PatchSet: 9 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-Reviewer: Juha Jäykkä Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 code

: I9aba90022f6408838c4ab87c6b90bba438752e53 Gerrit-Change-Number: 16222 Gerrit-PatchSet: 8 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-Reviewer: Juha Jäykkä Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: dev-arm: LPI support for GICv3. This doesn't include an ITS model.

Gerrit-Change-Id: Ia2c02cca4f95672d6361fba16201a56e2047ddb7 Gerrit-Change-Number: 16142 Gerrit-PatchSet: 6 Gerrit-Owner: Jairo Balart Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-MessageType: newpatchset ___ gem5-dev mailing

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 CPU interface code and fixes

Jairo Balart has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/16484 Change subject: dev-arm: cleanup of gicv3 CPU interface code and fixes .. dev-arm: cleanup of gicv3 CPU interface

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 code

Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I9aba90022f6408838c4ab87c6b90bba438752e53 Gerrit-Change-Number: 16222 Gerrit-PatchSet: 2 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Juha Jäykkä Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo

[gem5-dev] Change in gem5/gem5[master]: dev-arm: cleanup of gicv3 code

Jairo Balart has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/16222 Change subject: dev-arm: cleanup of gicv3 code .. dev-arm: cleanup of gicv3 code Change-Id:

[gem5-dev] Change in gem5/gem5[master]: dev-arm: LPI support for GICv3

<< 0; static const uint32_t GICR_CTLR_DPG0 = 1 << 24; static const uint32_t GICR_CTLR_DPG1NS = 1 << 25; static const uint32_t GICR_CTLR_DPG1S = 1 << 26; -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/16142 To unsubscribe, or for help

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 11 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jairo

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 10 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: cpu: ITTAGE indirect branch predictor model

// Update fetch histories +//void fetchHistoryUpdate(Addr pc, uint16_t br_type, bool taken, +// Addr target, ThreadID tid); +void historyUpdate(ThreadID tid, Addr branch_pc, bool taken, + void * bp_history, const StaticInstPtr & inst, + Addr target) override; + +void historyUpdate(ThreadID tid, Addr branch_pc, bool taken, void * b, + Addr target, bool at_fetch); + +// Predictor update +void updateBrIndirect(Addr pc, uint16_t br_type, bool taken, Addr target, + ThreadID tid, void * indirect_history); + +}; +#endif // __CPU_PRED_ITTAGE -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15335 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie0ee7fe31ffe5177042ffddd61d2099bcf14b9cb Gerrit-Change-Number: 15335 Gerrit-PatchSet: 1 Gerrit-Owner: Jairo Balart Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support

-PatchSet: 6 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 8 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support

, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I6fd14138d94654e8e60cde08239ea9a50fc19eb7 Gerrit-Change-Number: 14255 Gerrit-PatchSet: 5 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 7 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: system-arm: Add device tree for new VExpress GEM5_V2 platform

"oscclk7"; + }; + }; + + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <_sysreg>; + arm,vexpress,site = <0>; + + osc_peripheral: os

[gem5-dev] Change in gem5/gem5[master]: system-arm: Add aarch64 bootloader support for GICv3

gem5/+/13435 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: If75262709868cc59d320f60273a32397339f1dd5 Gerrit-Change-Number: 13435 Gerrit-PatchSet: 3 Gerrit-Owner: Jairo Balart Ger

[gem5-dev] Change in gem5/gem5[master]: config: add command line flags to list and select available indirect ...

g.get(options.bp_type) system.cpu[i].branchPred = bpClass() +if options.indirect_bp_type: +indirectBPClass = BPConfig.get_indirect(options.indirect_bp_type) +system.cpu[i].branchPred.indirectBranchPred = indirectBPClass() + system.cpu[i].createThreads() if options.ruby: -

[gem5-dev] Change in gem5/gem5[master]: cpu: move indirect predictor interface to a base class inheriting fro...

= 0; +virtual void deleteDirectionInfo(ThreadID tid, + void * indirect_history) = 0; +}; + +#endif // __CPU_PRED_INDIRECT_BASE_HH__ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15319 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ice6549773def7d3e944fae450d4a079bc351e2ba Gerrit-Change-Number: 15319 Gerrit-PatchSet: 1 Gerrit-Owner: Jairo Balart Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: cpu: Proposal for changing the indirect branch predictor interface

void squash(ThreadID tid, void *bp_history); -unsigned getGHR(ThreadID tid, void *bp_history) const; - private: /** * Returns if the branch should be taken or not, given a counter -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15318 To unsubscribe, o

[gem5-dev] Change in gem5/gem5[master]: cpu: move TAGE predictor code to a base class not inheriting from BPr...

Jairo Balart has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/15317 Change subject: cpu: move TAGE predictor code to a base class not inheriting from BPredUnit. .. cpu: move TAGE

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 6 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

: Ib0067fc743f84ff7be9f12d2fc33ddf63736bdd1 Gerrit-Change-Number: 13436 Gerrit-PatchSet: 5 Gerrit-Owner: Jairo Balart Gerrit-Assignee: Giacomo Travaglini Gerrit-Reviewer: Jairo Balart Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Matteo Andreozzi Gerrit-MessageType: newpatchset

[gem5-dev] Change in gem5/gem5[master]: system-arm: Add device tree for new VExpress GEM5_V2 platform

#clock-cells = <0>; + clock-output-names = "oscclk7"; + }; + }; + + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <_sysreg>; + arm,

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support

t: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I6fd14138d94654e8e60cde08239ea9a50fc19eb7 Gerrit-Change-Number: 14255 Gerrit-PatchSet: 1 Gerrit-Owner: Jairo Balart Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GICv3 model

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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add GICv3 MiscRegs

quot;icc_igrpen0", +"icc_igrpen1", +"icc_igrpen1_ns", +"icc_igrpen1_s", +"icc_mctlr", +"icc_mgrpen1", +"icc_msre", +"icc_pmr", + "icc_rpr"

[gem5-dev] Change in gem5/gem5[master]: - Add new ARM platform VExpress_GEM5_V2 with GICv3. Support up to 256...

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[gem5-dev] Change in gem5/gem5[master]: system-arm: Add aarch64 bootloader support for GICv3

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[gem5-dev] Change in gem5/gem5[master]: boot_emm_v2.arm64: new bootloader for ARM platforms with GICv3.

f1dd5 Gerrit-Change-Number: 13435 Gerrit-PatchSet: 1 Gerrit-Owner: Jairo Balart Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev