Re: [gem5-dev] Combining Master & Slave port in GEM5-TLM

2017-07-21 Thread Qureshi Yasir Mahmood
. Do you have any idea why is that so ? Or did you face a similar problem ? Regards Yasir -Original Message- From: Qureshi Yasir Mahmood Sent: 19 July 2017 10:37 To: gem5 Developer List <gem5-dev@gem5.org> Subject: RE: [gem5-dev] Combining Master & Slave port in GEM5-TLM H

Re: [gem5-dev] Combining Master & Slave port in GEM5-TLM

2017-07-19 Thread Qureshi Yasir Mahmood
ny Phone: +49 631 205 3579 Fax: +49 631 205 4437 jun...@eit.uni-kl.de http://ems.eit.uni-kl.de > Am 18.07.2017 um 19:04 schrieb Qureshi Yasir Mahmood <yasir.qure...@epfl.ch>: > > Hi, > > In GEM5-TLM, there are two separate examples for master_port and slave_po

[gem5-dev] Combining Master & Slave port in GEM5-TLM

2017-07-18 Thread Qureshi Yasir Mahmood
Hi, In GEM5-TLM, there are two separate examples for master_port and slave_port. I am thinking to combine, so that in the same simulation we have both the master_port as well as slave_port in the TLM world. When looking into this, I realized we have this sim_control, to which I can either bind

Re: [gem5-dev] Heterogeneous ISA Simulation Support

2017-06-21 Thread Qureshi Yasir Mahmood
Cheers, Christian On Thursday, 2 June 2016 17:09:52 CEST Qureshi Yasir Mahmood wrote: > Dear All, > > I am considering to use GEM5 for simulating heterogeneous ISA systems, eg. > ARM-x86 systems in a single simulation. I have went through the > archives and seen that this is wasn't

Re: [gem5-dev] GEM5-to-TLM Memory/Accelerator Access

2017-06-20 Thread Qureshi Yasir Mahmood
E Mode' and will look into this issue when I find the time. Best regards, Christian Menard On Monday, 19 June 2017 16:14:27 CEST Qureshi Yasir Mahmood wrote: > Hi All, > > I am trying to setup a GEM5-to-TLM simulation with GEM5 in ARM SE mode > and SimpleMemory as the physica

[gem5-dev] GEM5-to-TLM Memory/Accelerator Access

2017-06-19 Thread Qureshi Yasir Mahmood
Hi All, I am trying to setup a GEM5-to-TLM simulation with GEM5 in ARM SE mode and SimpleMemory as the physical memory. I intend to model an accelerator in SystemC in the TLM world. I want my accelerator to start when I signal it through some memory mapped register (effectively addressing a

Re: [gem5-dev] changeset in gem5: arm: disable GIC extensions

2017-05-24 Thread Qureshi Yasir Mahmood
Hello, Can someone please explain the reason to disable GEM5 GIC extensions as in this update ? I am asking because, I am using Linux kernel v4.3 with Ubuntu 16.04 for ARM FS simulation. So before this change everything was working fine for me, but after this, the system does not boot up.

Re: [gem5-dev] Installing a Compiled Kernel to Disk Image for ARM

2016-08-12 Thread Qureshi Yasir Mahmood
y gem5. The disk image isn’t used until the kernel starts its block drivers (e.g., IDE or VirtIO). If you use configs/examples/fs.py, you tell gem5 to use a new kernel by passing the --kernel argument. Cheers, Andreas On 25/07/2016, 16:43, "gem5-dev on behalf of Qureshi Yasir Mahmood"

[gem5-dev] Installing a Compiled Kernel to Disk Image for ARM

2016-07-25 Thread Qureshi Yasir Mahmood
Hi, I have compiled a linux kernel as instructed on the wiki http://www.m5sim.org/ARM_Linux_Kernel. Can anyone let me know as to how to create a disk image from this compiled kernel, or how to install the kernel on to a disk image ? Regards Yasir

[gem5-dev] VMs in ARM FS Simulation

2016-07-15 Thread Qureshi Yasir Mahmood
Hello, I am need to run VM in ARM FS simulation, i.e the VMs will run on top of the linux that is running in ARM FS simulation. I cannot use KVM because my host machine is x86 and I am simulating ARM ISA. Does anyone has any suggestions to as to how to run any other virtualization software in

Re: [gem5-dev] ARM KVM Support - GEM5 Running on X86

2016-07-13 Thread Qureshi Yasir Mahmood
ndreas On 13/07/2016, 11:41, "gem5-dev on behalf of Qureshi Yasir Mahmood" <gem5-dev-boun...@gem5.org on behalf of yasir.qure...@epfl.ch> wrote: >Hi, > >I am running GEM5 on x86 host. When I do a scons build for ARM, I get a >message > >"Info: KVM support di

[gem5-dev] ARM KVM Support - GEM5 Running on X86

2016-07-13 Thread Qureshi Yasir Mahmood
Hi, I am running GEM5 on x86 host. When I do a scons build for ARM, I get a message "Info: KVM support disabled due to unsupported host and target ISA combination" So now if I run a FS simulation for ARM on GEM5 running on x86 host, will I get KVM ARM support or not ? My understanding of the

[gem5-dev] Heterogeneous ISA Simulation Support

2016-06-02 Thread Qureshi Yasir Mahmood
Dear All, I am considering to use GEM5 for simulating heterogeneous ISA systems, eg. ARM-x86 systems in a single simulation. I have went through the archives and seen that this is wasn't supported 2 years ago. Is there any update regarding this or is this still not supported today ? Thank you