Hi Boris, Gabe,
I've just uploaded patchset 4 with these changes:
[1] switch back to the use of INTREG_* for the special-purpose registers
https://gem5-review.googlesource.com/c/public/gem5/+/40882/
[2] rebase on top of the latest "develop" branch
[3] use of arch/power/regs/*.h as a result
atlassian.net/browse/GEM5-959
> <https://gem5.atlassian.net/browse/GEM5-959>
> but I left the "Assignee" field blank as I will leave the choice to you
> whether
> you prefer to have your or my name in that field.
>
> -"Sandipan Das via gem5-dev" <ma
Hi Boris,
On 14/04/21 11:43 pm, Boris Shingarov wrote:
> Hi Sandipan,
>
> I notice some of the commits (which were, if not blocking reviewing other
> commits, but at least making comprehension of the whole body of commits
> harder
> for me) are ready for merge, for example
>
Hi Gabe,
On 25/02/21 1:10 pm, Gabe Black wrote:
> Hi Sandipan. You are correct, except that I would say you don't need to
> force push, just regular push. If I were at the head of a branch I wanted
> to (re)upload to gerrit, I would run:
>
> git push origin HEAD:refs/for/develop
>
> Gerrit will
Hello Boris, Gabe,
I think I now have a good amount of changes to address from the initial
posting of the patch series. In case of mailing list based reviews, we
would typically post the whole series again with a V2 tag but I guess
Gerrit tracks changes based on Change-Id.
So as long as the
+CC: Luke
On 08/02/21 10:26 am, Sandipan Das wrote:
> Hello Boris, Gabe,
>
> I have rebased and pushed the changes to gerrit.
> This is link to the first patch in the series:
> https://gem5-review.googlesource.com/c/public/gem5/+/40880
>
>
___
Hello Gabe,
On 08/02/21 10:58 am, Gabe Black wrote:
> Thanks, I took a very quick pass through them, primarily looking for places
> touched outside of the arch/power directory (where the impact is larger).
> The only two things I saw were where you added an #if THE_ISA in the CPU
> (not ok, has
Hello Boris, Gabe,
I have rebased and pushed the changes to gerrit.
This is link to the first patch in the series:
https://gem5-review.googlesource.com/c/public/gem5/+/40880
- Sandipan
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On 05/02/21 6:06 pm, Gabe Black wrote:
> Re my commit, please feel free to add back the constants you need. I'm
> probably going to try splitting up the ISA constants consumed by non-ISA
> code from the ones that are internally used in registers.hh since I'm
> trying to get rid of the former,
Hello Boris,
On 04/02/21 10:08 pm, Boris Shingarov wrote:
> > The current sequence breaks 32-bit support in
> > the beginning and then restores it back towards the end.
> > Wondering if that could be a problem with the CI?
>
> I would be surprised if there is even any POWER-specific CI at
Hello Boris,
On 04/02/21 12:43 am, Boris Shingarov wrote:
>> I think I had come across that problem too but I am sure
>> that one of my patches will fix that. Probably this one
>
> Yes -- that's what I meant by "commits related to 3dd04381".
> So, let's start with this small area.
>
Sure.
>>
On 03/02/21 11:59 pm, Sandipan Das wrote:
> Hello Boris,
>
> On 03/02/21 2:34 am, Boris Shingarov wrote:
>> Hi Sandipan,
>>
>>> This makes it possible
>>> to run both 32-bit and 64-bit big and little endian PowerPC binaries
>>> in SE mode. If its okay with you, we can start by working on
Hello Boris,
On 03/02/21 2:34 am, Boris Shingarov wrote:
> Hi Sandipan,
>
>> This makes it possible
>> to run both 32-bit and 64-bit big and little endian PowerPC binaries
>> in SE mode. If its okay with you, we can start by working on trying to
>> get these changes reviewed and merged first.
>
Hello Boris,
On 02/02/21 12:16 am, Boris Shingarov wrote:
> Dear Basavaraj, Sandipan and other contributors to power-gem5:
>
> I am currently the maintainer of arch-power in gem5 and I am interested in
> upstreaming power-gem5 to the mainline gem5. My understanding from your
Glad to hear
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