[gem5-dev] Change in gem5/gem5[master]: mem-cache: Insert on block allocation
Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/10812
Change subject: mem-cache: Insert on block allocation
..
mem-cache: Insert on block allocation
When a block is being replaced in an allocation, if successfull,
the block will be inserted. Therefore we move the insertion
functionality to allocateBlock().
allocateBlock's signature has been modified to allow this
modification.
Change-Id: I60d17a83ff4f3021fdc976378868ccde6c7507bc
---
M src/mem/cache/base.cc
M src/mem/cache/base.hh
2 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index a8f29e3..f5431f2 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -971,13 +971,12 @@
if (!blk) {
// need to do a replacement
-blk = allocateBlock(pkt->getAddr(), pkt->isSecure(),
writebacks);
+blk = allocateBlock(pkt, writebacks);
if (!blk) {
// no replaceable block available: give up, fwd to next
level.
incMissCount(pkt);
return false;
}
-tags->insertBlock(pkt, blk);
blk->status |= (BlkValid | BlkReadable);
}
@@ -1029,15 +1028,13 @@
return false;
} else {
// a writeback that misses needs to allocate a new block
-blk = allocateBlock(pkt->getAddr(), pkt->isSecure(),
-writebacks);
+blk = allocateBlock(pkt, writebacks);
if (!blk) {
// no replaceable block available: give up, fwd to
// next level.
incMissCount(pkt);
return false;
}
-tags->insertBlock(pkt, blk);
blk->status |= (BlkValid | BlkReadable);
}
@@ -1125,7 +1122,7 @@
// need to do a replacement if allocating, otherwise we stick
// with the temporary storage
-blk = allocate ? allocateBlock(addr, is_secure, writebacks) :
nullptr;
+blk = allocate ? allocateBlock(pkt, writebacks) : nullptr;
if (!blk) {
// No replaceable block or a mostly exclusive
@@ -1136,8 +1133,6 @@
tempBlock->insert(addr, is_secure);
DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr,
is_secure ? "s" : "ns");
-} else {
-tags->insertBlock(pkt, blk);
}
// we should never be overwriting a valid block
@@ -1206,8 +1201,14 @@
}
CacheBlk*
-BaseCache::allocateBlock(Addr addr, bool is_secure, PacketList )
+BaseCache::allocateBlock(const PacketPtr pkt, PacketList )
{
+// Get address
+const Addr addr = pkt->getAddr();
+
+// Get secure bit
+const bool is_secure = pkt->isSecure();
+
// Find replacement victim
std::vector evict_blks;
CacheBlk *victim = tags->findVictim(addr, is_secure, evict_blks);
@@ -1258,6 +1259,9 @@
}
}
+// Insert new block at victimized entry
+tags->insertBlock(pkt, victim);
+
return victim;
}
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 6600aeb..4ba256b 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -659,14 +659,14 @@
*
* Find a victim block and if necessary prepare writebacks for any
* existing data. May return nullptr if there are no replaceable
- * blocks.
+ * blocks. If a replaceable block is found, it inserts the new block in
+ * its place. The new block, however, is not set as valid yet.
*
- * @param addr Physical address of the new block
- * @param is_secure Set if the block should be secure
+ * @param pkt Packet holding the address to update
* @param writebacks A list of writeback packets for the evicted blocks
* @return the allocated block
*/
-CacheBlk *allocateBlock(Addr addr, bool is_secure, PacketList
);
+CacheBlk *allocateBlock(const PacketPtr pkt, PacketList );
/**
* Evict a cache block.
*
--
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[gem5-dev] Change in gem5/gem5[master]: mem-cache: Make packet const in insertBlock
Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/10811
Change subject: mem-cache: Make packet const in insertBlock
..
mem-cache: Make packet const in insertBlock
The packet should not be modified within insertBlock.
Change-Id: If7d2b01fe131f9923194efd155c9e85eeab24d5a
---
M src/mem/cache/tags/base.cc
M src/mem/cache/tags/base.hh
M src/mem/cache/tags/base_set_assoc.hh
M src/mem/cache/tags/fa_lru.cc
M src/mem/cache/tags/fa_lru.hh
M src/mem/cache/tags/sector_tags.cc
M src/mem/cache/tags/sector_tags.hh
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc
index caed594..9548d49 100644
--- a/src/mem/cache/tags/base.cc
+++ b/src/mem/cache/tags/base.cc
@@ -80,7 +80,7 @@
}
void
-BaseTags::insertBlock(PacketPtr pkt, CacheBlk *blk)
+BaseTags::insertBlock(const PacketPtr pkt, CacheBlk *blk)
{
assert(!blk->isValid());
diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh
index 7ed90fb..30da408 100644
--- a/src/mem/cache/tags/base.hh
+++ b/src/mem/cache/tags/base.hh
@@ -287,7 +287,7 @@
* @param pkt Packet holding the address to update
* @param blk The block to update.
*/
-virtual void insertBlock(PacketPtr pkt, CacheBlk *blk);
+virtual void insertBlock(const PacketPtr pkt, CacheBlk *blk);
/**
* Regenerate the block address.
diff --git a/src/mem/cache/tags/base_set_assoc.hh
b/src/mem/cache/tags/base_set_assoc.hh
index 12b2efb..61a1658 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -248,7 +248,7 @@
* @param pkt Packet holding the address to update
* @param blk The block to update.
*/
-void insertBlock(PacketPtr pkt, CacheBlk *blk) override
+void insertBlock(const PacketPtr pkt, CacheBlk *blk) override
{
// Insert block
BaseTags::insertBlock(pkt, blk);
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 3a60e99..bcf785e 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -208,7 +208,7 @@
}
void
-FALRU::insertBlock(PacketPtr pkt, CacheBlk *blk)
+FALRU::insertBlock(const PacketPtr pkt, CacheBlk *blk)
{
FALRUBlk* falruBlk = static_cast(blk);
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 7aec36a..dee1af0 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -212,7 +212,7 @@
* @param pkt Packet holding the address to update
* @param blk The block to update.
*/
-void insertBlock(PacketPtr pkt, CacheBlk *blk) override;
+void insertBlock(const PacketPtr pkt, CacheBlk *blk) override;
/**
* Generate the tag from the addres. For fully associative this is
just the
diff --git a/src/mem/cache/tags/sector_tags.cc
b/src/mem/cache/tags/sector_tags.cc
index 27e8982..cec7bd4 100644
--- a/src/mem/cache/tags/sector_tags.cc
+++ b/src/mem/cache/tags/sector_tags.cc
@@ -194,7 +194,7 @@
}
void
-SectorTags::insertBlock(PacketPtr pkt, CacheBlk *blk)
+SectorTags::insertBlock(const PacketPtr pkt, CacheBlk *blk)
{
// Insert block
BaseTags::insertBlock(pkt, blk);
diff --git a/src/mem/cache/tags/sector_tags.hh
b/src/mem/cache/tags/sector_tags.hh
index 3fc8ae4..d0dc1f7 100644
--- a/src/mem/cache/tags/sector_tags.hh
+++ b/src/mem/cache/tags/sector_tags.hh
@@ -152,7 +152,7 @@
* @param pkt Packet holding the address to update
* @param blk The block to update.
*/
-void insertBlock(PacketPtr pkt, CacheBlk *blk) override;
+void insertBlock(const PacketPtr pkt, CacheBlk *blk) override;
/**
* Finds the given address in the cache, do not update replacement
data.
--
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Adjust breakpoint EC depending on source state
Hello Ciro Santilli,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10809
to review the following change.
Change subject: arch-arm: Adjust breakpoint EC depending on source state
..
arch-arm: Adjust breakpoint EC depending on source state
The software breakpoint exception class needs to be adjusted depending
on the source EL's execution state. This change fixes an incorrect
exception class when taking a breakpoint from aarch64.
Change-Id: I99d87a04be6bf9ce3a69f6b19969fa006cfd63a4
Signed-off-by: Andreas Sandberg
Reviewed-by: Ciro Santilli
---
M src/arch/arm/faults.cc
M src/arch/arm/faults.hh
M src/arch/arm/types.hh
3 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index bdb6f25..676559f 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -1543,6 +1543,12 @@
(hcr.tge || mdcr.tde);
}
+ExceptionClass
+SoftwareBreakpoint::ec(ThreadContext *tc) const
+{
+return from64 ? EC_SOFTWARE_BREAKPOINT_64 : vals.ec;
+}
+
void
ArmSev::invoke(ThreadContext *tc, const StaticInstPtr ) {
DPRINTF(Faults, "Invoking ArmSev Fault\n");
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 132c07c..90b5501 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -573,6 +573,7 @@
SoftwareBreakpoint(ExtMachInst _mach_inst, uint32_t _iss);
bool routeToHyp(ThreadContext *tc) const override;
+ExceptionClass ec(ThreadContext *tc) const override;
};
// A fault that flushes the pipe, excluding the faulting instructions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index d4e6ec0..84887a1 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -623,6 +623,7 @@
EC_FP_EXCEPTION_64 = 0x2C,
EC_SERROR = 0x2F,
EC_SOFTWARE_BREAKPOINT = 0x38,
+EC_SOFTWARE_BREAKPOINT_64 = 0x3C,
};
/**
--
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[gem5-dev] Change in gem5/gem5[master]: dev-arm: Remove deprecated GIC test interfaces
Hello Giacomo Travaglini,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10810
to review the following change.
Change subject: dev-arm: Remove deprecated GIC test interfaces
..
dev-arm: Remove deprecated GIC test interfaces
Change-Id: I4c5203b216387d9a4f041c7a00caea926e5cfca6
Signed-off-by: Andreas Sandberg
Reviewed-by: Giacomo Travaglini
---
M src/dev/arm/gic_pl390.cc
M src/dev/arm/gic_pl390.hh
2 files changed, 0 insertions(+), 54 deletions(-)
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc
index 4818be6..f918f77 100644
--- a/src/dev/arm/gic_pl390.cc
+++ b/src/dev/arm/gic_pl390.cc
@@ -76,7 +76,6 @@
cpuSgiPending {}, cpuSgiActive {},
cpuSgiPendingExt {}, cpuSgiActiveExt {},
cpuPpiPending {}, cpuPpiActive {},
- irqEnable(false),
pendingDelayedInterrupts(0)
{
for (int x = 0; x < CPU_MAX; x++) {
@@ -916,7 +915,6 @@
SERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
SERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
-SERIALIZE_SCALAR(irqEnable);
SERIALIZE_SCALAR(gem5ExtensionsEnabled);
for (uint32_t i=0; i < bankedRegs.size(); ++i) {
@@ -959,7 +957,6 @@
UNSERIALIZE_ARRAY(cpuSgiPendingExt, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiActive, CPU_MAX);
UNSERIALIZE_ARRAY(cpuPpiPending, CPU_MAX);
-UNSERIALIZE_SCALAR(irqEnable);
// Handle checkpoints from before we drained the GIC to prevent
// in-flight interrupts.
@@ -998,42 +995,3 @@
{
return new Pl390(this);
}
-
-/* Functions for debugging and testing */
-void
-Pl390::driveSPI(uint32_t spiVect)
-{
-DPRINTF(GIC, "Received SPI Vector:%x Enable: %d\n", spiVect,
irqEnable);
-getPendingInt(0, 1) |= spiVect;
-if (irqEnable && enabled) {
-updateIntState(-1);
-}
-}
-
-void
-Pl390::driveIrqEn( bool state)
-{
-irqEnable = state;
-DPRINTF(GIC, " Enabling Irq\n");
-updateIntState(-1);
-}
-
-void
-Pl390::driveLegIRQ(bool state)
-{
-if (irqEnable && !(!enabled && cpuEnabled[0])) {
-if (state) {
-DPRINTF(GIC, "Driving Legacy Irq\n");
-platform->intrctrl->post(0, ArmISA::INT_IRQ, 0);
-}
-else platform->intrctrl->clear(0, ArmISA::INT_IRQ, 0);
-}
-}
-
-void
-Pl390::driveLegFIQ(bool state)
-{
-if (state)
-platform->intrctrl->post(0, ArmISA::INT_FIQ, 0);
-else platform->intrctrl->clear(0, ArmISA::INT_FIQ, 0);
-}
diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh
index 58d8434..dc45d25 100644
--- a/src/dev/arm/gic_pl390.hh
+++ b/src/dev/arm/gic_pl390.hh
@@ -320,9 +320,6 @@
uint32_t cpuPpiPending[CPU_MAX];
uint32_t cpuPpiActive[CPU_MAX];
-/** IRQ Enable Used for debug */
-bool irqEnable;
-
/** software generated interrupt
* @param data data to decode that indicates which cpus to interrupt
*/
@@ -392,15 +389,6 @@
void sendPPInt(uint32_t num, uint32_t cpu) override;
void clearPPInt(uint32_t num, uint32_t cpu) override;
- public: // Test & debug intefaces
-/** @{ */
-/* Various functions fer testing and debugging */
-void driveSPI(uint32_t spi);
-void driveLegIRQ(bool state);
-void driveLegFIQ(bool state);
-void driveIrqEn(bool state);
-/** @} */
-
protected:
/** Handle a read to the distributor portion of the GIC
* @param pkt packet to respond to
--
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Respect EL from translation type
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10506 )
Change subject: arch-arm: Respect EL from translation type
..
arch-arm: Respect EL from translation type
There are cases where instructions request translations in the context
of a lower EL. This is currently not respected in the TLB and the page
table walker. Fix that.
Change-Id: Icd59657a1ecfd8bd75a001bb1a4e41a6f4808a36
Signed-off-by: Andreas Sandberg
Reviewed-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/10506
Maintainer: Giacomo Travaglini
---
M src/arch/arm/table_walker.cc
M src/arch/arm/tlb.cc
M src/arch/arm/tlb.hh
3 files changed, 52 insertions(+), 37 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 26a07d7..325a512 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -230,9 +230,15 @@
// ARM DDI 0487A.f (ARMv8 ARM) pg J8-5672
// aarch32/translation/translation/AArch32.TranslateAddress dictates
// even AArch32 EL0 will use AArch64 translation if EL1 is in AArch64.
-currState->aarch64 = isStage2 || opModeIs64(currOpMode(_tc)) ||
- ((currEL(_tc) == EL0) && ELIs64(_tc, EL1));
-currState->el = currEL(_tc);
+if (isStage2) {
+currState->el = EL1;
+currState->aarch64 = ELIs64(_tc, EL2);
+} else {
+currState->el =
+TLB::tranTypeEL(_tc->readMiscReg(MISCREG_CPSR), tranType);
+currState->aarch64 =
+ELIs64(_tc, currState->el == EL0 ? EL1 : currState->el);
+}
currState->transState = _trans;
currState->req = _req;
currState->fault = NoFault;
@@ -363,17 +369,11 @@
pendingChange();
currState = pendingQueue.front();
-ExceptionLevel target_el = EL0;
-if (currState->aarch64)
-target_el = currEL(currState->tc);
-else
-target_el = EL1;
-
// Check if a previous walk filled this request already
// @TODO Should this always be the TLB or should we look in the stage2
TLB?
TlbEntry* te = tlb->lookup(currState->vaddr, currState->asid,
currState->vmid, currState->isHyp, currState->isSecure, true,
false,
-target_el);
+currState->el);
// Check if we still need to have a walk for this request. If the
requesting
// instruction has been squashed, or a previous walk has filled the
TLB with
@@ -439,7 +439,7 @@
currState = pendingQueue.front();
te = tlb->lookup(currState->vaddr, currState->asid,
currState->vmid, currState->isHyp, currState->isSecure,
true,
-false, target_el);
+false, currState->el);
} else {
// Terminate the loop, nothing more to do
currState = NULL;
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 5f104e9..192f01b 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1268,35 +1268,13 @@
isSecure = inSecureState(tc) &&
!(tranType & HypMode) && !(tranType & S1S2NsTran);
-const OperatingMode op_mode = (OperatingMode) (uint8_t)cpsr.mode;
-aarch64 = opModeIs64(op_mode) ||
-(opModeToEL(op_mode) == EL0 && ELIs64(tc, EL1));
+aarch64EL = tranTypeEL(cpsr, tranType);
+aarch64 = isStage2 ?
+ELIs64(tc, EL2) :
+ELIs64(tc, aarch64EL == EL0 ? EL1 : aarch64EL);
if (aarch64) { // AArch64
// determine EL we need to translate in
-switch (tranType) {
-case S1E0Tran:
-case S12E0Tran:
-aarch64EL = EL0;
-break;
-case S1E1Tran:
-case S12E1Tran:
-aarch64EL = EL1;
-break;
-case S1E2Tran:
-aarch64EL = EL2;
-break;
-case S1E3Tran:
-aarch64EL = EL3;
-break;
-case NormalTran:
-case S1CTran:
-case S1S2NsTran:
-case HypMode:
-aarch64EL = (ExceptionLevel) (uint8_t) cpsr.el;
-break;
-}
-
switch (aarch64EL) {
case EL0:
case EL1:
@@ -1396,6 +1374,35 @@
curTranType = tranType;
}
+ExceptionLevel
+TLB::tranTypeEL(CPSR cpsr, ArmTranslationType type)
+{
+switch (type) {
+ case S1E0Tran:
+ case S12E0Tran:
+return EL0;
+
+ case S1E1Tran:
+ case S12E1Tran:
+return EL1;
+
+ case S1E2Tran:
+return EL2;
+
+ case S1E3Tran:
+return EL3;
+
+ case NormalTran:
+ case S1CTran:
+ case S1S2NsTran:
+ case HypMode:
+return opModeToEL((OperatingMode)(uint8_t)cpsr.mode);
+
+ default:
+panic("Unknown translation mode!\n");
+}
+}
+
[gem5-dev] Change in gem5/gem5[master]: arch-arm: Perform stage 2 lookups using the EL2 state
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10507 )
Change subject: arch-arm: Perform stage 2 lookups using the EL2 state
..
arch-arm: Perform stage 2 lookups using the EL2 state
Change-Id: Ic56b694f22a26e9c208a10e5703d4b5b0900070f
Signed-off-by: Andreas Sandberg
Reviewed-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/10507
Maintainer: Giacomo Travaglini
---
M src/arch/arm/stage2_lookup.cc
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/stage2_lookup.cc b/src/arch/arm/stage2_lookup.cc
index 00c515d..7e78a31 100644
--- a/src/arch/arm/stage2_lookup.cc
+++ b/src/arch/arm/stage2_lookup.cc
@@ -66,7 +66,7 @@
// checking. So call translate on stage 2 to do the checking. As
the
// entry is now in the TLB this should always hit the cache.
if (fault == NoFault) {
-if (inAArch64(tc))
+if (ELIs64(tc, EL2))
fault = stage2Tlb->checkPermissions64(stage2Te, ,
mode, tc);
else
fault = stage2Tlb->checkPermissions(stage2Te, , mode);
--
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Gerrit-Change-Number: 10507
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Ivan Pizarro
Gerrit-Reviewer: Pau Cabre
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: dev, arm: Add support for HYP & secure timers
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10023 )
Change subject: dev, arm: Add support for HYP & secure timers
..
dev, arm: Add support for HYP & secure timers
Change-Id: I1a4849283f9bd5b1856e1378f7cefc33fc14eebd
Signed-off-by: Andreas Sandberg
Reviewed-by: Curtis Dunham
Reviewed-on: https://gem5-review.googlesource.com/10023
Reviewed-by: Giacomo Travaglini
Maintainer: Giacomo Travaglini
---
M src/arch/arm/miscregs.cc
M src/dev/arm/RealView.py
M src/dev/arm/generic_timer.cc
M src/dev/arm/generic_timer.hh
4 files changed, 131 insertions(+), 85 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index 8dd56c7..89caa14 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -3176,7 +3176,6 @@
.privSecure(!aarch32EL3)
.monSecure(0);
InitReg(MISCREG_CNTP_TVAL_S)
- .unimplemented()
.bankedChild()
.secure().user(1);
InitReg(MISCREG_CNTP_CTL)
@@ -3187,7 +3186,6 @@
.privSecure(!aarch32EL3)
.monSecure(0);
InitReg(MISCREG_CNTP_CTL_S)
- .unimplemented()
.bankedChild()
.secure().user(1);
InitReg(MISCREG_CNTV_TVAL)
@@ -3195,13 +3193,10 @@
InitReg(MISCREG_CNTV_CTL)
.allPrivileges();
InitReg(MISCREG_CNTHCTL)
- .unimplemented()
.hypWrite().monNonSecureRead();
InitReg(MISCREG_CNTHP_TVAL)
- .unimplemented()
.hypWrite().monNonSecureRead();
InitReg(MISCREG_CNTHP_CTL)
- .unimplemented()
.hypWrite().monNonSecureRead();
InitReg(MISCREG_IL1DATA0)
.unimplemented()
@@ -3256,7 +3251,6 @@
.privSecure(!aarch32EL3)
.monSecure(0);
InitReg(MISCREG_CNTP_CVAL_S)
- .unimplemented()
.bankedChild()
.secure().user(1);
InitReg(MISCREG_CNTV_CVAL)
@@ -3264,7 +3258,6 @@
InitReg(MISCREG_CNTVOFF)
.hyp().monNonSecure();
InitReg(MISCREG_CNTHP_CVAL)
- .unimplemented()
.hypWrite().monNonSecureRead();
InitReg(MISCREG_CPUMERRSR)
.unimplemented()
@@ -3936,31 +3929,23 @@
.hyp().mon()
.mapsTo(MISCREG_CNTVOFF); /* 64b */
InitReg(MISCREG_CNTHCTL_EL2)
- .unimplemented()
- .warnNotFail()
- .mon().monNonSecureWrite(0).hypWrite()
+ .mon().hyp()
.mapsTo(MISCREG_CNTHCTL);
InitReg(MISCREG_CNTHP_TVAL_EL2)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite()
+ .mon().hyp()
.mapsTo(MISCREG_CNTHP_TVAL);
InitReg(MISCREG_CNTHP_CTL_EL2)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite()
+ .mon().hyp()
.mapsTo(MISCREG_CNTHP_CTL);
InitReg(MISCREG_CNTHP_CVAL_EL2)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite()
+ .mon().hyp()
.mapsTo(MISCREG_CNTHP_CVAL); /* 64b */
InitReg(MISCREG_CNTPS_TVAL_EL1)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite();
+ .mon().privSecure();
InitReg(MISCREG_CNTPS_CTL_EL1)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite();
+ .mon().privSecure();
InitReg(MISCREG_CNTPS_CVAL_EL1)
- .unimplemented()
- .mon().monNonSecureWrite(0).hypWrite();
+ .mon().privSecure();
InitReg(MISCREG_IL1DATA0_EL1)
.allPrivileges().exceptUserMode();
InitReg(MISCREG_IL1DATA1_EL1)
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 9b91f46..308de18 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -418,10 +418,10 @@
cxx_header = "dev/arm/generic_timer.hh"
system = Param.ArmSystem(Parent.any, "system")
gic = Param.BaseGic(Parent.any, "GIC to use for interrupting")
-# @todo: for now only two timers per CPU is supported, which is the
-# normal behaviour when security extensions are disabled.
-int_phys = Param.UInt32("Physical timer interrupt number")
+int_phys_s = Param.UInt32("Physical (S) timer interrupt number")
+int_phys_ns = Param.UInt32("Physical (NS) timer interrupt number")
int_virt = Param.UInt32("Virtual timer interrupt number")
+int_hyp = Param.UInt32("Hypervisor timer interrupt number")
def generateDeviceTree(self, state):
node = FdtNode("timer")
@@ -429,9 +429,12 @@
node.appendCompatible(["arm,cortex-a15-timer",
"arm,armv7-timer",
"arm,armv8-timer"])
-node.append(FdtPropertyWords("interrupts",
-[1, int(self.int_phys) - 16, 0xf08,
-1, int(self.int_virt) - 16, 0xf08]))
+node.append(FdtPropertyWords("interrupts", [
+1, int(self.int_phys_s) - 16, 0xf08,
+1, int(self.int_phys_ns) - 16, 0xf08,
+1, int(self.int_virt) - 16, 0xf08,
+1, int(self.int_hyp) - 16, 0xf08,
+
[gem5-dev] Change in gem5/gem5[master]: arch-arm: Fix page size handling when merging stage 1 and 2
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10505 )
Change subject: arch-arm: Fix page size handling when merging stage 1 and 2
..
arch-arm: Fix page size handling when merging stage 1 and 2
The current code to merge translation entries from stage 1 and stage 2
doesn't handle cases where the page sizes at the different stages
differ. This change fixes both the case when the hypervisor has a
larger page size and when it has a smaller page size.
Change-Id: Icdf289005bf1e4de4d91d54643924a38d9d77796
Signed-off-by: Andreas Sandberg
Reviewed-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/10505
Maintainer: Giacomo Travaglini
---
M src/arch/arm/stage2_lookup.cc
1 file changed, 5 insertions(+), 4 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/stage2_lookup.cc b/src/arch/arm/stage2_lookup.cc
index 82a29e8..00c515d 100644
--- a/src/arch/arm/stage2_lookup.cc
+++ b/src/arch/arm/stage2_lookup.cc
@@ -88,23 +88,24 @@
// Now we have the table entries for both stages of translation
// merge them and insert the result into the stage 1 TLB. See
// CombineS1S2Desc() in pseudocode
-stage1Te.N = stage2Te->N;
stage1Te.nonCacheable |= stage2Te->nonCacheable;
stage1Te.xn |= stage2Te->xn;
if (stage1Te.size > stage2Te->size) {
// Size mismatch also implies vpn mismatch (this is shifted by
// sizebits!).
-stage1Te.vpn = s1Req->getVaddr() / (stage2Te->size+1);
+stage1Te.vpn = s1Req->getVaddr() >> stage2Te->N;
stage1Te.pfn = stage2Te->pfn;
stage1Te.size = stage2Te->size;
+stage1Te.N= stage2Te->N;
} else if (stage1Te.size < stage2Te->size) {
// Guest 4K could well be section-backed by host hugepage! In
this
// case a 4K entry is added but pfn needs to be adjusted. New
PFN =
// offset into section PFN given by stage2 IPA treated as a
stage1
// page size.
-stage1Te.pfn = (stage2Te->pfn * ((stage2Te->size+1) /
(stage1Te.size+1))) +
- (stage2Te->vpn / (stage1Te.size+1));
+const Addr pa = (stage2Te->pfn << stage2Te->N);
+const Addr ipa = (stage1Te.pfn << stage1Te.N);
+stage1Te.pfn = (pa | (ipa & mask(stage2Te->N))) >> stage1Te.N;
// Size remains smaller of the two.
} else {
// Matching sizes
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: Icdf289005bf1e4de4d91d54643924a38d9d77796
Gerrit-Change-Number: 10505
Gerrit-PatchSet: 2
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Ivan Pizarro
Gerrit-Reviewer: Pau Cabre
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Adjust breakpoint EC depending on source state
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10809 )
Change subject: arch-arm: Adjust breakpoint EC depending on source state
..
arch-arm: Adjust breakpoint EC depending on source state
The software breakpoint exception class needs to be adjusted depending
on the source EL's execution state. This change fixes an incorrect
exception class when taking a breakpoint from aarch64.
Change-Id: I99d87a04be6bf9ce3a69f6b19969fa006cfd63a4
Signed-off-by: Andreas Sandberg
Reviewed-by: Ciro Santilli
Reviewed-on: https://gem5-review.googlesource.com/10809
Reviewed-by: Giacomo Travaglini
Maintainer: Giacomo Travaglini
---
M src/arch/arm/faults.cc
M src/arch/arm/faults.hh
M src/arch/arm/types.hh
3 files changed, 8 insertions(+), 0 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index bdb6f25..676559f 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -1543,6 +1543,12 @@
(hcr.tge || mdcr.tde);
}
+ExceptionClass
+SoftwareBreakpoint::ec(ThreadContext *tc) const
+{
+return from64 ? EC_SOFTWARE_BREAKPOINT_64 : vals.ec;
+}
+
void
ArmSev::invoke(ThreadContext *tc, const StaticInstPtr ) {
DPRINTF(Faults, "Invoking ArmSev Fault\n");
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 132c07c..90b5501 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -573,6 +573,7 @@
SoftwareBreakpoint(ExtMachInst _mach_inst, uint32_t _iss);
bool routeToHyp(ThreadContext *tc) const override;
+ExceptionClass ec(ThreadContext *tc) const override;
};
// A fault that flushes the pipe, excluding the faulting instructions
diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh
index d4e6ec0..84887a1 100644
--- a/src/arch/arm/types.hh
+++ b/src/arch/arm/types.hh
@@ -623,6 +623,7 @@
EC_FP_EXCEPTION_64 = 0x2C,
EC_SERROR = 0x2F,
EC_SOFTWARE_BREAKPOINT = 0x38,
+EC_SOFTWARE_BREAKPOINT_64 = 0x3C,
};
/**
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I99d87a04be6bf9ce3a69f6b19969fa006cfd63a4
Gerrit-Change-Number: 10809
Gerrit-PatchSet: 2
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: base: Convert Pixel to a template to support wider channels
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10802
Change subject: base: Convert Pixel to a template to support wider channels
..
base: Convert Pixel to a template to support wider channels
This change converts the Pixel class to a template with the channel
data type as template parameter. This is needed to implement
high-definition color formats or when performing alpha blending.
Change-Id: Ice598aa7bb4ebf3dd96446cac57055dcd24a21e0
Signed-off-by: Rohit Kurup
Reviewed-by: Andreas Sandberg
Signed-off-by: Andreas Sandberg
---
M src/base/bmpwriter.hh
M src/base/framebuffer.cc
M src/base/framebuffer.hh
M src/base/pixel.hh
M src/base/pixeltest.cc
M src/base/pngwriter.hh
M src/dev/arm/hdlcd.cc
M src/dev/arm/hdlcd.hh
M src/dev/pixelpump.cc
M src/dev/pixelpump.hh
M src/sim/serialize.cc
11 files changed, 135 insertions(+), 43 deletions(-)
diff --git a/src/base/bmpwriter.hh b/src/base/bmpwriter.hh
index f78b994..1e02873 100644
--- a/src/base/bmpwriter.hh
+++ b/src/base/bmpwriter.hh
@@ -108,7 +108,7 @@
} M5_ATTR_PACKED;
struct BmpPixel32 {
-BmpPixel32 =(const Pixel ) {
+BmpPixel32 =(const PixelU8 ) {
red = rhs.red;
green = rhs.green;
blue = rhs.blue;
diff --git a/src/base/framebuffer.cc b/src/base/framebuffer.cc
index 746327a..d4eb22c 100644
--- a/src/base/framebuffer.cc
+++ b/src/base/framebuffer.cc
@@ -88,7 +88,7 @@
}
void
-FrameBuffer::fill(const Pixel )
+FrameBuffer::fill(const PixelU8 )
{
for (auto : pixels)
p = pixel;
@@ -97,7 +97,7 @@
void
FrameBuffer::clear()
{
-static const Pixel black(0, 0, 0);
+static const PixelU8 black(0, 0, 0);
fill(black);
}
@@ -125,5 +125,5 @@
{
return adler32(0UL,
reinterpret_cast(pixels.data()),
- area() * sizeof(Pixel));
+ area() * sizeof(PixelU8));
}
diff --git a/src/base/framebuffer.hh b/src/base/framebuffer.hh
index ae2e15c..3a0255a 100644
--- a/src/base/framebuffer.hh
+++ b/src/base/framebuffer.hh
@@ -106,7 +106,7 @@
*
* @param pixel Pixel value to fill with.
*/
-void fill(const Pixel );
+void fill(const PixelU8 );
/**
* Fill the frame buffer with black pixels
*/
@@ -156,7 +156,7 @@
* @param x Distance from the left margin.
* @param y Distance from the top of the frame.
*/
-const Pixel (unsigned x, unsigned y) const {
+const PixelU8 (unsigned x, unsigned y) const {
assert(x < _width);
assert(y < _height);
@@ -169,7 +169,7 @@
* @param x Distance from the left margin.
* @param y Distance from the top of the frame.
*/
-Pixel (unsigned x, unsigned y) {
+PixelU8 (unsigned x, unsigned y) {
assert(x < _width);
assert(y < _height);
@@ -191,7 +191,7 @@
static const FrameBuffer dummy;
/** Frame buffer backing store */
-std::vector pixels;
+std::vector pixels;
protected:
/** Width in pixels */
diff --git a/src/base/pixel.hh b/src/base/pixel.hh
index f6faace..75f1971 100644
--- a/src/base/pixel.hh
+++ b/src/base/pixel.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2017-2018 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -35,6 +35,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Andreas Sandberg
+ * Rohit Kurup
*/
#ifndef __BASE_PIXEL_HH__
@@ -53,30 +54,121 @@
/**
* Internal gem5 representation of a Pixel.
*/
+template
struct Pixel
{
-Pixel()
-: red(0), green(0), blue(0), padding(0) {}
+static constexpr auto channelMax =
+std::numeric_limits::max();
+DataType red;
+DataType green;
+DataType blue;
+DataType alpha;
-Pixel(uint8_t _red, uint8_t _green, uint8_t _blue)
-: red(_red), green(_green), blue(_blue), padding(0) {}
+Pixel(): red(0), green(0), blue(0), alpha(channelMax) {
+}
-uint8_t red;
-uint8_t green;
-uint8_t blue;
-uint8_t padding;
+Pixel(DataType _red, DataType _green, DataType _blue)
+: red(_red), green(_green), blue(_blue), alpha(channelMax) {
+static_assert(std::is_integral::value,
+"Pixel cannot have non-integer type");
+}
+
+template
+void convert(const Pixel )
+{
+size_t shift = 0;
+if (sizeof(FromType) > sizeof(DataType))
+{
+shift = sizeof(FromType) - sizeof(DataType);
+red = b.red>>shift;
+green = b.green>>shift;
+blue = b.blue>>shift;
+alpha = b.alpha>>shift;
+}
+else
+{
+shift = sizeof(DataType) - sizeof(FromType);
+red = b.red<
inline bool
-operator==(const Pixel , const Pixel )
[gem5-dev] Change in gem5/gem5[master]: dev: Memory mapped device register utilities
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10805
Change subject: dev: Memory mapped device register utilities
..
dev: Memory mapped device register utilities
This change attempts to provide implementation of utilities which
could formalize memory mapped register definition. The utility in its
initial version provides basic register definition and memory
mapping. There is scope to enhance it by adding per register callback.
Change-Id: Ic06783b743a9d088fca813de2c4c95b6d5593eec
Signed-off-by: Rohit Kurup
Reviewed-by: Andreas Sandberg
Signed-off-by: Andreas Sandberg
---
M src/dev/SConscript
A src/dev/register_util.cc
A src/dev/register_util.hh
A src/dev/register_util_test.cc
4 files changed, 405 insertions(+), 0 deletions(-)
diff --git a/src/dev/SConscript b/src/dev/SConscript
index c9526c2..79ad50b 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -51,5 +51,10 @@
Source('pixelpump.cc')
Source('platform.cc')
+Source('register_util.cc')
+GTest('registertest',
+'register_util_test.cc','../base/trace.cc','../base/debug.cc',
+'../base/match.cc','../base/str.cc')
+
DebugFlag('Intel8254Timer')
DebugFlag('MC146818')
diff --git a/src/dev/register_util.cc b/src/dev/register_util.cc
new file mode 100644
index 000..a17939b
--- /dev/null
+++ b/src/dev/register_util.cc
@@ -0,0 +1,126 @@
+/*
+ * Copyright (c) 2017-2018 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Rohit Kurup
+ */
+
+/** @file
+ * A Register library to implement device registers
+ * in address space
+ */
+
+#include "dev/register_util.hh"
+
+template
+DataType
+RegisterBlock::readReg(Addr offset)
+{
+DataType value = 0xDEADBEEF;
+auto search = register_map.find(offset);
+
+// Found register
+if (search != register_map.end()) {
+value = ((*search).second)->getRegister();
+if (dbgFlag.status()) {
+Trace::getDebugLogger()->dprintf(
+curTick(), mname, "RegRd %s:0x%x:0x%lx\n",
+((*search).second)->name(), offset, value);
+}
+} else {
+warn("Unimplemented Register 0x%x\n", offset);
+}
+
+return value;
+}
+
+template
+void
+RegisterBlock::writeReg(Addr offset, DataType value)
+{
+auto search = register_map.find(offset);
+
+// Found a register
+if (search != register_map.end()) {
+((*search).second)->setRegister(value);
+if (dbgFlag.status()) {
+Trace::getDebugLogger()->dprintf(
+curTick(), mname,
+"RegWr %s:0x%x:0x%lx\n",
+((*search).second)->name(), offset, value);
+}
+} else {
+warn("Unimplemented Register 0x%x\n", offset);
+}
+}
+
+template
+void
+RegisterBlock::serialize(CheckpointOut ) const
+{
+for (auto it : register_map) {
+
[gem5-dev] Change in gem5/gem5[master]: base: Add more pixel converters
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10804
Change subject: base: Add more pixel converters
..
base: Add more pixel converters
Add pixel converters for common color formats. These will be used by
the new Mali compliant display processor.
Change-Id: I6a06e7521e804f78514ce1194ae342979013c7ac
Signed-off-by: Andreas Sandberg
---
M src/base/pixel.cc
M src/base/pixel.hh
M src/base/pixeltest.cc
M src/dev/arm/hdlcd.cc
M src/dev/arm/pl111.cc
5 files changed, 107 insertions(+), 53 deletions(-)
diff --git a/src/base/pixel.cc b/src/base/pixel.cc
index 31dfa2c..bc02e3b 100644
--- a/src/base/pixel.cc
+++ b/src/base/pixel.cc
@@ -43,16 +43,39 @@
#include "base/bitfield.hh"
-template
-const PixelConverter8b PixelConverter::rgba_le(4, 0, 8, 16, 8,
8, 8);
-template
-const PixelConverter8b PixelConverter::rgba_be(4, 0, 8, 16, 8,
8, 8,
- BigEndianByteOrder);
-template
-const PixelConverter8b PixelConverter::rgb565_le(2, 0, 5, 11, 5, 6,
5);
-template
-const PixelConverter8b PixelConverter::rgb565_be(2, 0, 5, 11, 5, 6,
5,
- BigEndianByteOrder);
+namespace PixelConverters {
+
+namespace LE {
+const PixelConverter8b rgba(4,0,8,16,8,8,8);
+const PixelConverter8b argb(4,16,8,0,8,8,8);
+const PixelConverter8b abgr(4,0,8,16,8,8,8);
+const PixelConverter8b bgra(4,8,16,24,8,8,8);
+const PixelConverter8b xrgb(4,16,8,0,8,8,8);
+const PixelConverter8b xbgr(4,0,8,16,8,8,8);
+const PixelConverter8b rgbx(4,16,8,0,8,8,8);
+const PixelConverter8b bgrx(4,0,8,16,8,8,8);
+
+const PixelConverter8b rgb888(3,0,8,16,8,8,8);
+const PixelConverter8b bgr888(3,16,8,0,8,8,8);
+
+const PixelConverter8b rgba5551(2,11,2,1,5,5,5);
+const PixelConverter8b abgr1555(2,0,5,10,5,5,5);
+const PixelConverter8b rgb565(2,0,5,11,5,6,5);
+const PixelConverter8b bgr565(2,0,5,11,5,6,5);
+
+const PixelConverter16b argb2101010(4,20,10,0,10,10,10);
+const PixelConverter16b abgr2101010(4,0,10,20,10,10,10);
+const PixelConverter16b rgba1010102(4,22,12,2,10,10,10);
+const PixelConverter16b bgra1010102(4,2,12,22,10,10,10);
+};
+
+namespace BE {
+const PixelConverter8b rgba(4, 0, 8, 16, 8, 8, 8, BigEndianByteOrder);
+const PixelConverter8b rgb565(2, 0, 5, 11, 5, 6, 5, BigEndianByteOrder);
+};
+
+};
+
template
PixelConverter::PixelConverter(unsigned _length,
unsigned ro, unsigned go, unsigned bo,
diff --git a/src/base/pixel.hh b/src/base/pixel.hh
index 3d75a2b..319724a 100644
--- a/src/base/pixel.hh
+++ b/src/base/pixel.hh
@@ -178,7 +178,6 @@
* the word (i.e., it is possible to shift and mask out a contiguous
* bit range for each pixel).
*/
-
template
class PixelConverter
{
@@ -295,25 +294,57 @@
Channel ch_g;
/** Blue channel conversion helper */
Channel ch_b;
-
-/** Predefined 32-bit RGB (red in least significant bits, 8
- * bits/channel, little endian) conversion helper */
-static const PixelConverter rgba_le;
-/** Predefined 16-bit RGB565 (red in least significant bits,
- * little endian) conversion helper */
-static const PixelConverter rgb565_le;
-
-/** Predefined 32-bit RGB (red in least significant bits, 8
- * bits/channel, big endian) conversion helper */
-static const PixelConverter rgba_be;
-/** Predefined 16-bit RGB565 (red in least significant bits,
- * big endian) conversion helper */
-static const PixelConverter rgb565_be;
};
typedef PixelConverter PixelConverter8b;
typedef PixelConverter PixelConverter16b;
+/** Well-known pixel formats */
+namespace PixelConverters {
+namespace LE {
+
+/** Predefined 32-bit RGB (red in least significant bits, 8
+ * bits/channel, little endian) conversion helper */
+extern const PixelConverter8b rgba;
+extern const PixelConverter8b argb;
+extern const PixelConverter8b abgr;
+extern const PixelConverter8b bgra;
+
+extern const PixelConverter8b xrgb;
+extern const PixelConverter8b xbgr;
+extern const PixelConverter8b rgbx;
+extern const PixelConverter8b bgrx;
+
+extern const PixelConverter8b rgb888;
+extern const PixelConverter8b bgr888;
+
+extern const PixelConverter8b rgba5551;
+extern const PixelConverter8b abgr1555;
+/** Predefined 16-bit RGB565 (red in least significant bits,
+ * little endian) conversion helper */
+extern const PixelConverter8b rgb565;
+extern const PixelConverter8b bgr565;
+
+extern const PixelConverter16b argb2101010;
+extern const PixelConverter16b abgr2101010;
+extern const PixelConverter16b rgba1010102;
+extern const PixelConverter16b bgra1010102;
+
+}; // PixelConverters::LE
+
+namespace BE {
+/** Predefined 32-bit RGB (red in least significant bits, 8
+ * bits/channel, big endian) conversion helper */
+extern const PixelConverter8b rgba;
+
+/**
[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add new VExpress_GEM5_V1_Base Platform
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10807
Change subject: dev-arm: Add new VExpress_GEM5_V1_Base Platform
..
dev-arm: Add new VExpress_GEM5_V1_Base Platform
Add a new VExpress_GEM5_V1_Base Platform which configures basic on
chip devices. The original VExpress_GEM5_V1 will inherit the Base and
add more on chip devices (currently only the HDLCD). This change will
make it possible to create variations of the base platform with
different devices.
Change-Id: I21f9bf4f6217d87e811ff777f630122593eef013
Reviewed-by: Andreas Sandberg
Signed-off-by: Andreas Sandberg
---
M src/dev/arm/RealView.py
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 9b91f46..461b1a5 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1000,7 +1000,7 @@
cur_sys.atags_addr = 0x800
cur_sys.load_offset = 0x8000
-class VExpress_GEM5_V1(RealView):
+class VExpress_GEM5_V1_Base(RealView):
"""
The VExpress gem5 memory map is loosely based on a modified
Versatile Express RS1 memory map.
@@ -1120,13 +1120,9 @@
generic_timer = GenericTimer(int_phys=29, int_virt=27)
-hdlcd = HDLcd(pxl_clk=dcc.osc_pxl,
- pio_addr=0x2b00, int_num=95)
-
def _on_chip_devices(self):
return [
self.gic, self.vgic, self.gicv2m,
-self.hdlcd,
self.generic_timer,
]
@@ -1183,7 +1179,7 @@
def generateDeviceTree(self, state):
# Generate using standard RealView function
-dt = list(super(VExpress_GEM5_V1, self).generateDeviceTree(state))
+dt = list(super(VExpress_GEM5_V1_Base,
self).generateDeviceTree(state))
if len(dt) > 1:
raise Exception("System returned too many DT nodes")
node = dt[0]
@@ -1194,3 +1190,13 @@
node.append(FdtPropertyWords("arm,vexpress,site", [0xf]))
yield node
+
+
+class VExpress_GEM5_V1(VExpress_GEM5_V1_Base):
+hdlcd = HDLcd(pxl_clk=VExpress_GEM5_V1_Base.dcc.osc_pxl,
+ pio_addr=0x2b00, int_num=95)
+
+def _on_chip_devices(self):
+return super(VExpress_GEM5_V1,self)._on_chip_devices() + [
+self.hdlcd,
+]
--
To view, visit https://gem5-review.googlesource.com/10807
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I21f9bf4f6217d87e811ff777f630122593eef013
Gerrit-Change-Number: 10807
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: ruby: Fix initial weight in weighted LRU
Daniel Carvalho has uploaded this change for review. (
https://gem5-review.googlesource.com/10801
Change subject: ruby: Fix initial weight in weighted LRU
..
ruby: Fix initial weight in weighted LRU
Initial weight was using the timestamp instead of the weight.
Change-Id: I61d3c8424f85fd6856957087c477afda111f8ca7
---
M src/mem/ruby/system/WeightedLRUPolicy.cc
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mem/ruby/system/WeightedLRUPolicy.cc
b/src/mem/ruby/system/WeightedLRUPolicy.cc
index 20ae5ad..2899f73 100644
--- a/src/mem/ruby/system/WeightedLRUPolicy.cc
+++ b/src/mem/ruby/system/WeightedLRUPolicy.cc
@@ -92,7 +92,7 @@
smallest_index = 0;
smallest_time = m_last_ref_ptr[set][0];
-int smallest_weight = m_last_ref_ptr[set][0];
+int smallest_weight = m_last_occ_ptr[set][0];
for (unsigned i = 1; i < m_assoc; i++) {
--
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To unsubscribe, or for help writing mail filters, visit
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I61d3c8424f85fd6856957087c477afda111f8ca7
Gerrit-Change-Number: 10801
Gerrit-PatchSet: 1
Gerrit-Owner: Daniel Carvalho
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: dev: Add a generic interrupt simulation library
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10806
Change subject: dev: Add a generic interrupt simulation library
..
dev: Add a generic interrupt simulation library
Add a generic interrupt simulation library which can set, clear, and
mask interrupts. The idea is that such functions are common across
several blocks and can be re-used using a robust library.
Change-Id: Ibbb573f7cdc8225302e3784679ae8b648c554ece
Reviewed-by: Andreas Sandberg
Signed-off-by: Andreas Sandberg
---
M src/dev/SConscript
A src/dev/irqcontrol.hh
A src/dev/irqcontroltest.cc
3 files changed, 214 insertions(+), 0 deletions(-)
diff --git a/src/dev/SConscript b/src/dev/SConscript
index 79ad50b..150f740 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -55,6 +55,7 @@
GTest('registertest',
'register_util_test.cc','../base/trace.cc','../base/debug.cc',
'../base/match.cc','../base/str.cc')
+GTest('irqcontroltest','irqcontroltest.cc')
DebugFlag('Intel8254Timer')
DebugFlag('MC146818')
diff --git a/src/dev/irqcontrol.hh b/src/dev/irqcontrol.hh
new file mode 100644
index 000..0c5401c
--- /dev/null
+++ b/src/dev/irqcontrol.hh
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2018 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Rohit Kurup
+ */
+
+#ifndef __DEV_IRQCONTROL_HH__
+#define __DEV_IRQCONTROL_HH__
+
+#include
+
+/** @file
+ * A generic interrupt controller
+ *
+ * The IrqControl can set/clear/mask interrupts. They can be mapped to
+ * set, clear, and mask registers in the block by calling irqSetWr,
+ * irqClrWr, irqMaskWr from register callbacks. A parent module can
+ * assign target callbacks sendInt and clearInt where for example IRQ
+ * can be sent to an interrupt controller. For cases, where some bits
+ * are reserved hwMsk can be set to zero.
+ */
+template
+class IrqControl
+{
+DataType irqMsk;
+DataType irqStat;
+DataType hwMsk;
+
+bool irqOut;
+
+std::function sendInt;
+std::function clearInt;
+
+IrqControl() = delete;
+IrqControl(IrqControl &) = delete;
+
+void
+updateIRQ()
+{
+bool newIrq = getMskStat() ? true : false;
+if (newIrq == irqOut)
+return;
+
+irqOut = newIrq;
+if (newIrq) {
+sendInt();
+} else {
+clearInt();
+}
+}
+
+ public :
+IrqControl(DataType msk, std::function sendfn,
+ std::function clrfn)
+: irqMsk(0), irqStat(0), hwMsk(msk), irqOut(false),
sendInt(sendfn),
+ clearInt(clrfn)
+{
+}
+
+void irqSet(DataType val)
+{
+val &= hwMsk;
+irqStat = irqStat | val;
+updateIRQ();
+}
+
+void irqClr(DataType val)
+{
+val &= hwMsk;
+irqStat = irqStat & ~val;
+updateIRQ();
+}
+
+
[gem5-dev] Change in gem5/gem5[master]: base: Templatize PixelConverter class
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/10803
Change subject: base: Templatize PixelConverter class
..
base: Templatize PixelConverter class
PixelConverter is currently supporting 8-bit color channels. This
change makes it a template to support wider color channels like
10-bit, 12-bit upto max resolution of 16-bit. Since there are no color
channels greater than 16-bit, a static assertion triggers a
compilation failure if for wider channels.
Change-Id: I6e3e131f17e58fd2bc170c075d2340812e324b90
Reviewed-by: Andreas Sandberg
Signed-off-by: Andreas Sandberg
---
M src/base/framebuffer.cc
M src/base/framebuffer.hh
M src/base/pixel.cc
M src/base/pixel.hh
M src/base/pixeltest.cc
M src/base/vnc/vncserver.cc
M src/base/vnc/vncserver.hh
M src/dev/arm/hdlcd.cc
M src/dev/arm/hdlcd.hh
M src/dev/arm/pl111.cc
M src/dev/arm/pl111.hh
11 files changed, 105 insertions(+), 86 deletions(-)
diff --git a/src/base/framebuffer.cc b/src/base/framebuffer.cc
index d4eb22c..e76b8db 100644
--- a/src/base/framebuffer.cc
+++ b/src/base/framebuffer.cc
@@ -102,24 +102,6 @@
fill(black);
}
-void
-FrameBuffer::copyIn(const uint8_t *fb, const PixelConverter )
-{
-for (auto : pixels) {
-p = conv.toPixel(fb);
-fb += conv.length;
-}
-}
-
-void
-FrameBuffer::copyOut(uint8_t *fb, const PixelConverter ) const
-{
-for (auto : pixels) {
-conv.fromPixel(fb, p);
-fb += conv.length;
-}
-}
-
uint64_t
FrameBuffer::getHash() const
{
diff --git a/src/base/framebuffer.hh b/src/base/framebuffer.hh
index 3a0255a..c0ebd47 100644
--- a/src/base/framebuffer.hh
+++ b/src/base/framebuffer.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2017-2018 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -119,7 +119,13 @@
* @param fb External frame buffer
* @param conv Pixel conversion helper
*/
-void copyIn(const uint8_t *fb, const PixelConverter );
+template
+void copyIn(const uint8_t *fb, const PixelConvType ) {
+for (auto : pixels) {
+p = conv.toPixel(fb);
+fb += conv.length;
+}
+}
/**
* Fill the frame buffer with pixel data from an external buffer
* of the same width and height as this frame buffer.
@@ -127,7 +133,8 @@
* @param fb External frame buffer
* @param conv Pixel conversion helper
*/
-void copyIn(const std::vector , const PixelConverter
) {
+template
+void copyIn(const std::vector , const PixelConvType )
{
copyIn(fb.data(), conv);
}
@@ -138,7 +145,13 @@
* @param fb External frame buffer
* @param conv Pixel conversion helper
*/
-void copyOut(uint8_t *fb, const PixelConverter ) const;
+template
+void copyOut(uint8_t *fb, const PixelConvType ) const{
+for (auto : pixels) {
+conv.fromPixel(fb, p);
+fb += conv.length;
+}
+}
/**
* Store the contents of this frame buffer in an external buffer
* of the same width and height as this frame buffer.
@@ -146,7 +159,8 @@
* @param fb External frame buffer
* @param conv Pixel conversion helper
*/
-void copyOut(std::vector , const PixelConverter )
const {
+template
+void copyOut(std::vector , const PixelConvType )
const {
copyOut(fb.data(), conv);
}
diff --git a/src/base/pixel.cc b/src/base/pixel.cc
index 29dcaf6..31dfa2c 100644
--- a/src/base/pixel.cc
+++ b/src/base/pixel.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015 ARM Limited
+ * Copyright (c) 2015, 2017-2018 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -43,14 +43,18 @@
#include "base/bitfield.hh"
-const PixelConverter PixelConverter::rgba_le(4, 0, 8, 16, 8, 8, 8);
-const PixelConverter PixelConverter::rgba_be(4, 0, 8, 16, 8, 8, 8,
+template
+const PixelConverter8b PixelConverter::rgba_le(4, 0, 8, 16, 8,
8, 8);
+template
+const PixelConverter8b PixelConverter::rgba_be(4, 0, 8, 16, 8,
8, 8,
BigEndianByteOrder);
-const PixelConverter PixelConverter::rgb565_le(2, 0, 5, 11, 5, 6, 5);
-const PixelConverter PixelConverter::rgb565_be(2, 0, 5, 11, 5, 6, 5,
+template
+const PixelConverter8b PixelConverter::rgb565_le(2, 0, 5, 11, 5, 6,
5);
+template
+const PixelConverter8b PixelConverter::rgb565_be(2, 0, 5, 11, 5, 6,
5,
BigEndianByteOrder);
-
-PixelConverter::PixelConverter(unsigned _length,
+template
+PixelConverter::PixelConverter(unsigned _length,
unsigned ro, unsigned go, unsigned bo,
unsigned rw, unsigned gw, unsigned bw,
[gem5-dev] Change in gem5/gem5[master]: arch-arm: Add Illegal Execution flag to PCState
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10813
to review the following change.
Change subject: arch-arm: Add Illegal Execution flag to PCState
..
arch-arm: Add Illegal Execution flag to PCState
This patch moves the detection of the Illegal Execution flag (PSTATE.IL)
from the tlb translation stage (fetch) to the decoding stage. This is
done by adding the illegalExecution field to the PCState.
Change-Id: I9c1c4e9c6bd5ded905c1d56b3034e4e9322582fa
Signed-off-by: Giacomo Travaglini
Reviewed-by: Andreas Sandberg
---
M src/arch/arm/decoder.cc
M src/arch/arm/faults.cc
M src/arch/arm/insts/pseudo.cc
M src/arch/arm/insts/pseudo.hh
M src/arch/arm/isa.cc
M src/arch/arm/isa/bitfields.isa
M src/arch/arm/isa/decoder/decoder.isa
M src/arch/arm/isa/formats/pseudo.isa
M src/arch/arm/tlb.cc
M src/arch/arm/types.hh
10 files changed, 77 insertions(+), 21 deletions(-)
diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 1502b06..ce039b7 100644
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2014 ARM Limited
+ * Copyright (c) 2012-2014,2018 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -179,6 +179,8 @@
if (foundIt)
pc.nextItstate(itBits);
this_emi.itstate = pc.itstate();
+this_emi.illegalExecution = pc.illegalExec() ? 1 : 0;
+
pc.size(inst_size);
emi = 0;
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc
index 676559f..dd4f958 100644
--- a/src/arch/arm/faults.cc
+++ b/src/arch/arm/faults.cc
@@ -601,6 +601,7 @@
pc.nextJazelle(pc.jazelle());
pc.aarch64(!cpsr.width);
pc.nextAArch64(!cpsr.width);
+pc.illegalExec(false);
tc->pcState(pc);
}
@@ -684,6 +685,7 @@
PCState pc(new_pc);
pc.aarch64(!cpsr.width);
pc.nextAArch64(!cpsr.width);
+pc.illegalExec(false);
tc->pcState(pc);
// If we have a valid instruction then use it to annotate this fault
with
diff --git a/src/arch/arm/insts/pseudo.cc b/src/arch/arm/insts/pseudo.cc
index e2504d6..2e8c3f1 100644
--- a/src/arch/arm/insts/pseudo.cc
+++ b/src/arch/arm/insts/pseudo.cc
@@ -249,3 +249,13 @@
{
return csprintf("%-10s (implementation defined)", mnemonic);
}
+
+IllegalExecInst::IllegalExecInst(ExtMachInst _machInst)
+: ArmStaticInst("Illegal Execution", _machInst, No_OpClass)
+{}
+
+Fault
+IllegalExecInst::execute(ExecContext *xc, Trace::InstRecord *traceData)
const
+{
+return std::make_shared();
+}
diff --git a/src/arch/arm/insts/pseudo.hh b/src/arch/arm/insts/pseudo.hh
index ececbbb..9065c62 100644
--- a/src/arch/arm/insts/pseudo.hh
+++ b/src/arch/arm/insts/pseudo.hh
@@ -161,4 +161,19 @@
};
+/**
+ * This class is modelling instructions which are not going to be
+ * executed since they are flagged as Illegal Execution Instructions
+ * (PSTATE.IL = 1 or CPSR.IL = 1).
+ * The sole purpose of this instruction is to generate an appropriate
+ * fault when executed.
+ */
+class IllegalExecInst : public ArmStaticInst
+{
+ public:
+IllegalExecInst(ExtMachInst _machInst);
+
+Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const;
+};
+
#endif
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index a4e9c79..3093205 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -704,6 +704,7 @@
PCState pc = tc->pcState();
pc.nextThumb(cpsr.t);
pc.nextJazelle(cpsr.j);
+pc.illegalExec(cpsr.il == 1);
// Follow slightly different semantics if a CheckerCPU object
// is connected
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa
index ba9a39e..ac6989a 100644
--- a/src/arch/arm/isa/bitfields.isa
+++ b/src/arch/arm/isa/bitfields.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2010, 2011 ARM Limited
+// Copyright (c) 2010, 2011, 2018 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -47,6 +47,7 @@
// Opcode fields
def bitfield DECODERFAULT decoderFault;
+def bitfield ILLEGALEXEC illegalExecution;
def bitfield ENCODING encoding;
def bitfield OPCODEopcode;
diff --git a/src/arch/arm/isa/decoder/decoder.isa
b/src/arch/arm/isa/decoder/decoder.isa
index c352e08..1c9acbe 100644
--- a/src/arch/arm/isa/decoder/decoder.isa
+++ b/src/arch/arm/isa/decoder/decoder.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2010-2011 ARM Limited
+// Copyright (c) 2010-2011,2018 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -40,15 +40,17 @@
//
// Authors: Gabe Black
-decode DECODERFAULT default DecoderFault::decoderFault() {
-0: decode THUMB default Unknown::unknown() {
-0: decode AARCH64 {
-0:
-
[gem5-dev] Change in gem5/gem5[master]: arch-arm: Adapting IllegalExecution fault for AArch32
Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/10814 to review the following change. Change subject: arch-arm: Adapting IllegalExecution fault for AArch32 .. arch-arm: Adapting IllegalExecution fault for AArch32 The Illegal Execution fault triggered by the setting of processor state PSTATE.IL happens in AArch32 as well and takes the form of UNDEFINED exception fault. We are hence copying the UndefinedInstruction AArch32 fields into the IllegalInstSetStateFault. Change-Id: Ibb7424397c2030ea5d010577c530277a27036aea Signed-off-by: Giacomo Travaglini Reviewed-by: Andreas Sandberg --- M src/arch/arm/faults.cc 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index dd4f958..cf58960 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -257,6 +257,10 @@ "Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, EC_INVALID ); +template<> ArmFault::FaultVals ArmFaultVals::vals( +"Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, +4, 2, 0, 0, true, false, false, EC_ILLEGAL_INST +); template<> ArmFault::FaultVals ArmFaultVals::vals( // Some dummy values (SupervisorTrap is AArch64-only) "Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, @@ -287,11 +291,6 @@ "ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_UNKNOWN ); -template<> ArmFault::FaultVals ArmFaultVals::vals( -// Some dummy values (SPAlignmentFault is AArch64-only) -"Illegal Inst Set State Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, -0, 0, 0, 0, true, false, false, EC_ILLEGAL_INST -); Addr ArmFault::getVector(ThreadContext *tc) -- To view, visit https://gem5-review.googlesource.com/10814 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ibb7424397c2030ea5d010577c530277a27036aea Gerrit-Change-Number: 10814 Gerrit-PatchSet: 1 Gerrit-Owner: Giacomo Travaglini Gerrit-Reviewer: Andreas Sandberg Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Cron /z/m5/regression/do-regression quick
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: FAILED!*** gem5 stderr *** * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: FAILED! *** diff[config.json]: SKIPPED* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby: FAILED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: CHANGED! *** diff[config.ini]: SKIPPED* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level: CHANGED! * build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: CHANGED!*** diff[simerr]: SKIPPED * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level: CHANGED! * build/NULL/tests/opt/quick/se/80.dram-closepage/null/none/dram-lowp: CHANGED! *** diff[simerr]: SKIPPED* build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: CHANGED! * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: CHANGED! * build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer: CHANGED! * build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level: CHANGED! * build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory: CHANGED! * build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token: CHANGED! * build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/o3-timing: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby: CHANGED! * build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-simple: CHANGED!Maximum error magnitude: +.00% * build/X86/tests/opt/quick/se/03.learning-gem5/x86/linux/learning-gem5-p1-two-level: CHANGED! * build/X86/tests/opt/quick/se/10.mcf/x86/linux/simple-atomic: CHANGED! * build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic: CHANGED! * build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/simple-atomic: CHANGED! * build/ARM/tests/opt/quick/se/00.hello/arm/linux/minor-timing: CHANGED!--- quick/se/00.hello/arm/linux/o3-timing-checker --- *
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a namespace to the SC_MODULE's sc_module.
Hello Jason Lowe-Power, Matthias Jung, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/10853 to look at the new patch set (#2). Change subject: systemc: Add a namespace to the SC_MODULE's sc_module. .. systemc: Add a namespace to the SC_MODULE's sc_module. Ensure that when expanded, SC_MODULE will work regardless of the containing namespace. Change-Id: I608dbd6c36dca8c838feb0a239c3c053d5346599 --- M src/systemc/ext/core/sc_module.hh 1 file changed, 1 insertion(+), 1 deletion(-) -- To view, visit https://gem5-review.googlesource.com/10853 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I608dbd6c36dca8c838feb0a239c3c053d5346599 Gerrit-Change-Number: 10853 Gerrit-PatchSet: 2 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Matthias Jung Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: dev-arm: Add a GIC interrupt adaptor
Hello Gabe Black, Nikos Nikoleris, Weiping Liao, Curtis Dunham, Giacomo Travaglini, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/2521 to look at the new patch set (#8). Change subject: dev-arm: Add a GIC interrupt adaptor .. dev-arm: Add a GIC interrupt adaptor Add GIC-based interrupt adaptor implementations that support PPI (ArmPPI) and SPI (ArmSPI) delivery. In addition to being useful for "normal" memory-mapped devices, the PPI adaptor makes it possible to use the same device model to generate both PPIs and SPIs (e.g., the PMU). Change-Id: I73d6591c168040faef2443430c4f1da10c387a2a Signed-off-by: Andreas Sandberg Reviewed-by: Nikos Nikoleris --- M src/dev/arm/Gic.py M src/dev/arm/base_gic.cc M src/dev/arm/base_gic.hh 3 files changed, 171 insertions(+), 4 deletions(-) -- To view, visit https://gem5-review.googlesource.com/2521 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I73d6591c168040faef2443430c4f1da10c387a2a Gerrit-Change-Number: 2521 Gerrit-PatchSet: 8 Gerrit-Owner: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Curtis Dunham Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: Weiping Liao Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: arch-arm: Remove dead doingStage2 variable in PT walker
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10815 )
Change subject: arch-arm: Remove dead doingStage2 variable in PT walker
..
arch-arm: Remove dead doingStage2 variable in PT walker
Change-Id: Iab5ecec56120c725847b2e462fd4793cfac87d3c
Signed-off-by: Andreas Sandberg
Reviewed-by: Nikos Nikoleris
Reviewed-on: https://gem5-review.googlesource.com/10815
---
M src/arch/arm/table_walker.cc
M src/arch/arm/table_walker.hh
2 files changed, 17 insertions(+), 36 deletions(-)
Approvals:
Nikos Nikoleris: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 325a512..ba44587 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -132,7 +132,7 @@
asid(0), vmid(0), isHyp(false), transState(nullptr),
vaddr(0), vaddr_tainted(0), isWrite(false), isFetch(false),
isSecure(false),
secureLookup(false), rwTable(false), userTable(false), xnTable(false),
-pxnTable(false), stage2Req(false), doingStage2(false),
+pxnTable(false), stage2Req(false),
stage2Tran(nullptr), timing(false), functional(false),
mode(BaseTLB::Read), tranType(TLB::NormalTran), l2Desc(l1Desc),
delayed(false), tableWalker(nullptr)
@@ -302,11 +302,6 @@
statRequestOrigin[REQUESTED][currState->isFetch]++;
-// We only do a second stage of translation if we're not secure, or in
-// hyp mode, the second stage MMU is enabled, and this table walker
-// instance is the first stage.
-// TODO: fix setting of doingStage2 for timing mode
-currState->doingStage2 = false;
currState->stage2Req = _stage2Req && !isStage2;
bool long_desc_format = currState->aarch64 || _isHyp || isStage2 ||
@@ -1817,13 +1812,11 @@
else if (!currState->delayed) {
// delay is not set so there is no L2 to do
// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-statWalkServiceTime.sample(curTick() - currState->startTime);
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksShortTerminatedAtLevel[0]++;
-}
+statWalkServiceTime.sample(curTick() - currState->startTime);
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksShortTerminatedAtLevel[0]++;
pending = false;
nextWalk(currState->tc);
@@ -1859,16 +1852,12 @@
currState->transState->finish(currState->fault, currState->req,
currState->tc, currState->mode);
statWalksShortTerminatedAtLevel[1]++;
-}
-else {
-// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-statWalkServiceTime.sample(curTick() - currState->startTime);
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksShortTerminatedAtLevel[1]++;
-}
+} else {
+statWalkServiceTime.sample(curTick() - currState->startTime);
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksShortTerminatedAtLevel[1]++;
}
@@ -1941,14 +1930,11 @@
delete currState;
} else if (!currState->delayed) {
// No additional lookups required
-// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-statWalkServiceTime.sample(curTick() - currState->startTime);
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksLongTerminatedAtLevel[(unsigned) curr_lookup_level]++;
-}
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+statWalkServiceTime.sample(curTick() - currState->startTime);
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksLongTerminatedAtLevel[(unsigned) curr_lookup_level]++;
pending = false;
nextWalk(currState->tc);
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index b322c50..1957bef 100644
---
[gem5-dev] Change in gem5/gem5[master]: system-arm: Update gem5 timer interrupt specification
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/10024 )
Change subject: system-arm: Update gem5 timer interrupt specification
..
system-arm: Update gem5 timer interrupt specification
The DTB for the VExpress_GEM5_V1 was incorrectly flagging timer
interrupts as being edge triggered. Describe the interrupt as being
level triggered to match Juno and FVP.
Change-Id: I9ce4b8959e7cc28d8b208727119ff20e581311f8
Signed-off-by: Andreas Sandberg
Reviewed-by: Gabor Dozsa
Reviewed-on: https://gem5-review.googlesource.com/10024
Reviewed-by: Giacomo Travaglini
---
M system/arm/dt/platforms/vexpress_gem5_v1.dtsi
1 file changed, 3 insertions(+), 3 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/system/arm/dt/platforms/vexpress_gem5_v1.dtsi
b/system/arm/dt/platforms/vexpress_gem5_v1.dtsi
index 4d463e7..d7d77fb 100644
--- a/system/arm/dt/platforms/vexpress_gem5_v1.dtsi
+++ b/system/arm/dt/platforms/vexpress_gem5_v1.dtsi
@@ -51,9 +51,9 @@
timer {
compatible = "arm,cortex-a15-timer",
"arm,armv7-timer";
- interrupts = <1 13 0xff01>,
-<1 14 0xff01>,
-<1 11 0xff01>;
+ interrupts = <1 13 0xf08>,
+<1 14 0xf08>,
+<1 11 0xf08>;
clocks = <_sys>;
clock-names="apb_pclk";
};
--
To view, visit https://gem5-review.googlesource.com/10024
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9ce4b8959e7cc28d8b208727119ff20e581311f8
Gerrit-Change-Number: 10024
Gerrit-PatchSet: 3
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Gabor Dozsa
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Remove dead doingStage2 variable in PT walker
Hello Nikos Nikoleris,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/10815
to review the following change.
Change subject: arch-arm: Remove dead doingStage2 variable in PT walker
..
arch-arm: Remove dead doingStage2 variable in PT walker
Change-Id: Iab5ecec56120c725847b2e462fd4793cfac87d3c
Signed-off-by: Andreas Sandberg
Reviewed-by: Nikos Nikoleris
---
M src/arch/arm/table_walker.cc
M src/arch/arm/table_walker.hh
2 files changed, 17 insertions(+), 36 deletions(-)
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 325a512..ba44587 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -132,7 +132,7 @@
asid(0), vmid(0), isHyp(false), transState(nullptr),
vaddr(0), vaddr_tainted(0), isWrite(false), isFetch(false),
isSecure(false),
secureLookup(false), rwTable(false), userTable(false), xnTable(false),
-pxnTable(false), stage2Req(false), doingStage2(false),
+pxnTable(false), stage2Req(false),
stage2Tran(nullptr), timing(false), functional(false),
mode(BaseTLB::Read), tranType(TLB::NormalTran), l2Desc(l1Desc),
delayed(false), tableWalker(nullptr)
@@ -302,11 +302,6 @@
statRequestOrigin[REQUESTED][currState->isFetch]++;
-// We only do a second stage of translation if we're not secure, or in
-// hyp mode, the second stage MMU is enabled, and this table walker
-// instance is the first stage.
-// TODO: fix setting of doingStage2 for timing mode
-currState->doingStage2 = false;
currState->stage2Req = _stage2Req && !isStage2;
bool long_desc_format = currState->aarch64 || _isHyp || isStage2 ||
@@ -1817,13 +1812,11 @@
else if (!currState->delayed) {
// delay is not set so there is no L2 to do
// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-statWalkServiceTime.sample(curTick() - currState->startTime);
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksShortTerminatedAtLevel[0]++;
-}
+statWalkServiceTime.sample(curTick() - currState->startTime);
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksShortTerminatedAtLevel[0]++;
pending = false;
nextWalk(currState->tc);
@@ -1859,16 +1852,12 @@
currState->transState->finish(currState->fault, currState->req,
currState->tc, currState->mode);
statWalksShortTerminatedAtLevel[1]++;
-}
-else {
-// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-statWalkServiceTime.sample(curTick() - currState->startTime);
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksShortTerminatedAtLevel[1]++;
-}
+} else {
+statWalkServiceTime.sample(curTick() - currState->startTime);
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksShortTerminatedAtLevel[1]++;
}
@@ -1941,14 +1930,11 @@
delete currState;
} else if (!currState->delayed) {
// No additional lookups required
-// Don't finish the translation if a stage 2 look up is underway
-if (!currState->doingStage2) {
-DPRINTF(TLBVerbose, "calling translateTiming again\n");
-statWalkServiceTime.sample(curTick() - currState->startTime);
-tlb->translateTiming(currState->req, currState->tc,
- currState->transState, currState->mode);
-statWalksLongTerminatedAtLevel[(unsigned) curr_lookup_level]++;
-}
+DPRINTF(TLBVerbose, "calling translateTiming again\n");
+statWalkServiceTime.sample(curTick() - currState->startTime);
+tlb->translateTiming(currState->req, currState->tc,
+ currState->transState, currState->mode);
+statWalksLongTerminatedAtLevel[(unsigned) curr_lookup_level]++;
pending = false;
nextWalk(currState->tc);
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index b322c50..1957bef 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -761,11 +761,6 @@
/** Flag indicating if a
[gem5-dev] Change in gem5/gem5[master]: systemc: Add some missing functions which interact with the scheduler.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10846
Change subject: systemc: Add some missing functions which interact with the
scheduler.
..
systemc: Add some missing functions which interact with the scheduler.
Change-Id: Ifc8c8d4a7bb6e941485e80f4884cfa4bb648c17c
---
M src/systemc/core/sc_main.cc
M src/systemc/ext/core/_using.hh
M src/systemc/ext/core/sc_main.hh
3 files changed, 152 insertions(+), 0 deletions(-)
diff --git a/src/systemc/core/sc_main.cc b/src/systemc/core/sc_main.cc
index 5a6108a..2a38b41 100644
--- a/src/systemc/core/sc_main.cc
+++ b/src/systemc/core/sc_main.cc
@@ -121,4 +121,91 @@
return _argv;
}
+void
+sc_start()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_start(const sc_time , sc_starvation_policy p)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_set_stop_mode(sc_stop_mode mode)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_stop_mode
+sc_get_stop_mode()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return SC_STOP_FINISH_DELTA;
+}
+
+void
+sc_stop()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+const sc_time &
+sc_time_stamp()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *(sc_time *)nullptr;
+}
+
+sc_dt::uint64
+sc_delta_count()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0;
+}
+
+bool
+sc_is_running()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_pending_activity_at_current_time()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_pending_activity_at_future_time()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_pending_activity()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+sc_time
+sc_time_to_pending_activity()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return sc_time();
+}
+
+sc_status
+sc_get_status()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return SC_ELABORATION;
+}
+
} // namespace sc_core
diff --git a/src/systemc/ext/core/_using.hh b/src/systemc/ext/core/_using.hh
index 6c4c431..95ffc32 100644
--- a/src/systemc/ext/core/_using.hh
+++ b/src/systemc/ext/core/_using.hh
@@ -53,6 +53,19 @@
using sc_core::sc_argc;
using sc_core::sc_argv;
+using sc_core::sc_start;
+using sc_core::sc_pause;
+using sc_core::sc_set_stop_mode;
+using sc_core::sc_get_stop_mode;
+using sc_core::sc_stop;
+using sc_core::sc_time_stamp;
+using sc_core::sc_delta_count;
+using sc_core::sc_is_running;
+using sc_core::sc_pending_activity_at_current_time;
+using sc_core::sc_pending_activity_at_future_time;
+using sc_core::sc_pending_activity;
+using sc_core::sc_time_to_pending_activity;
+using sc_core::sc_get_status;
using sc_core::sc_bind_proxy;
using sc_core::SC_BIND_PROXY_NIL;
diff --git a/src/systemc/ext/core/sc_main.hh
b/src/systemc/ext/core/sc_main.hh
index 9bf0d0a..24e9350 100644
--- a/src/systemc/ext/core/sc_main.hh
+++ b/src/systemc/ext/core/sc_main.hh
@@ -30,6 +30,9 @@
#ifndef __SYSTEMC_EXT_CORE_SC_MAIN_HH__
#define __SYSTEMC_EXT_CORE_SC_MAIN_HH__
+#include "../dt/int/sc_nbdefs.hh"
+#include "sc_time.hh"
+
extern "C" int sc_main(int argc, char *argv[]);
namespace sc_core
@@ -39,6 +42,55 @@
// The standard version of this function doesn't have these "const"
// qualifiers, but the canonical SystemC implementation does.
extern "C" const char *const *sc_argv();
+
+enum sc_starvation_policy
+{
+SC_RUN_TO_TIME,
+SC_EXIT_ON_STARVATION
+};
+
+void sc_start();
+void sc_start(const sc_time &, sc_starvation_policy p=SC_RUN_TO_TIME);
+static inline void
+sc_start(double d, sc_time_unit t, sc_starvation_policy
p=SC_RUN_TO_TIME)
+{
+sc_start(sc_time(d, t), p);
+}
+
+void sc_pause();
+
+enum sc_stop_mode
+{
+SC_STOP_FINISH_DELTA,
+SC_STOP_IMMEDIATE,
+};
+
+void sc_set_stop_mode(sc_stop_mode mode);
+sc_stop_mode sc_get_stop_mode();
+
+void sc_stop();
+
+const sc_time _time_stamp();
+sc_dt::uint64 sc_delta_count();
+bool sc_is_running();
+bool sc_pending_activity_at_current_time();
+bool sc_pending_activity_at_future_time();
+bool sc_pending_activity();
+sc_time sc_time_to_pending_activity();
+
+enum sc_status
+{
+SC_ELABORATION = 0x1,
+SC_BEFORE_END_OF_ELABORATION = 0x02,
+SC_END_OF_ELABORATION = 0x04,
+SC_START_OF_SIMULATION = 0x08,
+SC_RUNNING = 0x10,
+SC_PAUSED = 0x20,
+SC_STOPPED = 0x40,
+SC_END_OF_SIMULATION = 0x80
+};
+
+sc_status sc_get_status();
} // namespace sc_core
#endif //__SYSTEMC_EXT_CORE_SC_MAIN_HH__
--
To view, visit
[gem5-dev] Change in gem5/gem5[master]: systemc: Construct and manage a module name stack.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10850
Change subject: systemc: Construct and manage a module name stack.
..
systemc: Construct and manage a module name stack.
Change-Id: I5f7f64d6c3d7e08ec6d2529f3c5d84fbfc2c421b
---
M src/systemc/core/SConscript
A src/systemc/core/module.cc
A src/systemc/core/module.hh
M src/systemc/core/sc_module_name.cc
M src/systemc/ext/core/sc_module_name.hh
5 files changed, 145 insertions(+), 4 deletions(-)
diff --git a/src/systemc/core/SConscript b/src/systemc/core/SConscript
index 65c00bd..ca82130 100644
--- a/src/systemc/core/SConscript
+++ b/src/systemc/core/SConscript
@@ -33,6 +33,7 @@
Source('fiber.cc')
GTest('fibertest', 'fibertest.cc', 'fiber.cc')
Source('kernel.cc')
+Source('module.cc')
Source('sc_attr.cc')
Source('sc_event.cc')
diff --git a/src/systemc/core/module.cc b/src/systemc/core/module.cc
new file mode 100644
index 000..97a4a9f
--- /dev/null
+++ b/src/systemc/core/module.cc
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/core/module.hh"
+
+#include
+
+#include "base/logging.hh"
+
+namespace SystemC
+{
+
+namespace
+{
+
+std::list _modules;
+
+Module *_top_module = nullptr;
+
+} // anonymous namespace
+
+void
+Module::push()
+{
+if (!_top_module)
+_top_module = this;
+_modules.push_back(this);
+}
+
+void
+Module::pop()
+{
+panic_if(_modules.size(), "Popping from empty module list.\n");
+panic_if(_modules.back() != this,
+"Popping module which isn't at the end of the module list.\n");
+}
+
+Module *
+topModule()
+{
+return _top_module;
+}
+
+} // namespace SystemC
diff --git a/src/systemc/core/module.hh b/src/systemc/core/module.hh
new file mode 100644
index 000..56e125e
--- /dev/null
+++ b/src/systemc/core/module.hh
@@ -0,0 +1,61 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a namespace to the SC_MODULE's sc_module.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10853 Change subject: systemc: Add a namespace to the SC_MODULE's sc_module. .. systemc: Add a namespace to the SC_MODULE's sc_module. Ensure that when expanded, SC_MODULE will work regardless of the containing namespace. Change-Id: I608dbd6c36dca8c838feb0a239c3c053d5346599 --- M src/systemc/ext/core/sc_module.hh 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/systemc/ext/core/sc_module.hh b/src/systemc/ext/core/sc_module.hh index 5b1b143..3b270c2 100644 --- a/src/systemc/ext/core/sc_module.hh +++ b/src/systemc/ext/core/sc_module.hh @@ -218,7 +218,7 @@ void wait(const sc_time &, const sc_event_and_list &); void wait(double, sc_time_unit, const sc_event_and_list &); -#define SC_MODULE(name) struct name : sc_module +#define SC_MODULE(name) struct name : ::sc_core:sc_module #define SC_CTOR(name) /* Implementation defined */; name(sc_module_name) #define SC_HAS_PROCESS(name) /* Implementation defined */ #define SC_METHOD(name) /* Implementation defined */ -- To view, visit https://gem5-review.googlesource.com/10853 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I608dbd6c36dca8c838feb0a239c3c053d5346599 Gerrit-Change-Number: 10853 Gerrit-PatchSet: 1 Gerrit-Owner: Gabe Black Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: systemc: Add some missing "using"s for core enums, etc.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10852 Change subject: systemc: Add some missing "using"s for core enums, etc. .. systemc: Add some missing "using"s for core enums, etc. Change-Id: Ie2a61c412ff334c250b209f286571c18c7f06425 --- M src/systemc/ext/core/_using.hh 1 file changed, 21 insertions(+), 0 deletions(-) diff --git a/src/systemc/ext/core/_using.hh b/src/systemc/ext/core/_using.hh index 95ffc32..a9db38e 100644 --- a/src/systemc/ext/core/_using.hh +++ b/src/systemc/ext/core/_using.hh @@ -53,10 +53,16 @@ using sc_core::sc_argc; using sc_core::sc_argv; +using sc_core::sc_starvation_policy; +using sc_core::SC_RUN_TO_TIME; +using sc_core::SC_EXIT_ON_STARVATION; using sc_core::sc_start; using sc_core::sc_pause; using sc_core::sc_set_stop_mode; using sc_core::sc_get_stop_mode; +using sc_core::sc_stop_mode; +using sc_core::SC_STOP_FINISH_DELTA; +using sc_core::SC_STOP_IMMEDIATE; using sc_core::sc_stop; using sc_core::sc_time_stamp; using sc_core::sc_delta_count; @@ -66,6 +72,15 @@ using sc_core::sc_pending_activity; using sc_core::sc_time_to_pending_activity; using sc_core::sc_get_status; +using sc_core::SC_ELABORATION; +using sc_core::SC_BEFORE_END_OF_ELABORATION; +using sc_core::SC_END_OF_ELABORATION; +using sc_core::SC_START_OF_SIMULATION; +using sc_core::SC_RUNNING; +using sc_core::SC_PAUSED; +using sc_core::SC_STOPPED; +using sc_core::SC_END_OF_SIMULATION; +using sc_core::sc_status; using sc_core::sc_bind_proxy; using sc_core::SC_BIND_PROXY_NIL; @@ -102,6 +117,12 @@ using sc_core::sc_spawn; using sc_core::sc_time_unit; +using sc_core::SC_FS; +using sc_core::SC_PS; +using sc_core::SC_NS; +using sc_core::SC_US; +using sc_core::SC_MS; +using sc_core::SC_SEC; using sc_core::sc_time; using sc_core::SC_ZERO_TIME; using sc_core::sc_set_time_resolution; -- To view, visit https://gem5-review.googlesource.com/10852 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie2a61c412ff334c250b209f286571c18c7f06425 Gerrit-Change-Number: 10852 Gerrit-PatchSet: 1 Gerrit-Owner: Gabe Black Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: Systemc: Port over all of the systemc "datatype" headers.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10843 Change subject: Systemc: Port over all of the systemc "datatype" headers. .. Systemc: Port over all of the systemc "datatype" headers. These are the headers originally written by Accellera with a few modifications. Most significantly, I went through and mostly (but not entirely) manually editted them to conform to gem5 style and to be more self consistent. Second, I resolved some macros which optionally select features. I removed support for deprecated functions, and otherwise enabled everything. The actual implementation behind these headers will also be ported over, but in a subsequent change. Change-Id: I203d3f6c8a3af9120b946001d01defbb0643a6b6 --- M src/systemc/ext/channel/sc_in_resolved.hh M src/systemc/ext/channel/sc_inout_resolved.hh M src/systemc/ext/channel/sc_out_resolved.hh M src/systemc/ext/dt/_dt.hh M src/systemc/ext/dt/_using.hh A src/systemc/ext/dt/bit/_bit.hh A src/systemc/ext/dt/bit/_using.hh A src/systemc/ext/dt/bit/sc_bit.hh A src/systemc/ext/dt/bit/sc_bit_proxies.hh A src/systemc/ext/dt/bit/sc_bv.hh A src/systemc/ext/dt/bit/sc_bv_base.hh A src/systemc/ext/dt/bit/sc_logic.hh A src/systemc/ext/dt/bit/sc_lv.hh A src/systemc/ext/dt/bit/sc_lv_base.hh A src/systemc/ext/dt/bit/sc_proxy.hh A src/systemc/ext/dt/fx/_fx.hh A src/systemc/ext/dt/fx/_using.hh A src/systemc/ext/dt/fx/sc_context.hh A src/systemc/ext/dt/fx/sc_fix.hh A src/systemc/ext/dt/fx/sc_fixed.hh A src/systemc/ext/dt/fx/sc_fxcast_switch.hh A src/systemc/ext/dt/fx/sc_fxdefs.hh A src/systemc/ext/dt/fx/sc_fxnum.hh A src/systemc/ext/dt/fx/sc_fxnum_observer.hh A src/systemc/ext/dt/fx/sc_fxtype_params.hh A src/systemc/ext/dt/fx/sc_fxval.hh A src/systemc/ext/dt/fx/sc_fxval_observer.hh A src/systemc/ext/dt/fx/sc_ufix.hh A src/systemc/ext/dt/fx/sc_ufixed.hh A src/systemc/ext/dt/fx/scfx_ieee.hh A src/systemc/ext/dt/fx/scfx_mant.hh A src/systemc/ext/dt/fx/scfx_other_defs.hh A src/systemc/ext/dt/fx/scfx_params.hh A src/systemc/ext/dt/fx/scfx_pow10.hh A src/systemc/ext/dt/fx/scfx_rep.hh A src/systemc/ext/dt/fx/scfx_string.hh A src/systemc/ext/dt/fx/scfx_utils.hh M src/systemc/ext/dt/int/_int.hh M src/systemc/ext/dt/int/_using.hh A src/systemc/ext/dt/int/sc_bigint.hh A src/systemc/ext/dt/int/sc_biguint.hh A src/systemc/ext/dt/int/sc_int.hh A src/systemc/ext/dt/int/sc_int_base.hh A src/systemc/ext/dt/int/sc_length_param.hh M src/systemc/ext/dt/int/sc_nbdefs.hh A src/systemc/ext/dt/int/sc_nbexterns.hh A src/systemc/ext/dt/int/sc_nbutils.hh A src/systemc/ext/dt/int/sc_signed.hh A src/systemc/ext/dt/int/sc_uint.hh A src/systemc/ext/dt/int/sc_uint_base.hh A src/systemc/ext/dt/int/sc_unsigned.hh A src/systemc/ext/dt/misc/_misc.hh A src/systemc/ext/dt/misc/_using.hh A src/systemc/ext/dt/misc/sc_concatref.hh A src/systemc/ext/dt/misc/sc_value_base.hh A src/systemc/ext/dt/sc_mempool.hh A src/systemc/ext/dt/sc_temporary.hh 57 files changed, 33,850 insertions(+), 51 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10843 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I203d3f6c8a3af9120b946001d01defbb0643a6b6 Gerrit-Change-Number: 10843 Gerrit-PatchSet: 1 Gerrit-Owner: Gabe Black Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: systemc: Implement some simple accessor functions in sc_main.cc.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10847
Change subject: systemc: Implement some simple accessor functions in
sc_main.cc.
..
systemc: Implement some simple accessor functions in sc_main.cc.
These functions just read or write values with minimal amounts of
logic.
Change-Id: I22d5b49a2550a88a854d1619f08b0055c1312271
---
M src/systemc/core/sc_main.cc
1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/src/systemc/core/sc_main.cc b/src/systemc/core/sc_main.cc
index 2a38b41..815be9b 100644
--- a/src/systemc/core/sc_main.cc
+++ b/src/systemc/core/sc_main.cc
@@ -33,6 +33,7 @@
#include "python/pybind11/pybind.hh"
#include "sim/init.hh"
#include "systemc/ext/core/sc_main.hh"
+#include "systemc/ext/utils/sc_report_handler.hh"
// A default version of this function in case one isn't otherwise defined.
// This ensures everything will link properly whether or not the user
defined
@@ -107,6 +108,11 @@
}
EmbeddedPyBind embed_("systemc", _pybind);
+sc_stop_mode _stop_mode = SC_STOP_FINISH_DELTA;
+sc_status _status = SC_ELABORATION;
+
+uint64_t _deltaCycles = 0;
+
} // anonymous namespace
int
@@ -136,14 +142,18 @@
void
sc_set_stop_mode(sc_stop_mode mode)
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+if (sc_is_running()) {
+SC_REPORT_ERROR("attempt to set sc_stop mode "
+"after start will be ignored", "");
+return;
+}
+_stop_mode = mode;
}
sc_stop_mode
sc_get_stop_mode()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
-return SC_STOP_FINISH_DELTA;
+return _stop_mode;
}
void
@@ -162,15 +172,13 @@
sc_dt::uint64
sc_delta_count()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
-return 0;
+return _deltaCycles;
}
bool
sc_is_running()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
-return false;
+return _status & (SC_RUNNING | SC_PAUSED);
}
bool
@@ -190,8 +198,8 @@
bool
sc_pending_activity()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
-return false;
+return sc_pending_activity_at_current_time() ||
+ sc_pending_activity_at_future_time();
}
sc_time
@@ -204,8 +212,7 @@
sc_status
sc_get_status()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
-return SC_ELABORATION;
+return _status;
}
} // namespace sc_core
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I22d5b49a2550a88a854d1619f08b0055c1312271
Gerrit-Change-Number: 10847
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add the deprecated sc_module::end_module function.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10854
Change subject: systemc: Add the deprecated sc_module::end_module function.
..
systemc: Add the deprecated sc_module::end_module function.
The regression tests use this function. In the Accellera implementation
it seems to just do some error checking, so our version doesn't do
anything for now.
Change-Id: Icaad45e934bad69e301bc0234f73e69791940736
---
M src/systemc/ext/core/sc_module.hh
1 file changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/systemc/ext/core/sc_module.hh
b/src/systemc/ext/core/sc_module.hh
index 3b270c2..a87a4f5 100644
--- a/src/systemc/ext/core/sc_module.hh
+++ b/src/systemc/ext/core/sc_module.hh
@@ -138,6 +138,9 @@
sc_module(const sc_module_name &);
sc_module();
+/* Deprecated, but used in the regression tests. */
+void end_module() {}
+
void reset_signal_is(const sc_in &, bool);
void reset_signal_is(const sc_inout &, bool);
void reset_signal_is(const sc_out &, bool);
--
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Gerrit-Change-Id: Icaad45e934bad69e301bc0234f73e69791940736
Gerrit-Change-Number: 10854
Gerrit-PatchSet: 1
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add the Accellera implementation for the data type classes.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10844 Change subject: systemc: Add the Accellera implementation for the data type classes. .. systemc: Add the Accellera implementation for the data type classes. These files have been cleaned up style wise, and some macros have been resolved like they were for the header files. Change-Id: I447e5311961036847e7da0c5a86c0da25a633010 --- A src/systemc/dt/bit/SConscript A src/systemc/dt/bit/sc_bit.cc A src/systemc/dt/bit/sc_bv_base.cc A src/systemc/dt/bit/sc_logic.cc A src/systemc/dt/bit/sc_lv_base.cc A src/systemc/dt/fx/SConscript A src/systemc/dt/fx/sc_fxcast_switch.cc A src/systemc/dt/fx/sc_fxdefs.cc A src/systemc/dt/fx/sc_fxnum.cc A src/systemc/dt/fx/sc_fxnum_observer.cc A src/systemc/dt/fx/sc_fxtype_params.cc A src/systemc/dt/fx/sc_fxval.cc A src/systemc/dt/fx/sc_fxval_observer.cc A src/systemc/dt/fx/scfx_mant.cc A src/systemc/dt/fx/scfx_pow10.cc A src/systemc/dt/fx/scfx_rep.cc A src/systemc/dt/fx/scfx_utils.cc A src/systemc/dt/int/SConscript A src/systemc/dt/int/sc_int_base.cc A src/systemc/dt/int/sc_int_mask.cc A src/systemc/dt/int/sc_length_param.cc A src/systemc/dt/int/sc_nbcommon.inc A src/systemc/dt/int/sc_nbexterns.cc A src/systemc/dt/int/sc_nbfriends.inc A src/systemc/dt/int/sc_nbutils.cc A src/systemc/dt/int/sc_signed.cc A src/systemc/dt/int/sc_signed_bitref.inc A src/systemc/dt/int/sc_signed_subref.inc A src/systemc/dt/int/sc_uint_base.cc A src/systemc/dt/int/sc_unsigned.cc A src/systemc/dt/int/sc_unsigned_bitref.inc A src/systemc/dt/int/sc_unsigned_subref.inc A src/systemc/dt/misc/SConscript A src/systemc/dt/misc/sc_concatref.cc A src/systemc/dt/misc/sc_value_base.cc 35 files changed, 23,101 insertions(+), 0 deletions(-) -- To view, visit https://gem5-review.googlesource.com/10844 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I447e5311961036847e7da0c5a86c0da25a633010 Gerrit-Change-Number: 10844 Gerrit-PatchSet: 1 Gerrit-Owner: Gabe Black Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: systemc: Stub out all the standard utilility classes and functions.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10841 Change subject: systemc: Stub out all the standard utilility classes and functions. .. systemc: Stub out all the standard utilility classes and functions. Change-Id: I9e9724edb6281e0b0a6bae5546b0ede77d295c12 --- M src/systemc/ext/systemc M src/systemc/ext/systemc.h A src/systemc/ext/utils/_using.hh A src/systemc/ext/utils/_utils.hh A src/systemc/ext/utils/endian.hh A src/systemc/ext/utils/functions.hh A src/systemc/ext/utils/sc_exception.hh A src/systemc/ext/utils/sc_report.hh A src/systemc/ext/utils/sc_report_handler.hh A src/systemc/ext/utils/sc_trace_file.hh A src/systemc/ext/utils/sc_vector.hh A src/systemc/ext/utils/warn_unimpl.hh A src/systemc/utils/SConscript A src/systemc/utils/functions.cc A src/systemc/utils/sc_report.cc A src/systemc/utils/sc_report_handler.cc A src/systemc/utils/sc_trace_file.cc A src/systemc/utils/warn_unimpl.cc 18 files changed, 1,950 insertions(+), 0 deletions(-) diff --git a/src/systemc/ext/systemc b/src/systemc/ext/systemc index 633b84e..1224a7e 100644 --- a/src/systemc/ext/systemc +++ b/src/systemc/ext/systemc @@ -33,5 +33,6 @@ #include "channel/_channel.hh" #include "core/_core.hh" #include "dt/_dt.hh" +#include "utils/_utils.hh" #endif //__SYSTEMC_EXT_SYSTEMC__ diff --git a/src/systemc/ext/systemc.h b/src/systemc/ext/systemc.h index 4b49272..d530d61 100644 --- a/src/systemc/ext/systemc.h +++ b/src/systemc/ext/systemc.h @@ -36,6 +36,7 @@ #include "channel/_using.hh" #include "core/_using.hh" #include "dt/_using.hh" +#include "utils/_using.hh" // Include some system header files, and import some symbols from std into // the base namespace. diff --git a/src/systemc/ext/utils/_using.hh b/src/systemc/ext/utils/_using.hh new file mode 100644 index 000..596617e --- /dev/null +++ b/src/systemc/ext/utils/_using.hh @@ -0,0 +1,76 @@ +/* + * Copyright 2018 Google, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __SYSTEMC_EXT_UTILS__USING_HH__ +#define __SYSTEMC_EXT_UTILS__USING_HH__ + +#include "_utils.hh" + +using sc_core::sc_severity; +using sc_core::sc_verbosity; +using sc_core::sc_report; + +using sc_core::SC_UNSPECIFIED; +using sc_core::SC_DO_NOTHING; +using sc_core::SC_THROW; +using sc_core::SC_LOG; +using sc_core::SC_DISPLAY; +using sc_core::SC_CACHE_REPORT; +using sc_core::SC_INTERRUPT; +using sc_core::SC_STOP; +using sc_core::SC_ABORT; +using sc_core::sc_report_handler_proc; +using sc_core::sc_report_handler; +using sc_core::sc_interrupt_here; +using sc_core::sc_stop_here; + +using sc_core::sc_trace_file; +using sc_core::sc_trace; + +using sc_core::sc_exception; + +using sc_core::sc_vector_base; +using sc_core::sc_vector_iter; +using sc_core::sc_vector; +using sc_core::sc_vector_assembly; + +using sc_dt::sc_abs; +using sc_dt::sc_max; +using sc_dt::sc_min; + +using sc_core::sc_version_major; +using sc_core::sc_version_minor; +using sc_core::sc_version_patch; +using sc_core::sc_version_originator; +using sc_core::sc_version_release_date; +using sc_core::sc_version_prerelease; +using sc_core::sc_version_string; +using sc_core::sc_copyright_string; + +#endif //__SYSTEMC_EXT_UTILS__USING_HH__ diff --git a/src/systemc/ext/utils/_utils.hh b/src/systemc/ext/utils/_utils.hh new file mode 100644 index 000..d76caf9 --- /dev/null +++ b/src/systemc/ext/utils/_utils.hh @@ -0,0 +1,40 @@ +/* + * Copyright 2018
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stub kernel SimObject.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10822
Change subject: systemc: Add a stub kernel SimObject.
..
systemc: Add a stub kernel SimObject.
The guts of this class will be added in later changes.
Change-Id: I3582c40f88f7d9ba6028a6f0a8ee5c32924a65bf
---
M src/systemc/SConscript
M src/systemc/SystemC.py
A src/systemc/kernel.cc
A src/systemc/kernel.hh
4 files changed, 100 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 40ad8fc..21f9b19 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -30,4 +30,6 @@
if env['USE_SYSTEMC']:
SimObject('SystemC.py')
+Source('kernel.cc')
+
Source('sc_object.cc')
diff --git a/src/systemc/SystemC.py b/src/systemc/SystemC.py
index fad20e2..cc7c368 100644
--- a/src/systemc/SystemC.py
+++ b/src/systemc/SystemC.py
@@ -27,6 +27,11 @@
from m5.SimObject import SimObject
+class SystemC_Kernel(SimObject):
+type = 'SystemC_Kernel'
+cxx_class = 'SystemC::Kernel'
+cxx_header = 'systemc/kernel.hh'
+
class SystemC_ScObject(SimObject):
type = 'SystemC_ScObject'
abstract = True
diff --git a/src/systemc/kernel.cc b/src/systemc/kernel.cc
new file mode 100644
index 000..e52d04e
--- /dev/null
+++ b/src/systemc/kernel.cc
@@ -0,0 +1,45 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/kernel.hh"
+
+namespace SystemC
+{
+
+Kernel::Kernel(Params *params) : SimObject(params)
+{
+}
+
+} // namespace SystemC
+
+SystemC::Kernel *
+SystemC_KernelParams::create()
+{
+return new SystemC::Kernel(this);
+}
diff --git a/src/systemc/kernel.hh b/src/systemc/kernel.hh
new file mode 100644
index 000..74fd309
--- /dev/null
+++ b/src/systemc/kernel.hh
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __SYSTEMC_KERNEL_HH__
+#define
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stubbed out sc_object class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10821
Change subject: systemc: Add a stubbed out sc_object class.
..
systemc: Add a stubbed out sc_object class.
Also add a SConsopt variable USE_SYSTEMC to hide systemc support until
it's usable.
Change-Id: Ibb37483432b147ee690a36bb5c8dd74f1c4c7ae4
---
A src/systemc/SConscript
A src/systemc/SConsopts
A src/systemc/SystemC.py
A src/systemc/sc_object.cc
A src/systemc/sc_object.hh
5 files changed, 367 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
new file mode 100644
index 000..40ad8fc
--- /dev/null
+++ b/src/systemc/SConscript
@@ -0,0 +1,33 @@
+# Copyright 2018 Google, Inc.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+Import('*')
+
+if env['USE_SYSTEMC']:
+SimObject('SystemC.py')
+
+Source('sc_object.cc')
diff --git a/src/systemc/SConsopts b/src/systemc/SConsopts
new file mode 100644
index 000..f3da63d
--- /dev/null
+++ b/src/systemc/SConsopts
@@ -0,0 +1,34 @@
+# Copyright 2018 Google, Inc.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Gabe Black
+
+Import('*')
+
+sticky_vars.AddVariables(
+BoolVariable('USE_SYSTEMC', 'Enable SystemC API support', False)
+)
+
+export_vars.append('USE_SYSTEMC')
diff --git a/src/systemc/SystemC.py b/src/systemc/SystemC.py
new file mode 100644
index 000..fad20e2
--- /dev/null
+++ b/src/systemc/SystemC.py
@@ -0,0 +1,42 @@
+# Copyright 2018 Google, Inc.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright
[gem5-dev] Change in gem5/gem5[master]: systemc: Stub out the sc_spawn related classes and functions.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10837
Change subject: systemc: Stub out the sc_spawn related classes and
functions.
..
systemc: Stub out the sc_spawn related classes and functions.
Change-Id: I79f695cca97aaae9af324eb18cab073f42f0a193
---
M src/systemc/core/SConscript
A src/systemc/core/sc_spawn.cc
A src/systemc/ext/core/sc_spawn.hh
3 files changed, 293 insertions(+), 0 deletions(-)
diff --git a/src/systemc/core/SConscript b/src/systemc/core/SConscript
index 4cc6b68..e12ed59 100644
--- a/src/systemc/core/SConscript
+++ b/src/systemc/core/SConscript
@@ -44,4 +44,5 @@
Source('sc_process_handle.cc')
Source('sc_prim.cc')
Source('sc_sensitive.cc')
+Source('sc_spawn.cc')
Source('sc_time.cc')
diff --git a/src/systemc/core/sc_spawn.cc b/src/systemc/core/sc_spawn.cc
new file mode 100644
index 000..fd7dc0a
--- /dev/null
+++ b/src/systemc/core/sc_spawn.cc
@@ -0,0 +1,163 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "base/logging.hh"
+#include "systemc/ext/core/sc_spawn.hh"
+
+namespace sc_core
+{
+
+sc_spawn_options::sc_spawn_options()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+void
+sc_spawn_options::spawn_method()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::dont_initialize()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::set_stack_size(int)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+void
+sc_spawn_options::set_sensitivity(const sc_event *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::set_sensitivity(sc_port_base *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::set_sensitivity(sc_export_base *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::set_sensitivity(sc_interface *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::set_sensitivity(sc_event_finder *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+void
+sc_spawn_options::reset_signal_is(const sc_in &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::reset_signal_is(const sc_inout &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::reset_signal_is(const sc_out &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::reset_signal_is(const sc_signal_in_if &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+void
+sc_spawn_options::async_reset_signal_is(const sc_in &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::async_reset_signal_is(const sc_inout &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::async_reset_signal_is(const sc_out &, bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_spawn_options::async_reset_signal_is(const sc_signal_in_if &,
bool)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+void
+sc_spawn_warn_unimpl(const char *func)
+{
+warn("%s not implemented.\n", func);
+}
+
+} // namespace sc_core
+
+namespace sc_unnamed
+{
+
[gem5-dev] Change in gem5/gem5[master]: systemc: Stub out the sc_module class and related functions.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10834
Change subject: systemc: Stub out the sc_module class and related functions.
..
systemc: Stub out the sc_module class and related functions.
Change-Id: I2c20717fe1f750bf7ae84de79726b1503ec6e1cd
---
M src/systemc/SConscript
A src/systemc/sc_module.cc
A src/systemc/sc_module.hh
3 files changed, 753 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 3b83ff3..a94eb00 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -37,6 +37,7 @@
Source('sc_export.cc')
Source('sc_interface.cc')
Source('sc_main.cc')
+Source('sc_module.cc')
Source('sc_module_name.cc')
Source('sc_object.cc')
Source('sc_port.cc')
diff --git a/src/systemc/sc_module.cc b/src/systemc/sc_module.cc
new file mode 100644
index 000..78a06ec
--- /dev/null
+++ b/src/systemc/sc_module.cc
@@ -0,0 +1,517 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_module.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+const sc_bind_proxy SC_BIND_PROXY_NUL;
+
+sc_module::~sc_module()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+const char *
+sc_module::kind() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return "";
+}
+
+void
+sc_module::operator () (const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+const sc_bind_proxy ,
+
[gem5-dev] Change in gem5/gem5[master]: systemc: Add systemc and systemc.h header files.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/10838 Change subject: systemc: Add systemc and systemc.h header files. .. systemc: Add systemc and systemc.h header files. These are the header files as defined by the standard, although some predefined channel types and most of the sc_dt namespace have yet to be stubbed out, and so those portions are excluded. Change-Id: Ic70f887c06e591974a4265c820eb0fdfa740d19a --- A src/systemc/ext/core/_core.hh A src/systemc/ext/core/_using.hh A src/systemc/ext/dt/_dt.hh A src/systemc/ext/dt/_using.hh A src/systemc/ext/dt/int/_int.hh A src/systemc/ext/dt/int/_using.hh A src/systemc/ext/systemc A src/systemc/ext/systemc.h 8 files changed, 435 insertions(+), 0 deletions(-) diff --git a/src/systemc/ext/core/_core.hh b/src/systemc/ext/core/_core.hh new file mode 100644 index 000..648328c --- /dev/null +++ b/src/systemc/ext/core/_core.hh @@ -0,0 +1,48 @@ +/* + * Copyright 2018 Google, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __SYSTEMC_EXT_CORE__CORE_HH__ +#define __SYSTEMC_EXT_CORE__CORE_HH__ + +#include "sc_attr.hh" +#include "sc_event.hh" +#include "sc_export.hh" +#include "sc_interface.hh" +#include "sc_main.hh" +#include "sc_module.hh" +#include "sc_module_name.hh" +#include "sc_object.hh" +#include "sc_port.hh" +#include "sc_prim.hh" +#include "sc_process_handle.hh" +#include "sc_sensitive.hh" +#include "sc_spawn.hh" +#include "sc_time.hh" + +#endif //__SYSTEMC_EXT_CORE__CORE_HH__ diff --git a/src/systemc/ext/core/_using.hh b/src/systemc/ext/core/_using.hh new file mode 100644 index 000..6c4c431 --- /dev/null +++ b/src/systemc/ext/core/_using.hh @@ -0,0 +1,98 @@ +/* + * Copyright 2018 Google, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __SYSTEMC_EXT_CORE__USING_HH__ +#define __SYSTEMC_EXT_CORE__USING_HH__ + +#include "_core.hh" + +using sc_core::sc_attr_base; +using
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stub version of the sc_interface class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10825
Change subject: systemc: Add a stub version of the sc_interface class.
..
systemc: Add a stub version of the sc_interface class.
Change-Id: Iad1da472e13b0e16ad4de03f456ca0a001e69b51
---
M src/systemc/SConscript
A src/systemc/sc_interface.cc
A src/systemc/sc_interface.hh
3 files changed, 118 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 6e6742f..8be89bc 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -32,6 +32,7 @@
Source('kernel.cc')
+Source('sc_interface.cc')
Source('sc_main.cc')
Source('sc_module_name.cc')
Source('sc_object.cc')
diff --git a/src/systemc/sc_interface.cc b/src/systemc/sc_interface.cc
new file mode 100644
index 000..18124ab
--- /dev/null
+++ b/src/systemc/sc_interface.cc
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_interface.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+void
+sc_interface::register_port(sc_port_base &, const char *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+const sc_event &
+sc_interface::default_event() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *(sc_event *)nullptr;
+}
+
+sc_interface::~sc_interface()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_interface::sc_interface()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+} // namespace sc_core
diff --git a/src/systemc/sc_interface.hh b/src/systemc/sc_interface.hh
new file mode 100644
index 000..4418a95
--- /dev/null
+++ b/src/systemc/sc_interface.hh
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __SYSTEMC_SC_INTERFACE_HH__
+#define __SYSTEMC_SC_INTERFACE_HH__
+
+namespace
[gem5-dev] Change in gem5/gem5[master]: systemc: Seperate the "external" header interface.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10835
Change subject: systemc: Seperate the "external" header interface.
..
systemc: Seperate the "external" header interface.
Most (but not all) of the SystemC headers are part of the "external"
interface that an existing, standard compliant module would include
through or . Since those follow slightly different
rules (relative includes, no gem5 includes), this change separates them
out so that they're easier to identify.
Also, this change moves the other files into a "core" subdirectory,
with the intention to add a "dt", aka data type, directory some time in
the future when those standard defined types are implemented.
Change-Id: Ida63f9cc0bc0431024d4dd691cc5b22b944a99a8
---
R src/systemc/core/SConscript
R src/systemc/core/SystemC.py
R src/systemc/core/kernel.cc
R src/systemc/core/kernel.hh
R src/systemc/core/sc_attr.cc
R src/systemc/core/sc_event.cc
R src/systemc/core/sc_export.cc
R src/systemc/core/sc_interface.cc
R src/systemc/core/sc_main.cc
R src/systemc/core/sc_module.cc
R src/systemc/core/sc_module_name.cc
R src/systemc/core/sc_object.cc
R src/systemc/core/sc_port.cc
R src/systemc/core/sc_prim.cc
R src/systemc/core/sc_sensitive.cc
R src/systemc/core/sc_time.cc
R src/systemc/ext/core/sc_attr.hh
R src/systemc/ext/core/sc_event.hh
R src/systemc/ext/core/sc_export.hh
R src/systemc/ext/core/sc_interface.hh
R src/systemc/ext/core/sc_main.hh
R src/systemc/ext/core/sc_module.hh
R src/systemc/ext/core/sc_module_name.hh
R src/systemc/ext/core/sc_object.hh
R src/systemc/ext/core/sc_port.hh
R src/systemc/ext/core/sc_prim.hh
R src/systemc/ext/core/sc_sensitive.hh
R src/systemc/ext/core/sc_time.hh
R src/systemc/ext/dt/int/sc_nbdefs.hh
29 files changed, 52 insertions(+), 64 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/core/SConscript
similarity index 100%
rename from src/systemc/SConscript
rename to src/systemc/core/SConscript
diff --git a/src/systemc/SystemC.py b/src/systemc/core/SystemC.py
similarity index 95%
rename from src/systemc/SystemC.py
rename to src/systemc/core/SystemC.py
index d63d4bb..833c9fc 100644
--- a/src/systemc/SystemC.py
+++ b/src/systemc/core/SystemC.py
@@ -30,7 +30,7 @@
class SystemC_Kernel(SimObject):
type = 'SystemC_Kernel'
cxx_class = 'SystemC::Kernel'
-cxx_header = 'systemc/kernel.hh'
+cxx_header = 'systemc/core/kernel.hh'
def sc_main(self, *args):
from _m5.systemc import sc_main
@@ -40,7 +40,7 @@
type = 'SystemC_ScObject'
abstract = True
cxx_class = 'sc_core::sc_object'
-cxx_header = 'systemc/sc_object.hh'
+cxx_header = 'systemc/ext/core/sc_object.hh'
cxx_base = None
# Hide the cxx_exports from SimObject since we don't inherit from
diff --git a/src/systemc/kernel.cc b/src/systemc/core/kernel.cc
similarity index 97%
rename from src/systemc/kernel.cc
rename to src/systemc/core/kernel.cc
index e52d04e..288a037 100644
--- a/src/systemc/kernel.cc
+++ b/src/systemc/core/kernel.cc
@@ -27,7 +27,7 @@
* Authors: Gabe Black
*/
-#include "systemc/kernel.hh"
+#include "systemc/core/kernel.hh"
namespace SystemC
{
diff --git a/src/systemc/kernel.hh b/src/systemc/core/kernel.hh
similarity index 100%
rename from src/systemc/kernel.hh
rename to src/systemc/core/kernel.hh
diff --git a/src/systemc/sc_attr.cc b/src/systemc/core/sc_attr.cc
similarity index 98%
rename from src/systemc/sc_attr.cc
rename to src/systemc/core/sc_attr.cc
index 6128f93..28e0b60 100644
--- a/src/systemc/sc_attr.cc
+++ b/src/systemc/core/sc_attr.cc
@@ -27,9 +27,8 @@
* Authors: Gabe Black
*/
-#include "systemc/sc_attr.hh"
-
#include "base/logging.hh"
+#include "systemc/ext/core/sc_attr.hh"
namespace sc_core
{
diff --git a/src/systemc/sc_event.cc b/src/systemc/core/sc_event.cc
similarity index 99%
rename from src/systemc/sc_event.cc
rename to src/systemc/core/sc_event.cc
index a96d5f3..f3b27be 100644
--- a/src/systemc/sc_event.cc
+++ b/src/systemc/core/sc_event.cc
@@ -27,9 +27,8 @@
* Authors: Gabe Black
*/
-#include "systemc/sc_event.hh"
-
#include "base/logging.hh"
+#include "systemc/ext/core/sc_event.hh"
namespace sc_core
{
diff --git a/src/systemc/sc_export.cc b/src/systemc/core/sc_export.cc
similarity index 97%
rename from src/systemc/sc_export.cc
rename to src/systemc/core/sc_export.cc
index 1363f4c..dbe910a 100644
--- a/src/systemc/sc_export.cc
+++ b/src/systemc/core/sc_export.cc
@@ -27,9 +27,8 @@
* Authors: Gabe Black
*/
-#include "systemc/sc_export.hh"
-
#include "base/logging.hh"
+#include "systemc/ext/core/sc_export.hh"
namespace sc_core
{
diff --git a/src/systemc/sc_interface.cc b/src/systemc/core/sc_interface.cc
similarity index 97%
rename from src/systemc/sc_interface.cc
rename to src/systemc/core/sc_interface.cc
index 18124ab..e01bdcc 100644
--- a/src/systemc/sc_interface.cc
+++ b/src/systemc/core/sc_interface.cc
@@ -27,9 +27,8 @@
*
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stubbed out sc_event_finder class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10831
Change subject: systemc: Add a stubbed out sc_event_finder class.
..
systemc: Add a stubbed out sc_event_finder class.
The standard defines this class very loosely, and so there isn't much
in the stub definition.
Change-Id: I2f8d07927a4eb087235e345a09d5a4d4891413b5
---
M src/systemc/sc_event.hh
1 file changed, 12 insertions(+), 0 deletions(-)
diff --git a/src/systemc/sc_event.hh b/src/systemc/sc_event.hh
index 0da36f2..002674f 100644
--- a/src/systemc/sc_event.hh
+++ b/src/systemc/sc_event.hh
@@ -43,6 +43,18 @@
class sc_object;
class sc_port_base;
+class sc_event_finder
+{
+};
+
+template
+class sc_event_finder_t : public sc_event_finder
+{
+ public:
+sc_event_finder_t(const sc_port_base &,
+ const sc_event & (IF::*event_method)() const);
+};
+
class sc_event_and_list
{
public:
--
To view, visit https://gem5-review.googlesource.com/10831
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I2f8d07927a4eb087235e345a09d5a4d4891413b5
Gerrit-Change-Number: 10831
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
___
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add stubbed out versions of the sc_time functions.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10827
Change subject: systemc: Add stubbed out versions of the sc_time functions.
..
systemc: Add stubbed out versions of the sc_time functions.
Change-Id: Ie7e3eac0382dc2ed861eaa9ea53ab11069812db8
---
M src/systemc/SConscript
A src/systemc/sc_time.cc
A src/systemc/sc_time.hh
3 files changed, 332 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 8be89bc..976c344 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -36,3 +36,4 @@
Source('sc_main.cc')
Source('sc_module_name.cc')
Source('sc_object.cc')
+Source('sc_time.cc')
diff --git a/src/systemc/sc_time.cc b/src/systemc/sc_time.cc
new file mode 100644
index 000..7c1b4ee
--- /dev/null
+++ b/src/systemc/sc_time.cc
@@ -0,0 +1,233 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_time.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+sc_time::sc_time()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_time::sc_time(double, sc_time_unit)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_time::sc_time(const sc_time &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_time &
+sc_time::operator = (const sc_time &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_dt::uint64
+sc_time::value() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0;
+}
+
+double
+sc_time::to_double() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0.0;
+}
+double
+sc_time::to_seconds() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0.0;
+}
+
+const std::string
+sc_time::to_string() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return "";
+}
+
+bool
+sc_time::operator == (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return true;
+}
+
+bool
+sc_time::operator != (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_time::operator < (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_time::operator <= (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return true;
+}
+
+bool
+sc_time::operator > (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_time::operator >= (const sc_time &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return true;
+}
+
+sc_time &
+sc_time::operator += (const sc_time &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_time &
+sc_time::operator -= (const sc_time &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_time &
+sc_time::operator *= (double)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_time &
+sc_time::operator /= (double)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+void
+sc_time::print(std::ostream &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+const sc_time
+operator + (const sc_time &,
[gem5-dev] Change in gem5/gem5[master]: systemc: Add stubbed out versions of sc_event and related classes.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10828
Change subject: systemc: Add stubbed out versions of sc_event and related
classes.
..
systemc: Add stubbed out versions of sc_event and related classes.
Change-Id: Id45c80cbb8774d8469d4df6ce7915161df977de0
---
M src/systemc/SConscript
A src/systemc/sc_event.cc
A src/systemc/sc_event.hh
3 files changed, 452 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 976c344..2a96193 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -32,6 +32,7 @@
Source('kernel.cc')
+Source('sc_event.cc')
Source('sc_interface.cc')
Source('sc_main.cc')
Source('sc_module_name.cc')
diff --git a/src/systemc/sc_event.cc b/src/systemc/sc_event.cc
new file mode 100644
index 000..a96d5f3
--- /dev/null
+++ b/src/systemc/sc_event.cc
@@ -0,0 +1,317 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_event.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+sc_event_and_list::sc_event_and_list()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_and_list::sc_event_and_list(const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_and_list::sc_event_and_list(const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_and_list &
+sc_event_and_list::operator = (const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+int
+sc_event_and_list::size() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0;
+}
+
+void
+sc_event_and_list::swap(sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_and_list &
+sc_event_and_list::operator &= (const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_event_and_list &
+sc_event_and_list::operator &= (const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_event_and_expr
+sc_event_and_list::operator & (const sc_event &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return sc_event_and_expr();
+}
+
+sc_event_and_expr
+sc_event_and_list::operator & (const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return sc_event_and_expr();
+}
+
+sc_event_or_list::sc_event_or_list()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_or_list::sc_event_or_list(const sc_event_or_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_or_list::sc_event_or_list(const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_or_list&
+sc_event_or_list::operator = (const sc_event_or_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_event_or_list::~sc_event_or_list()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+int
+sc_event_or_list::size() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return 0;
+}
+
+void
+sc_event_or_list::swap(sc_event_or_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_event_or_list &
+sc_event_or_list::operator |= (const sc_event &)
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stub implementation for sc_attr related classes.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10832
Change subject: systemc: Add a stub implementation for sc_attr related
classes.
..
systemc: Add a stub implementation for sc_attr related classes.
Change-Id: I59ba11f71b5412643ea7026df91587fafa0c6fda
---
M src/systemc/SConscript
A src/systemc/sc_attr.cc
A src/systemc/sc_attr.hh
3 files changed, 184 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 7594b9b..c4c5dd7 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -32,6 +32,7 @@
Source('kernel.cc')
+Source('sc_attr.cc')
Source('sc_event.cc')
Source('sc_export.cc')
Source('sc_interface.cc')
diff --git a/src/systemc/sc_attr.cc b/src/systemc/sc_attr.cc
new file mode 100644
index 000..6128f93
--- /dev/null
+++ b/src/systemc/sc_attr.cc
@@ -0,0 +1,93 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_attr.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+sc_attr_base::sc_attr_base(const std::string &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_attr_base::sc_attr_base(const sc_attr_base &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_attr_base::~sc_attr_base()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+const std::string &
+sc_attr_base::name() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *(const std::string *)nullptr;
+}
+
+void
+sc_attr_base::warn_unimpl(const char *func)
+{
+warn("%s not implemented.\n", func);
+}
+
+sc_attr_cltn::iterator
+sc_attr_cltn::begin()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return (iterator)nullptr;
+}
+
+sc_attr_cltn::const_iterator
+sc_attr_cltn::begin() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return (const_iterator)nullptr;
+}
+
+sc_attr_cltn::iterator
+sc_attr_cltn::end()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return (iterator)nullptr;
+}
+
+sc_attr_cltn::const_iterator
+sc_attr_cltn::end() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return (const_iterator)nullptr;
+}
+
+} // namespace sc_core
diff --git a/src/systemc/sc_attr.hh b/src/systemc/sc_attr.hh
new file mode 100644
index 000..512aa06
--- /dev/null
+++ b/src/systemc/sc_attr.hh
@@ -0,0 +1,90 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR
[gem5-dev] Change in gem5/gem5[master]: systemc: Partially implement the sc_module_name class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10823
Change subject: systemc: Partially implement the sc_module_name class.
..
systemc: Partially implement the sc_module_name class.
This class is mostly implemented as defined by the spec, except that
it doesn't maintain the module name stack (which doesn't yet exist).
Change-Id: I05fdc4aa40fb0497b0165824baee87ebf01a7821
---
M src/systemc/SConscript
A src/systemc/sc_module_name.cc
A src/systemc/sc_module_name.hh
3 files changed, 117 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 21f9b19..3677a60 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -32,4 +32,5 @@
Source('kernel.cc')
+Source('sc_module_name.cc')
Source('sc_object.cc')
diff --git a/src/systemc/sc_module_name.cc b/src/systemc/sc_module_name.cc
new file mode 100644
index 000..06291e6
--- /dev/null
+++ b/src/systemc/sc_module_name.cc
@@ -0,0 +1,60 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+
+#include "systemc/sc_module_name.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+sc_module_name::sc_module_name(const char *name) :
+_name(name), _on_the_stack(true)
+{
+warn("%s: Module name not added to stack.\n", __PRETTY_FUNCTION__);
+}
+
+sc_module_name::sc_module_name(const sc_module_name ) :
+_name(other._name), _on_the_stack(false)
+{}
+
+sc_module_name::~sc_module_name()
+{
+if (_on_the_stack) {
+warn("%s: Module name not removed from stack.\n",
__PRETTY_FUNCTION__);
+}
+}
+
+sc_module_name::operator const char *() const
+{
+return _name;
+}
+
+} // namespace sc_core
diff --git a/src/systemc/sc_module_name.hh b/src/systemc/sc_module_name.hh
new file mode 100644
index 000..40279b3
--- /dev/null
+++ b/src/systemc/sc_module_name.hh
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE
[gem5-dev] Change in gem5/gem5[master]: systemc: Add the sc_nbdefs.hh header from Accellera.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10826
Change subject: systemc: Add the sc_nbdefs.hh header from Accellera.
..
systemc: Add the sc_nbdefs.hh header from Accellera.
This header defines the uint64 type alias needed for the sc_time class.
Change-Id: I7793dbfb98001796c8c8fe24f69fe7868249ff85
---
A src/systemc/dt/int/sc_nbdefs.hh
1 file changed, 168 insertions(+), 0 deletions(-)
diff --git a/src/systemc/dt/int/sc_nbdefs.hh
b/src/systemc/dt/int/sc_nbdefs.hh
new file mode 100644
index 000..48d735a
--- /dev/null
+++ b/src/systemc/dt/int/sc_nbdefs.hh
@@ -0,0 +1,168 @@
+/*
+
+ Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
+ more contributor license agreements. See the NOTICE file distributed
+ with this work for additional information regarding copyright ownership.
+ Accellera licenses this file to you under the Apache License, Version 2.0
+ (the "License"); you may not use this file except in compliance with the
+ License. You may obtain a copy of the License at
+
+http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+ implied. See the License for the specific language governing
+ permissions and limitations under the License.
+
+
*/
+
+/*
+ sc_nbdefs.h -- Top level header file for arbitrary precision
signed/unsigned
+ arithmetic. This file defines all the constants needed.
+
*/
+
+#ifndef __SYSTEMC_DT_SC_NBDEFS_H__
+#define __SYSTEMC_DT_SC_NBDEFS_H__
+
+#include
+
+#include
+
+namespace sc_dt
+{
+
+//
+// ENUM : sc_numrep
+//
+// Enumeration of number representations for character string conversion.
+//
+
+enum sc_numrep
+{
+SC_NOBASE = 0,
+SC_BIN = 2,
+SC_OCT = 8,
+SC_DEC = 10,
+SC_HEX = 16,
+SC_BIN_US,
+SC_BIN_SM,
+SC_OCT_US,
+SC_OCT_SM,
+SC_HEX_US,
+SC_HEX_SM,
+SC_CSD
+};
+
+
+// Sign of a number:
+#define SC_NEG -1 // Negative number
+#define SC_ZERO 0 // Zero
+#define SC_POS 1 // Positive number
+#define SC_NOSIGN 2 // Uninitialized sc_signed number
+
+typedef unsigned char uchar;
+
+// A small_type number is at least a char. Defining an int is probably
+// better for alignment.
+typedef int small_type;
+
+// Attributes of a byte.
+#define BITS_PER_BYTE 8
+#define BYTE_RADIX 256
+#define BYTE_MASK 255
+
+// LOG2_BITS_PER_BYTE = log2(BITS_PER_BYTE), assuming that
+// BITS_PER_BYTE is a power of 2.
+#define LOG2_BITS_PER_BYTE 3
+
+// Attributes of the unsigned long. These definitions are used mainly in
+// the functions that are aware of the internal representation of digits,
+// e.g., get/set_packed_rep().
+#define BYTES_PER_DIGIT_TYPE 4
+#define BITS_PER_DIGIT_TYPE 32
+
+// Attributes of a digit, i.e., unsigned long less the overflow bits.
+#define BYTES_PER_DIGIT 4
+#define BITS_PER_DIGIT 30
+#define DIGIT_RADIX (1ul << BITS_PER_DIGIT)
+#define DIGIT_MASK (DIGIT_RADIX - 1)
+// Make sure that BYTES_PER_DIGIT = ceil(BITS_PER_DIGIT / BITS_PER_BYTE).
+
+// Similar attributes for the half of a digit. Note that
+// HALF_DIGIT_RADIX is equal to the square root of DIGIT_RADIX. These
+// definitions are used mainly in the multiplication routines.
+#define BITS_PER_HALF_DIGIT (BITS_PER_DIGIT / 2)
+#define HALF_DIGIT_RADIX (1ul << BITS_PER_HALF_DIGIT)
+#define HALF_DIGIT_MASK (HALF_DIGIT_RADIX - 1)
+
+// DIV_CEIL2(x, y) = ceil(x / y). x and y are positive numbers.
+#define DIV_CEIL2(x, y) (((x) - 1) / (y) + 1)
+
+// DIV_CEIL(x) = ceil(x / BITS_PER_DIGIT) = the number of digits to
+// store x bits. x is a positive number.
+#define DIV_CEIL(x) DIV_CEIL2(x, BITS_PER_DIGIT)
+
+#ifdef SC_MAX_NBITS
+static const int MAX_NDIGITS = DIV_CEIL(SC_MAX_NBITS) + 2;
+// Consider a number with x bits another with y bits. The maximum
+// number of bits happens when we multiply them. The result will have
+// (x + y) bits. Assume that x + y <= SC_MAX_NBITS. Then, DIV_CEIL(x) +
+// DIV_CEIL(y) <= DIV_CEIL(SC_MAX_NBITS) + 2. This is the reason for +2
+// above. With this change, MAX_NDIGITS must be enough to hold the
+// result of any operation.
+#endif
+
+// Support for "digit" vectors used to hold the values of sc_signed,
+// sc_unsigned, sc_bv_base, and sc_lv_base data types. This type is also
used
+// in the concatenation
[gem5-dev] Change in gem5/gem5[master]: systemc: Implement a stub version of the sc_prim class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10830
Change subject: systemc: Implement a stub version of the sc_prim class.
..
systemc: Implement a stub version of the sc_prim class.
Change-Id: Iad32f6e385e62dc10491783c1e5cdd5d9bfcc3e6
---
M src/systemc/SConscript
A src/systemc/sc_prim.cc
A src/systemc/sc_prim.hh
3 files changed, 314 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 9cc76dc..7594b9b 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -39,4 +39,5 @@
Source('sc_module_name.cc')
Source('sc_object.cc')
Source('sc_port.cc')
+Source('sc_prim.cc')
Source('sc_time.cc')
diff --git a/src/systemc/sc_prim.cc b/src/systemc/sc_prim.cc
new file mode 100644
index 000..516eab2
--- /dev/null
+++ b/src/systemc/sc_prim.cc
@@ -0,0 +1,216 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_prim.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+const char *
+sc_prim_channel::kind() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return "";
+}
+
+sc_prim_channel::sc_prim_channel()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_prim_channel::sc_prim_channel(const char *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::request_update()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::async_request_update()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_event_or_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_time &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(double, sc_time_unit)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_time &, const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(double, sc_time_unit, const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_time &, const sc_event_or_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(double, sc_time_unit, const sc_event_or_list
&)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(const sc_time &, const sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::next_trigger(double, sc_time_unit, const
sc_event_and_list &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::wait()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
+sc_prim_channel::wait(int)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+void
[gem5-dev] Change in gem5/gem5[master]: systemc: Hook up sc_main.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10824
Change subject: systemc: Hook up sc_main.
..
systemc: Hook up sc_main.
sc_main is exported as a python method on the SystemC_Kernel class and
takes a series of string arguments. The internal c++ implementation
converts those arguments into the standard argc and argv and uses them
to call the standard SystemC version of that function.
A weak SystemC version of sc_main is provided so that systemc will
compile with or without a simulation provided version of that
function. The weak version just complains and dies.
Change-Id: Iad735536c37c8bc85d06cf24779f607ae4309b8b
---
M src/systemc/SConscript
M src/systemc/SystemC.py
A src/systemc/sc_main.cc
A src/systemc/sc_main.hh
4 files changed, 174 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 3677a60..6e6742f 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -32,5 +32,6 @@
Source('kernel.cc')
+Source('sc_main.cc')
Source('sc_module_name.cc')
Source('sc_object.cc')
diff --git a/src/systemc/SystemC.py b/src/systemc/SystemC.py
index cc7c368..d63d4bb 100644
--- a/src/systemc/SystemC.py
+++ b/src/systemc/SystemC.py
@@ -32,6 +32,10 @@
cxx_class = 'SystemC::Kernel'
cxx_header = 'systemc/kernel.hh'
+def sc_main(self, *args):
+from _m5.systemc import sc_main
+sc_main(*args)
+
class SystemC_ScObject(SimObject):
type = 'SystemC_ScObject'
abstract = True
diff --git a/src/systemc/sc_main.cc b/src/systemc/sc_main.cc
new file mode 100644
index 000..88d51ba
--- /dev/null
+++ b/src/systemc/sc_main.cc
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_main.hh"
+
+#include
+
+#include "base/logging.hh"
+#include "python/pybind11/pybind.hh"
+#include "sim/init.hh"
+
+// A default version of this function in case one isn't otherwise defined.
+// This ensures everything will link properly whether or not the user
defined
+// a custom sc_main function. If they didn't but still try to call it,
throw
+// an error and die.
+[[gnu::weak]] int
+sc_main(int argc, char *argv[])
+{
+// If python attempts to call sc_main but no sc_main was defined...
+fatal("sc_main called but not defined.\n");
+}
+
+namespace sc_core
+{
+
+namespace
+{
+
+bool scMainCalled = false;
+
+int _argc = 0;
+char **_argv = NULL;
+
+// This wrapper adapts the python version of sc_main to the c++ version.
+void
+sc_main(pybind11::args args)
+{
+panic_if(scMainCalled, "sc_main called more than once.");
+
+_argc = args.size();
+_argv = new char *[_argc];
+
+// Initialize all the _argvs to NULL so we can delete [] them
+// unconditionally.
+for (int idx = 0; idx < _argc; idx++)
+_argv[idx] = NULL;
+
+// Attempt to convert all the arguments to strings. If that fails,
clean
+// up after ourselves. Also don't count this as a call to sc_main since
+// we never got to the c++ version of that function.
+try {
+for (int idx = 0; idx < _argc; idx++) {
+std::string arg = args[idx].cast();
+_argv[idx] = new char[arg.length() + 1];
+strcpy(_argv[idx], arg.c_str());
+}
+} catch (...) {
+// If that didn't work for some reason (probably a conversion
error)
+// blow
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a stubbed out implementation of the sc_sensitive class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10833
Change subject: systemc: Add a stubbed out implementation of the
sc_sensitive class.
..
systemc: Add a stubbed out implementation of the sc_sensitive class.
This sc_sensitive class is mostly implementation defined, but has a
few standards defined methods.
Change-Id: I7157f6bfaaef38b5804b19a1de9f3f0aff08b697
---
M src/systemc/SConscript
A src/systemc/sc_sensitive.cc
A src/systemc/sc_sensitive.hh
3 files changed, 118 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index c4c5dd7..3b83ff3 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -41,4 +41,5 @@
Source('sc_object.cc')
Source('sc_port.cc')
Source('sc_prim.cc')
+Source('sc_sensitive.cc')
Source('sc_time.cc')
diff --git a/src/systemc/sc_sensitive.cc b/src/systemc/sc_sensitive.cc
new file mode 100644
index 000..eedade0
--- /dev/null
+++ b/src/systemc/sc_sensitive.cc
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_sensitive.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+sc_sensitive &
+sc_sensitive::operator << (const sc_event &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_sensitive &
+sc_sensitive::operator << (const sc_interface &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_sensitive &
+sc_sensitive::operator << (const sc_port_base &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+sc_sensitive &
+sc_sensitive::operator << (sc_event_finder &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+} // namespace sc_core
diff --git a/src/systemc/sc_sensitive.hh b/src/systemc/sc_sensitive.hh
new file mode 100644
index 000..cd0dadb
--- /dev/null
+++ b/src/systemc/sc_sensitive.hh
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE
[gem5-dev] Change in gem5/gem5[master]: systemc: Flesh out the sc_port implementation slightly.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10840
Change subject: systemc: Flesh out the sc_port implementation slightly.
..
systemc: Flesh out the sc_port implementation slightly.
This makes other files compile because it changes the relationship
between constructors,etc., slightly.
Change-Id: I8d9a6e12ec640a82da166fe05c4f5e91f3f608de
---
M src/systemc/core/sc_port.cc
M src/systemc/ext/core/sc_port.hh
2 files changed, 17 insertions(+), 36 deletions(-)
diff --git a/src/systemc/core/sc_port.cc b/src/systemc/core/sc_port.cc
index e1823bc..46a295b 100644
--- a/src/systemc/core/sc_port.cc
+++ b/src/systemc/core/sc_port.cc
@@ -34,7 +34,7 @@
{
void
-sc_port_base::warn_unimpl(const char *func)
+sc_port_base::warn_unimpl(const char *func) const
{
warn("%s not implemented.\n", func);
}
diff --git a/src/systemc/ext/core/sc_port.hh
b/src/systemc/ext/core/sc_port.hh
index 1d32422..b2f9bd8 100644
--- a/src/systemc/ext/core/sc_port.hh
+++ b/src/systemc/ext/core/sc_port.hh
@@ -30,6 +30,7 @@
#ifndef __SYSTEMC_EXT_CORE_SC_PORT_HH__
#define __SYSTEMC_EXT_CORE_SC_PORT_HH__
+#include "sc_module.hh" // for sc_gen_unique_name
#include "sc_object.hh"
namespace sc_core
@@ -47,7 +48,10 @@
class sc_port_base : public sc_object
{
public:
-void warn_unimpl(const char *func);
+sc_port_base(const char *name, int n, sc_port_policy p) :
sc_object(name)
+{}
+
+void warn_unimpl(const char *func) const;
};
template
@@ -133,20 +137,13 @@
virtual void start_of_elaboration() {}
virtual void end_of_simulation() {}
-explicit sc_port_b(int, sc_port_policy)
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
-
-sc_port_b(const char *, int, sc_port_policy)
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
-
-virtual ~sc_port_b()
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
+explicit sc_port_b(int n, sc_port_policy p) :
+sc_port_base(sc_gen_unique_name("sc_port"), n, p)
+{}
+sc_port_b(const char *name, int n, sc_port_policy p) :
+sc_port_base(name, n, p)
+{}
+virtual ~sc_port_b() {}
private:
// Disabled
@@ -159,27 +156,11 @@
class sc_port : public sc_port_b
{
public:
-sc_port()
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
+sc_port() : sc_port_b(sc_gen_unique_name("sc_port"), N, P) {}
+explicit sc_port(const char *name) : sc_port_b(name, N, P) {}
+virtual ~sc_port() {}
-explicit sc_port(const char *)
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
-
-virtual ~sc_port()
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-}
-
-virtual const char *
-kind() const
-{
-warn_unimpl(__PRETTY_FUNCTION__);
-return "";
-}
+virtual const char *kind() const { return "sc_port"; }
private:
// Disabled
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I8d9a6e12ec640a82da166fe05c4f5e91f3f608de
Gerrit-Change-Number: 10840
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
___
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[gem5-dev] Change in gem5/gem5[master]: systemc: Make sc_main run in its own fiber.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10849
Change subject: systemc: Make sc_main run in its own fiber.
..
systemc: Make sc_main run in its own fiber.
The fiber will run until either sc_main returns, or until sc_start is
called. If sc_start is called, then the fiber will only be paused and
waiting for simulation cycles to be run by gem5. Once sc_pause and
sc_stop are implemented, if those are called the sc_main fiber will
be re-entered and allowed to run further towards completion.
Change-Id: I4df94f4f6fed8d49471732619a203d734d9a13a6
---
M src/systemc/core/sc_main.cc
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/src/systemc/core/sc_main.cc b/src/systemc/core/sc_main.cc
index 815be9b..737022b 100644
--- a/src/systemc/core/sc_main.cc
+++ b/src/systemc/core/sc_main.cc
@@ -30,8 +30,11 @@
#include
#include "base/logging.hh"
+#include "base/types.hh"
#include "python/pybind11/pybind.hh"
+#include "sim/eventq.hh"
#include "sim/init.hh"
+#include "systemc/core/fiber.hh"
#include "systemc/ext/core/sc_main.hh"
#include "systemc/ext/utils/sc_report_handler.hh"
@@ -57,6 +60,17 @@
int _argc = 0;
char **_argv = NULL;
+class ScMainFiber : public SystemC::Fiber
+{
+void
+main()
+{
+::sc_main(_argc, _argv);
+}
+};
+
+ScMainFiber scMainFiber;
+
// This wrapper adapts the python version of sc_main to the c++ version.
void
sc_main(pybind11::args args)
@@ -94,8 +108,7 @@
// again later.
scMainCalled = true;
-//TODO Start a new fiber to call sc_main from.
-::sc_main(_argc, _argv);
+scMainFiber.run();
}
// Make our sc_main wrapper available in the internal _m5 python module
under
@@ -111,6 +124,9 @@
sc_stop_mode _stop_mode = SC_STOP_FINISH_DELTA;
sc_status _status = SC_ELABORATION;
+Tick _max_tick = MaxTick;
+sc_starvation_policy _starvation = SC_EXIT_ON_STARVATION;
+
uint64_t _deltaCycles = 0;
} // anonymous namespace
@@ -130,13 +146,22 @@
void
sc_start()
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+_max_tick = MaxTick;
+_starvation = SC_EXIT_ON_STARVATION;
+
+// Switch back gem5.
+SystemC::gem5Fiber()->run();
}
void
sc_start(const sc_time , sc_starvation_policy p)
{
-warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+Tick now = curEventQueue() ? curEventQueue()->getCurTick() : 0;
+_max_tick = now + time.value();
+_starvation = p;
+
+// Switch back to gem5.
+SystemC::gem5Fiber()->run();
}
void
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I4df94f4f6fed8d49471732619a203d734d9a13a6
Gerrit-Change-Number: 10849
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add some missing sc_signal template specializations.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10851
Change subject: systemc: Add some missing sc_signal template
specializations.
..
systemc: Add some missing sc_signal template specializations.
There are supposed to be two template specializations for the sc_signal
class, one for bool and one for sc_dt::sc_logic. These were
accidentally ommitted from the sc_signal.hh header.
Change-Id: Id046bb00c71422004e85f0db903a9c353f3cc137
---
M src/systemc/ext/channel/sc_signal.hh
1 file changed, 260 insertions(+), 0 deletions(-)
diff --git a/src/systemc/ext/channel/sc_signal.hh
b/src/systemc/ext/channel/sc_signal.hh
index 3e70f83..569dd3c 100644
--- a/src/systemc/ext/channel/sc_signal.hh
+++ b/src/systemc/ext/channel/sc_signal.hh
@@ -149,6 +149,266 @@
return os;
}
+template
+class sc_signal :
+public sc_signal_inout_if, public sc_prim_channel
+{
+ public:
+sc_signal()
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+explicit sc_signal(const char *)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+virtual ~sc_signal()
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+
+virtual void
+register_port(sc_port_base &, const char *)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+
+virtual const bool &
+read() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(const bool *)nullptr;
+}
+operator const bool &() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(const bool *)nullptr;
+}
+
+virtual sc_writer_policy
+get_writer_policy() const
+{
+return WRITER_POLICY;
+}
+virtual void
+write(const bool &)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+sc_signal &
+operator = (const bool &)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *this;
+}
+sc_signal &
+operator = (const sc_signal &)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *this;
+}
+
+virtual const sc_event &
+default_event() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(sc_event *)nullptr;
+}
+
+virtual const sc_event &
+value_changed_event() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(sc_event *)nullptr;
+}
+virtual const sc_event &
+posedge_event() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(sc_event *)nullptr;
+}
+virtual const sc_event &
+negedge_event() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(sc_event *)nullptr;
+}
+
+virtual bool
+event() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return false;
+}
+virtual bool
+posedge() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return false;
+}
+virtual bool
+negedge() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return false;
+}
+
+virtual void
+print(std::ostream & =std::cout) const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+virtual void
+dump(std::ostream & =std::cout) const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+virtual const char *kind() const { return "sc_signal"; }
+
+ protected:
+virtual void
+update()
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+
+ private:
+// Disabled
+sc_signal(const sc_signal &) :
+sc_signal_inout_if(), sc_prim_channel("")
+{}
+};
+
+template
+class sc_signal :
+public sc_signal_inout_if, public sc_prim_channel
+{
+ public:
+sc_signal()
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+explicit sc_signal(const char *)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+virtual ~sc_signal()
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+
+virtual void
+register_port(sc_port_base &, const char *)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+
+virtual const sc_dt::sc_logic &
+read() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(const sc_dt::sc_logic *)nullptr;
+}
+operator const sc_dt::sc_logic &() const
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+return *(const sc_dt::sc_logic *)nullptr;
+}
+
+virtual sc_writer_policy
+get_writer_policy() const
+{
+return WRITER_POLICY;
+}
+virtual void
+write(const sc_dt::sc_logic &)
+{
+sc_channel_warn_unimpl(__PRETTY_FUNCTION__);
+}
+sc_signal &
+operator = (const sc_dt::sc_logic &)
+
[gem5-dev] Change in gem5/gem5[master]: systemc: Add a class which encapsulates Fibers.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10848
Change subject: systemc: Add a class which encapsulates Fibers.
..
systemc: Add a class which encapsulates Fibers.
This class encapsulates the idea of a Fiber in such a way that other
implementations can be substituted in in the future. This
implementation uses the ucontext family of functions.
This change also adds a new unit test which exercises the new class. It
creates three new fibers which accept a sequence of other fibers to
switch to, one after the other. The main test function switches to
the these fibers which switch with each other and occasionally back to
the main fiber. Each time a test fiber is activated, it checks against
a list which shows the correct order for the fibers to run in. When the
main fiber gets control, it makes sure that list has been progressed
through by the correct amount.
Change-Id: I5a42c913fa90d3fc07b9684ab30ad811695bc962
---
M src/systemc/core/SConscript
A src/systemc/core/fiber.cc
A src/systemc/core/fiber.hh
A src/systemc/core/fibertest.cc
4 files changed, 331 insertions(+), 0 deletions(-)
diff --git a/src/systemc/core/SConscript b/src/systemc/core/SConscript
index e12ed59..65c00bd 100644
--- a/src/systemc/core/SConscript
+++ b/src/systemc/core/SConscript
@@ -30,6 +30,8 @@
if env['USE_SYSTEMC']:
SimObject('SystemC.py')
+Source('fiber.cc')
+GTest('fibertest', 'fibertest.cc', 'fiber.cc')
Source('kernel.cc')
Source('sc_attr.cc')
diff --git a/src/systemc/core/fiber.cc b/src/systemc/core/fiber.cc
new file mode 100644
index 000..387eae9
--- /dev/null
+++ b/src/systemc/core/fiber.cc
@@ -0,0 +1,143 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/core/fiber.hh"
+
+#include "base/logging.hh"
+
+using namespace std;
+
+namespace SystemC
+{
+
+namespace
+{
+
+/*
+ * The Gem5Fiber class is a special case that attaches to the currently
+ * executing context. That makes handling the "gem5" fiber, aka the one
which
+ * most of gem5 is running under, no different than other Fibers.
+ */
+class Gem5Fiber : public Fiber
+{
+ public:
+Gem5Fiber() : Fiber(0) { started = true; }
+void main() { panic("Gem5Fiber main executed.\n"); }
+};
+
+Gem5Fiber _gem5Fiber;
+
+// A pointer to whatever the currently executing Fiber is.
+Fiber *_currentFiber = &_gem5Fiber;
+
+// A pointer to the Fiber which is currently being started/initialized.
+Fiber *startingFiber = nullptr;
+
+} // anonymous namespace
+
+// A trampoline which calls a Fiber's enterMain() as it starts up.
+void
+Fiber::startingFiberEnterMain()
+{
+startingFiber->enterMain();
+}
+
+Fiber::Fiber(size_t stack_size) :
+stack(stack_size ? new uint8_t[stack_size] : nullptr),
+stackSize(stack_size), started(false), _finished(false)
+{}
+
+Fiber::~Fiber()
+{
+panic_if(stack && _currentFiber == this, "Fiber stack is in use.");
+delete [] stack;
+}
+
+void
+Fiber::startFiber()
+{
+// Set up a context for the new fiber, starting it in the trampoline.
+getcontext();
+ctx.uc_stack.ss_sp = stack;
+ctx.uc_stack.ss_size = stackSize;
+ctx.uc_link = nullptr;
+makecontext(, , 0);
+
+// Swap to the new context so it can enter its enterMain() function. It
+// will then swap itself back out and return here.
+startingFiber = this;
+panic_if(!_currentFiber, "No active
[gem5-dev] Change in gem5/gem5[master]: systemc: Stub out the sc_process_handle class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10836
Change subject: systemc: Stub out the sc_process_handle class.
..
systemc: Stub out the sc_process_handle class.
Change-Id: I2250ccb369e0a5f2b9172d35662a9ce5e41ab1c1
---
M src/systemc/core/SConscript
A src/systemc/core/sc_process_handle.cc
A src/systemc/ext/core/sc_process_handle.hh
3 files changed, 411 insertions(+), 0 deletions(-)
diff --git a/src/systemc/core/SConscript b/src/systemc/core/SConscript
index a94eb00..4cc6b68 100644
--- a/src/systemc/core/SConscript
+++ b/src/systemc/core/SConscript
@@ -41,6 +41,7 @@
Source('sc_module_name.cc')
Source('sc_object.cc')
Source('sc_port.cc')
+Source('sc_process_handle.cc')
Source('sc_prim.cc')
Source('sc_sensitive.cc')
Source('sc_time.cc')
diff --git a/src/systemc/core/sc_process_handle.cc
b/src/systemc/core/sc_process_handle.cc
new file mode 100644
index 000..07a07ad
--- /dev/null
+++ b/src/systemc/core/sc_process_handle.cc
@@ -0,0 +1,281 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "base/logging.hh"
+#include "systemc/ext/core/sc_process_handle.hh"
+
+namespace sc_core
+{
+
+const char *
+sc_unwind_exception::what() const throw()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return "";
+}
+
+bool
+sc_unwind_exception::is_reset() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+sc_unwind_exception::sc_unwind_exception()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_unwind_exception::sc_unwind_exception(const sc_unwind_exception &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_unwind_exception::~sc_unwind_exception() throw()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+sc_process_handle::sc_process_handle()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_process_handle::sc_process_handle(const sc_process_handle &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_process_handle::sc_process_handle(sc_object *)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+sc_process_handle::~sc_process_handle()
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+}
+
+
+bool
+sc_process_handle::valid() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+
+sc_process_handle &
+sc_process_handle::operator = (const sc_process_handle &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return *this;
+}
+
+bool
+sc_process_handle::operator == (const sc_process_handle &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return true;
+}
+
+bool
+sc_process_handle::operator != (const sc_process_handle &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_process_handle::operator < (const sc_process_handle &) const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+bool
+sc_process_handle::swap(sc_process_handle &)
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return false;
+}
+
+
+const char *
+sc_process_handle::name() const
+{
+warn("%s not implemented.\n", __PRETTY_FUNCTION__);
+return "";
+}
+
+sc_curr_proc_kind
+sc_process_handle::proc_kind() const
+{
+warn("%s not
[gem5-dev] Change in gem5/gem5[master]: systemc: Add an opaque pointer to the sc_process_handle class.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10842
Change subject: systemc: Add an opaque pointer to the sc_process_handle
class.
..
systemc: Add an opaque pointer to the sc_process_handle class.
The pointer will point to a class which actually holds the state of a
process. Some code in the data types tries to determine what process
is currently running, and it can't do that because the process handle
returned by the appropriate function is a temporary which lets you
*manipulate* the current process, but not identify it uniquely.
By making this internal pointer extractable, multiple process handles
which refer to the same underlying process can be compared correctly.
While it is possible to compare to sc_process_handle instances using
the overridden == and != operators, the code in question also needs to
represent when it doesn't have a process to refer to which it does
with a null pointer. To the best of my knowledge, there's no
sc_process_handle equivalent to a null pointer.
Change-Id: I2ef212c38216c8aa66e6bbd00f892a1b9a6c2ae7
---
M src/systemc/ext/core/sc_process_handle.hh
1 file changed, 21 insertions(+), 0 deletions(-)
diff --git a/src/systemc/ext/core/sc_process_handle.hh
b/src/systemc/ext/core/sc_process_handle.hh
index ce3fe03..a928ab3 100644
--- a/src/systemc/ext/core/sc_process_handle.hh
+++ b/src/systemc/ext/core/sc_process_handle.hh
@@ -33,6 +33,13 @@
#include
#include
+namespace sc_gem5
+{
+
+class Process;
+
+} // namespace sc_gem5
+
namespace sc_core
{
@@ -67,12 +74,26 @@
class sc_process_handle
{
+ private:
+::sc_gem5::Process *_gem5_process;
+
public:
sc_process_handle();
sc_process_handle(const sc_process_handle &);
explicit sc_process_handle(sc_object *);
~sc_process_handle();
+// These non-standard operators provide access to the data structure
which
+// actually tracks the process within gem5. By making them operators,
we
+// can minimize the symbols added to the class namespace.
+operator ::sc_gem5::Process * () const { return _gem5_process; }
+sc_process_handle &
+operator = (::sc_gem5::Process *p)
+{
+_gem5_process = p;
+return *this;
+}
+
bool valid() const;
sc_process_handle = (const sc_process_handle &);
--
To view, visit https://gem5-review.googlesource.com/10842
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I2ef212c38216c8aa66e6bbd00f892a1b9a6c2ae7
Gerrit-Change-Number: 10842
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: systemc: Add stubbed out versions of sc_port and sc_export.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/10829
Change subject: systemc: Add stubbed out versions of sc_port and sc_export.
..
systemc: Add stubbed out versions of sc_port and sc_export.
Change-Id: I04edb5da995212f9179eeb7a97486031eea71aff
---
M src/systemc/SConscript
A src/systemc/sc_export.cc
A src/systemc/sc_export.hh
A src/systemc/sc_port.cc
A src/systemc/sc_port.hh
5 files changed, 361 insertions(+), 0 deletions(-)
diff --git a/src/systemc/SConscript b/src/systemc/SConscript
index 2a96193..9cc76dc 100644
--- a/src/systemc/SConscript
+++ b/src/systemc/SConscript
@@ -33,8 +33,10 @@
Source('kernel.cc')
Source('sc_event.cc')
+Source('sc_export.cc')
Source('sc_interface.cc')
Source('sc_main.cc')
Source('sc_module_name.cc')
Source('sc_object.cc')
+Source('sc_port.cc')
Source('sc_time.cc')
diff --git a/src/systemc/sc_export.cc b/src/systemc/sc_export.cc
new file mode 100644
index 000..1363f4c
--- /dev/null
+++ b/src/systemc/sc_export.cc
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#include "systemc/sc_export.hh"
+
+#include "base/logging.hh"
+
+namespace sc_core
+{
+
+void
+sc_export_base::warn_unimpl(const char *func)
+{
+warn("%s not implemented.\n", func);
+}
+
+} // namespace sc_core
diff --git a/src/systemc/sc_export.hh b/src/systemc/sc_export.hh
new file mode 100644
index 000..404e6e7
--- /dev/null
+++ b/src/systemc/sc_export.hh
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2018 Google, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ */
+
+#ifndef __SYSTEMC_SC_EXPORT_HH__
+#define __SYSTEMC_SC_EXPORT_HH__
+
+#include "sc_object.hh"
+
+namespace sc_core
+{
+
+class sc_interface;
+
+class sc_export_base : public sc_object
+{
+ public:
+void warn_unimpl(const char *func);
+};
+
+template
+class sc_export : public sc_export_base
+{
+ public:
+
