[gem5-dev] [M] Change in gem5/gem5[develop]: stdlib: add SimPoint checkpoint generator

2022-10-11 Thread Zhantong Qiu (Gerrit)
Zhantong Qiu has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64351?usp=email ) Change subject: stdlib: add SimPoint checkpoint generator .. stdlib: add SimPoint checkpoint

[gem5-dev] [S] Change in gem5/gem5[develop]: tests: Add 'riscvmatched-fs.py' example to long/nightly tests

2022-10-11 Thread Bobby Bruce (Gerrit)
Bobby Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/64131?usp=email ) Change subject: tests: Add 'riscvmatched-fs.py' example to long/nightly tests .. tests: Add

[gem5-dev] [S] Change in gem5/gem5[develop]: mem-ruby: Fix replacement policy in MESI_Two_Level

2022-10-11 Thread Jarvis JIA (Gerrit)
Jarvis JIA has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64371?usp=email ) Change subject: mem-ruby: Fix replacement policy in MESI_Two_Level .. mem-ruby: Fix replacement policy

[gem5-dev] [S] Change in gem5/gem5[develop]: cpu-o3: print VecPredReg not VecReg

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64342?usp=email ) Change subject: cpu-o3: print VecPredReg not VecReg .. cpu-o3: print VecPredReg not VecReg Fix a

[gem5-dev] [M] Change in gem5/gem5[develop]: cpu-o3: Remove obsolete getRegIds and getTrueId

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64332?usp=email ) Change subject: cpu-o3: Remove obsolete getRegIds and getTrueId .. cpu-o3: Remove obsolete

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Add interfaces to set and get SME vector length

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64336?usp=email ) Change subject: arch-arm: Add interfaces to set and get SME vector length .. arch-arm: Add

[gem5-dev] [M] Change in gem5/gem5[develop]: arch,cpu: Add boilerplate support for matrix registers

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64333?usp=email ) Change subject: arch,cpu: Add boilerplate support for matrix registers .. arch,cpu: Add

[gem5-dev] [M] Change in gem5/gem5[develop]: arch-arm: Implement SME access traps and extend the SVE ones

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64337?usp=email ) Change subject: arch-arm: Implement SME access traps and extend the SVE ones .. arch-arm:

[gem5-dev] [S] Change in gem5/gem5[develop]: mem-cache: masked writes are not whole-line writes

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64340?usp=email ) Change subject: mem-cache: masked writes are not whole-line writes .. mem-cache: masked writes are

[gem5-dev] [M] Change in gem5/gem5[develop]: arch, arch-arm, cpu: Add matrix reg support to the ISA Parser

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64338?usp=email ) Change subject: arch, arch-arm, cpu: Add matrix reg support to the ISA Parser .. arch,

[gem5-dev] [L] Change in gem5/gem5[develop]: arch-arm: Add system registers added/used by SME

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64335?usp=email ) Change subject: arch-arm: Add system registers added/used by SME .. arch-arm: Add system registers

[gem5-dev] [S] Change in gem5/gem5[develop]: arch-arm: Set ZCR_ELx before updating vector length in decoder

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64331?usp=email ) Change subject: arch-arm: Set ZCR_ELx before updating vector length in decoder .. arch-arm: Set

[gem5-dev] [S] Change in gem5/gem5[develop]: system-arm: Enable SME in the bootloader

2022-10-11 Thread Sascha Bischoff (Gerrit)
Sascha Bischoff has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64341?usp=email ) Change subject: system-arm: Enable SME in the bootloader .. system-arm: Enable SME in the

[gem5-dev] [S] Change in gem5/gem5[develop]: misc: Suggest usage of ALL instead of NULL in TESTING.md

2022-10-11 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64311?usp=email ) Change subject: misc: Suggest usage of ALL instead of NULL in TESTING.md .. misc: Suggest usage

[gem5-dev] [S] Change in gem5/gem5[develop]: tests: Run ALL unit-tests with the nightly script

2022-10-11 Thread Giacomo Travaglini (Gerrit)
Giacomo Travaglini has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/64312?usp=email ) Change subject: tests: Run ALL unit-tests with the nightly script .. tests: Run ALL unit-tests