Zhantong Qiu has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64351?usp=email )
Change subject: stdlib: add SimPoint checkpoint generator
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stdlib: add SimPoint checkpoint
Bobby Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/64131?usp=email )
Change subject: tests: Add 'riscvmatched-fs.py' example to long/nightly
tests
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tests: Add
Jarvis JIA has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64371?usp=email )
Change subject: mem-ruby: Fix replacement policy in MESI_Two_Level
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mem-ruby: Fix replacement policy
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64342?usp=email )
Change subject: cpu-o3: print VecPredReg not VecReg
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cpu-o3: print VecPredReg not VecReg
Fix a
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64332?usp=email )
Change subject: cpu-o3: Remove obsolete getRegIds and getTrueId
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cpu-o3: Remove obsolete
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64336?usp=email )
Change subject: arch-arm: Add interfaces to set and get SME vector length
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arch-arm: Add
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64333?usp=email )
Change subject: arch,cpu: Add boilerplate support for matrix registers
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arch,cpu: Add
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64337?usp=email )
Change subject: arch-arm: Implement SME access traps and extend the SVE ones
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arch-arm:
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64340?usp=email )
Change subject: mem-cache: masked writes are not whole-line writes
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mem-cache: masked writes are
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64338?usp=email )
Change subject: arch, arch-arm, cpu: Add matrix reg support to the ISA
Parser
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arch,
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64335?usp=email )
Change subject: arch-arm: Add system registers added/used by SME
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arch-arm: Add system registers
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64331?usp=email )
Change subject: arch-arm: Set ZCR_ELx before updating vector length in
decoder
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arch-arm: Set
Sascha Bischoff has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64341?usp=email )
Change subject: system-arm: Enable SME in the bootloader
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system-arm: Enable SME in the
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64311?usp=email )
Change subject: misc: Suggest usage of ALL instead of NULL in TESTING.md
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misc: Suggest usage
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/64312?usp=email )
Change subject: tests: Run ALL unit-tests with the nightly script
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tests: Run ALL unit-tests
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