[m5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2011-04-22 Thread Cron Daemon
* build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer passed. * build/ALPHA_SE_MOESI_hammer/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer passed. *

Re: [m5-dev] Review Request: O3: Tighten memory order violation checking to 16 bytes.

2011-04-22 Thread nathan binkert
Did this ever get committed? I'm running into this bug with 20.parser. Nate On Wed, Mar 30, 2011 at 8:46 AM, Ali Saidi sa...@umich.edu wrote: This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/520/ I think the updated patch addresses all of your

Re: [m5-dev] Review Request: O3: Tighten memory order violation checking to 16 bytes.

2011-04-22 Thread Gabe Black
It looks like this patch was committed, but it didn't have anything to do with the assert. It just happened to change whether or not that assert was hit. I'll take a look at it sometime soon. Gabe On 04/22/11 10:04, nathan binkert wrote: Did this ever get committed? I'm running into this bug

[m5-dev] Review Request: ruby: moved topology to the top network directory

2011-04-22 Thread Brad Beckmann
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/651/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan

[m5-dev] Review Request: garnet: cleaned up flexible netwok header file

2011-04-22 Thread Brad Beckmann
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/652/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan

[m5-dev] Review Request: network: convert links switches to first class C++ SimObjects

2011-04-22 Thread Brad Beckmann
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan

Re: [m5-dev] what scons can do

2011-04-22 Thread Beckmann, Brad
-Original Message- From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of nathan binkert Sent: Thursday, April 21, 2011 5:53 PM To: M5 Developer List Subject: Re: [m5-dev] what scons can do Maybe so... I think there's a subconscious impression that it

[m5-dev] Review Request: Cache: fix vector stats in classic cache to have matching lengths

2011-04-22 Thread Lisa Hsu
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/654/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan

Re: [m5-dev] what scons can do

2011-04-22 Thread nathan binkert
Is that 1%/99% a statement of a clean build for m5.fast?  I think the much more common case is you edit one .cc file and rebuild.  In that situation, it sure seems like a lot more than 1% of the time is spent by scons regenerating and reanalyzing SLICC files. Whatever it may be, it sure

Re: [m5-dev] Review Request: Cache: fix vector stats in classic cache to have matching lengths

2011-04-22 Thread Nathan Binkert
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/654/#review1142 --- src/mem/cache/base.hh http://reviews.m5sim.org/r/654/#comment1564

Re: [m5-dev] Review Request: Cache: fix vector stats in classic cache to have matching lengths

2011-04-22 Thread Lisa Hsu
On 2011-04-22 18:51:32, Nathan Binkert wrote: src/mem/cache/base.hh, line 505 http://reviews.m5sim.org/r/654/diff/1/?file=11759#file11759line505 _numSharingContexts has the + 1 in it for devices. Is that a problem? Seems like you need a parameter to know that. I have a comment

Re: [m5-dev] Review Request: Cache: fix vector stats in classic cache to have matching lengths

2011-04-22 Thread Nathan Binkert
On 2011-04-22 18:51:32, Nathan Binkert wrote: src/mem/cache/base.hh, line 503 http://reviews.m5sim.org/r/654/diff/1/?file=11759#file11759line503 This can pretty easily be done with a template: template class STAT void incThreadVectorStat(PacketPtr pkt, STAT

[m5-dev] changeset in m5: stats: one more name violation

2011-04-22 Thread Nathan Binkert
changeset acf4b902c02e in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=acf4b902c02e description: stats: one more name violation diffstat: src/cpu/o3/lsq_unit_impl.hh | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diffs (12 lines): diff -r 914389024c33 -r

[m5-dev] changeset in m5: stats: ensure that stat names are valid

2011-04-22 Thread Nathan Binkert
changeset d69720504203 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=d69720504203 description: stats: ensure that stat names are valid diffstat: src/base/statistics.cc | 34 ++ 1 files changed, 34 insertions(+), 0 deletions(-) diffs

[m5-dev] changeset in m5: tests: updates for stat name change

2011-04-22 Thread Nathan Binkert
changeset 6e368a935ac0 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=6e368a935ac0 description: tests: updates for stat name change diffstat: tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout | 4 +-