[m5-dev] Undelivered Mail Returned to Sender

2009-02-06 Thread Mail Delivery System
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[m5-dev] changeset in inorder-patches: organize patches

2009-02-06 Thread Nathan Binkert
changeset d33c963656cb in /z/repo/inorder-patches details: inorder-patches?cmd=changeset;node=d33c963656cb description: organize patches diffstat: 10 files changed, 3446 insertions(+), 10152 deletions(-) fix_compile.diff| 94 fix_mdu_latency_bug | 533 ---

[m5-dev] changeset in inorder-patches: Make sure everything compiles just...

2009-02-06 Thread Nathan Binkert
changeset 40721d032036 in /z/repo/inorder-patches details: inorder-patches?cmd=changeset;node=40721d032036 description: Make sure everything compiles just fine diffstat: 2 files changed, 15 insertions(+), 11 deletions(-) import_mixie |4 +--- prepare_cpus.diff | 22

[m5-dev] changeset in inorder-patches: Rename mixie to inorder

2009-02-06 Thread Nathan Binkert
changeset d3fea0b4646c in /z/repo/inorder-patches details: inorder-patches?cmd=changeset;node=d3fea0b4646c description: Rename mixie to inorder diffstat: 3 files changed, 1185 insertions(+), 1185 deletions(-) import_mixie| 2364 +--

[m5-dev] changeset in m5: Quell g++ 4.3 warning about operator ambiguity

2009-02-06 Thread Nathan Binkert
changeset 8c1aa74572e4 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=8c1aa74572e4 description: Quell g++ 4.3 warning about operator ambiguity diffstat: 1 file changed, 1 insertion(+), 1 deletion(-) src/arch/x86/isa/microops/regop.isa |2 +- diffs (12 lines):

[m5-dev] IsReadBarrier instruction flag

2009-02-06 Thread Gabe Black
I notice that we have static inst flags called IsMemBarrier and IsWriteBarrier, but no IsReadBarrier or equivalent. Should we? I need something like that to implement the lfence instruction. Gabe ___ m5-dev mailing list m5-dev@m5sim.org

Re: [m5-dev] IsReadBarrier instruction flag

2009-02-06 Thread nathan binkert
We don't have it because we haven't implemented an ISA that supports it, so I see no reason not to add it. (It's pretty odd to put a fence in for reads and not want writes to be fenced too.) Nate On Fri, Feb 6, 2009 at 9:06 PM, Gabe Black gbl...@eecs.umich.edu wrote: I notice that we

Re: [m5-dev] IsReadBarrier instruction flag

2009-02-06 Thread Gabe Black
Yeah, well, x86 cornered the market on odd. Gabe nathan binkert wrote: We don't have it because we haven't implemented an ISA that supports it, so I see no reason not to add it. (It's pretty odd to put a fence in for reads and not want writes to be fenced too.) Nate On Fri, Feb 6,

[m5-dev] Cron m5t...@zizzer /z/m5/regression/do-regression quick

2009-02-06 Thread Cron Daemon
scons: *** [build/ALPHA_SE/python/m5/defines.py.fo] Error 1 scons: *** [build/ALPHA_FS/python/m5/defines.py.fo] Error 1 scons: *** [build/MIPS_SE/python/m5/defines.py.fo] Error 1 scons: *** [build/SPARC_SE/python/m5/defines.py.fo] Error 1 scons: *** [build/X86_SE/python/m5/defines.py.fo] Error 1