[gem5-users] Re: gem5-users mailing list

Discussion on Jira: https://gem5.atlassian.net/browse/GEM5-625 -- Dr. Bobby R. Bruce Room 2235, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net gem5 Virtual Workshop open for registration!! [Free to join, June 3rd -- 4th] On Fri,

[gem5-users] Re: [SE Multicore Ruby] Assertion failed for multicore simulation

Hi Jason, Thank you for reply me. I am trying to run a program which mainly map "/dev/shm" and do some read write on it. It works without gem5 but crash in gem5. “ ./build/X86/gem5.opt configs/example/se.py -c "/home/ubuntu/taiyu/whisper_se/nstore/src/nstore" -o "-x1 -k1000 -w -p0.2 -e1

[gem5-users] a problem about memory access latency of HMC

I'm using HMC as my memory in my system. And I found a problem that once a simobject sent a read request, the latency of the response was different. I print out the DRAM trace. 1. if a read request is processed by dramctrl as follow, the latency is longer. 377334000: system.hmc_dev.mem_ctrls00:

[gem5-users] Regarding RISCV's Compressed conditional branching instructions

In RISCV, when the condition of the conditional compressed branching instruction is false, it's incrementing the PC value by 4 rather than 2. Has anyone faced this issue with RISCV ISA? If yes, how to go about it? --

[gem5-users] Re: a problem about memory access latency of HMC

Hello, This is a good question for which I don't have a simple answer. I think we would need more context in the access stream/debug trace. I also suggest digging into the code to see what happens when the line "Single request, going to a busy rank" is printed. The code around that DPRINTF will

[gem5-users] Re: [SE Multicore Ruby] Assertion failed for multicore simulation

Hi Taiyu, Can you give us more details on what you are running so we can reproduce this issue? It could be as simple as the path to the binary is wrong :). However, it's hard to tell with just the error message. Cheers, Jason On Thu, Jun 4, 2020 at 10:38 PM Taiyu Zhou via gem5-users <

[gem5-users] Re: a problem about memory access latency of HMC

Jason, Thanks a lot for your answer. I use following code to send a read request to HMC in my own simObject. Request::Flags flags = 0; RequestPtr req = make_shared(regs[toProc].first, 8, flags, 0 ); PacketPtr pkt = new Packet(req, MemCmd::PIMRead); uint8_t* empty = new uint8_t[8];

[gem5-users] Re: a problem about memory access latency of HMC

Hi, Yes, more info would be helpful. I would specifically look for log messages regarding refresh and self-refresh operations. Those are some conditions that would put the controller / memory in a busy state. The READ command would be delayed until either the refresh completes or a

[gem5-users] Suggestion required for additonal structure for metadata

I am used Gem5 for multithreaded program execution with a two-level cache hierarchy. I need to store metadata at L1 cache and LLC. What will be a good approach: 1. To create a sim object directly in Gem5 and use it in the coherence protocol. OR 2. To define the structure in the SLICC state machine

[gem5-users] Re: Regarding RISCV's Compressed conditional branching instructions

Hi Anuj, Does this result in incorrect execution? Could you give us a full example of where this happens so we can reproduce it? Thanks, Jason On Fri, Jun 5, 2020 at 8:07 AM Anuj Falcon via gem5-users < gem5-users@gem5.org> wrote: > In RISCV, when the condition of the conditional compressed

[gem5-users] Re: Suggestion required for additonal structure for metadata

Hi Vipin, It depends. If modeling the coherence and interconnection network is important to your results, then SLICC/Ruby/Garnet is probably the way to go. If you're focusing on some other aspect of the system, then making minor modifications to the Cache object and adding a new SimObject for

[gem5-users] Re: [SE Multicore Ruby] Assertion failed for multicore simulation

Hi Taiyu, Jason, As far as I could go through it I end up thinking that something is crashing during a syscall: The crash is related to unfound input files of the benchmark/application you are running over the 'se'. Therefore, what I did is to double check the input/output data files the

[gem5-users] gem5-users mailing list

Hi, Is there a problem with the mailing service? I do not get all the mails like before. I only get emails when someone replies to the question Currently, I have unsubscribed and subscribed to the list Also, I have already checked my spam but I miss all the first emails For example the email