In this case, I would use the resource stalls to model banking. You can
extend the BankedCache implementation to model arbitrary address
interleaving, if that's important to your model. To do this, you'll have to
add annotations to the transitions in the L0 and L1 cache, but this should
be easier t
with ARM
On 10/22/2020 00:23, chy wrote:
HELP ! I intend to use gem5's **FS** mode to test SMT performance in my
research project. Specifically, I modified the create() function of deriv.cc,
I changed actual_num_threads=1 to actual_num_threads=numThreads, and deleted
the assert (this
HELP ! I intend to use gem5's **FS** mode to test SMT performance in my
research project. Specifically, I modified the create() function of deriv.cc,
I changed actual_num_threads=1 to actual_num_threads=numThreads, and deleted
the assert (this->numThreads==1) of the constructor in cpu.c
Hello Jason:
I want to configure L0 and L1 as Multi-Banking (Interleaving) Caches ,
considering L0 and L1 are private, so I have two questions:
(1). If L0 and L1 are configured as multiple banks, do I need to connect L0 to
the ruby network?
(2). To configure multiple banks, should I need to a
Hello Jason:
Thank you very much, thank you for your help.
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
Honestly, I'm not sure. I would need to dig much deeper into the
MESI_Three_Level protocol to be able to help.
Jason
On Tue, Oct 20, 2020 at 9:06 PM 1154063264--- via gem5-users <
gem5-users@gem5.org> wrote:
> In MOESI_hammer, the state transition in the I state is defined as follows,
>
> transi
Hi all,
I am running full system simulation with MESI_Three_Level protocol.
The protocol (maybe other protocol also) provides transition count for each
state and possible events in stats file. For example, STATE.EVENT tells how
many state transition occured from STATE receiving EVENT. Also, the st
