Re: [gem5-users] Getting CPU id

2020-01-22 Thread Richard Brown
memory requests, i need this for filter the blocks. Thanks in advance. Regards On Wed, Jan 22, 2020 at 4:39 PM Richard Brown wrote: > Hello everyone, > > I am working on cache filtering. So in an architecture with several cores > each of them with its private caches (L1 and L2) and one

[gem5-users] Getting CPU id

2020-01-22 Thread Richard Brown
Hello everyone, I am working on cache filtering. So in an architecture with several cores each of them with its private caches (L1 and L2) and one shared LLC (L3), I need to identify the core from which a block that will be stored in L3 comes. I thought that using the method pkt->req->taskId() I

Re: [gem5-users] Snoop filter panic when bypassing blocks to MM

2019-09-23 Thread Richard Brown
Hi everyone, I am getting similar issues with my implementation. I am getting a panic error when I bypass a block from private level to main memory, I also asumed a block is written to public level only from private level victimizing and does not from main memory filling. Any suggestion? Thanks

[gem5-users] Bypassing blocks to LLC

2019-05-02 Thread Richard Brown
Hello everyone, I am PhD student and new with gem5, I have a multicore system with 2 private cache levels (DL1, IL1 and L2) and 1 shared L3/LLC. I am using classic memory system, I know this model is non-inclusive, non-exclusive. For my research I need to bypass some blocks from L3, I mean when

[gem5-users] Memory models possibilities

2018-05-29 Thread Richard Brown
Hello everyone, I have been reading several posts in this forum and the gem5 documentation, I am new with gem5, I have to work with memory subsystem and I have already changed characteristics on main memory and cache memory as train. However I have some questions that I have not answered reading