Re: ASMA034E

2018-11-16 Thread Seymour J Metz
From: IBM Mainframe Discussion List on behalf of Charles Mills Sent: Thursday, November 15, 2018 11:33 AM To: IBM-MAIN@listserv.ua.edu Subject: Re: ASMA034E @Greg is right -- Jump is not a big learning curve with lots of gotchas (unlike say 64-bit or AR

Re: ASMA034E

2018-11-16 Thread Binyamin Dissen
On Fri, 16 Nov 2018 08:17:32 -0500 Peter Relson wrote: :> :>So where you have a problem with what is generated, turn off IEABRCX. :> :>Just curious: do you have an example where IEABRCX resulted in the wrong :>thing? I would guess an assembly error when the target address is not in the

Re: ASMA034E

2018-11-16 Thread Peter Relson
So where you have a problem with what is generated, turn off IEABRCX. Just curious: do you have an example where IEABRCX resulted in the wrong thing? We tend to use IEABRC/IEABRCX to cover macro invocations, but also do change our own branches to relative branches (as pointed out, this is

Re: ASMA034E

2018-11-15 Thread Paul Gilmartin
On Thu, 15 Nov 2018 22:22:31 -0500, Gord Tomlin wrote: >On 2018-11-15 16:43, Tom Marchant wrote: >> I believe that you can have a relative branch to a symbol in another >> CSECT that is resolved at binder time. > >Yes, if you include GOFF in your HLASM parameters. You will find that >when you

Re: ASMA034E

2018-11-15 Thread Gord Tomlin
On 2018-11-15 16:43, Tom Marchant wrote: I believe that you can have a relative branch to a symbol in another CSECT that is resolved at binder time. Yes, if you include GOFF in your HLASM parameters. You will find that when you specify GOFF, you will also need LIST(133) . -- Regards, Gord

Re: ASMA034E

2018-11-15 Thread Charles Mills
Just habit. Just what I do. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Steve Smith Sent: Thursday, November 15, 2018 3:34 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E A nitpick, but why would you change

Re: ASMA034E

2018-11-15 Thread Charles Mills
AFAIK. Did you try? Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Paul Gilmartin Sent: Thursday, November 15, 2018 3:23 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E On Thu, 15 Nov 2018 15:43:12 -0600, Tom

Re: ASMA034E

2018-11-15 Thread Steve Smith
A nitpick, but why would you change everything to Jxx except BAL/BAS? JAS would be more consistent. IEABRC is pretty clever, but I've found it pretty quick to just rename all the B* to J* and clean up the exceptions. However, in my recent environment, virtually no branches of any kind were

Re: ASMA034E

2018-11-15 Thread Paul Gilmartin
On Thu, 15 Nov 2018 15:43:12 -0600, Tom Marchant wrote: > >>If the programmer is so rash as to define an ENTRY point with an odd >>address, Bad Things can happen. > >I don't think that HLASM will allow you to do that. > How about: FRED CSECT DCC'A' JOE DCC'Data only; not

Re: ASMA034E

2018-11-15 Thread Charles Mills
ERV.UA.EDU Subject: Re: ASMA034E On Thu, 15 Nov 2018 13:21:01 -0600, Paul Gilmartin wrote: >On Thu, 15 Nov 2018 12:38:05 -0600, Tom Marchant wrote: > >>On Thu, 15 Nov 2018 08:33:55 -0800, Charles Mills wrote: >> >>>LARL is also very cool. It is like LA without a

Re: ASMA034E

2018-11-15 Thread Tom Marchant
On Thu, 15 Nov 2018 13:21:01 -0600, Paul Gilmartin wrote: >On Thu, 15 Nov 2018 12:38:05 -0600, Tom Marchant wrote: > >>On Thu, 15 Nov 2018 08:33:55 -0800, Charles Mills wrote: >> >>>LARL is also very cool. It is like LA without a base register. >> >>Agreed. One thing to be aware of with LARL. It

Re: ASMA034E

2018-11-15 Thread Paul Gilmartin
On Thu, 15 Nov 2018 12:38:05 -0600, Tom Marchant wrote: >On Thu, 15 Nov 2018 08:33:55 -0800, Charles Mills wrote: > >>LARL is also very cool. It is like LA without a base register. > >Agreed. One thing to be aware of with LARL. It uses a signed >halfword that is added to the current PSW address.

Re: ASMA034E

2018-11-15 Thread Tom Marchant
On Thu, 15 Nov 2018 08:33:55 -0800, Charles Mills wrote: >LARL is also very cool. It is like LA without a base register. Agreed. One thing to be aware of with LARL. It uses a signed halfword that is added to the current PSW address. As a result it cannot be used to get the address of an odd

Re: ASMA034E

2018-11-15 Thread Steve Thompson
Behalf Of Greg Price > Sent: Thursday, November 15, 2018 7:18 AM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: ASMA034E > >> On 2018-11-16 1:47 AM, Ward Able, Grant wrote: >> Can someone point me to a reasonably simple example? > > If you can do branch instructions t

Re: ASMA034E

2018-11-15 Thread Ward Able, Grant
Thanks a lot Greg. I am sure to have fun with that! Regards – Grant DTCC Internal (Green) -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Greg Price Sent: 15 November 2018 15:18 To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E

Re: ASMA034E

2018-11-15 Thread Pew, Curtis G
On Nov 15, 2018, at 10:33 AM, Charles Mills wrote: > > I am personally not fond of IEABRCX. The whole point of assembler is tight > control of the generated machine code; not compiler magic. It is not hard at > all to do CHG B J PREFIX and work through them one at a time either accepting >

Re: ASMA034E

2018-11-15 Thread Charles Mills
: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Tom Marchant Sent: Thursday, November 15, 2018 8:28 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E On Fri, 16 Nov 2018 02:17:47 +1100, Greg Price wrote: >On 2018-11-16 1:47 AM, Ward Able, Grant wrote: >

Re: ASMA034E

2018-11-15 Thread Charles Mills
for different folks. Charles -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Greg Price Sent: Thursday, November 15, 2018 7:18 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E On 2018-11-16 1:47 AM, Ward Able, Grant wrote: >

Re: ASMA034E

2018-11-15 Thread Tom Marchant
On Fri, 16 Nov 2018 02:17:47 +1100, Greg Price wrote: >On 2018-11-16 1:47 AM, Ward Able, Grant wrote: >> Can someone point me to a reasonably simple example? > >If you can do branch instructions then you can do branch-relative >instructions. Apart from RR instructions (BR, BASR, BALR, BASSM, BSM,

Re: ASMA034E

2018-11-15 Thread Greg Price
On 2018-11-16 1:47 AM, Ward Able, Grant wrote: Can someone point me to a reasonably simple example? If you can do branch instructions then you can do branch-relative instructions. Apart from RR instructions (BR, BASR, BALR, BASSM, BSM, BAKR and any others I've missed) replace the B that

Re: ASMA034E

2018-11-15 Thread Ward Able, Grant
I have been following the ASMA034E discussion and am interested in learning how to do the new-fangled relative branching stuff. Can someone point me to a reasonably simple example? I learned my Assembler in the 80's and have been using that way of coding ever since. I think it is time

Re: ASMA034E

2018-11-15 Thread Charles Mills
ssion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Peter Relson Sent: Thursday, November 15, 2018 4:45 AM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E A more modern (over 20 years old by now?) would suggest not having a USING for your "code" at all, but rather using rela

Re: ASMA034E

2018-11-15 Thread Pew, Curtis G
On Nov 15, 2018, at 6:44 AM, Peter Relson wrote: > > A more modern (over 20 years old by now?) would suggest not having a USING > for your "code" at all, but rather using relative branch with one register > set up to point to your static data and a USING for that. It is relatively >

Re: ASMA034E

2018-11-15 Thread Peter Relson
A more modern (over 20 years old by now?) would suggest not having a USING for your "code" at all, but rather using relative branch with one register set up to point to your static data and a USING for that. It is relatively infrequent that your static data would exceed 4K, and even if it did

Re: ASMA034E

2018-11-14 Thread Steely.Mark
Thank You - those worked. -Original Message- From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Cieri, Anthony Sent: Wednesday, November 14, 2018 4:34 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: Re: ASMA034E There is a sample z/OS FTP client user

Re: ASMA034E

2018-11-14 Thread Cieri, Anthony
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of Steely.Mark Sent: Wednesday, November 14, 2018 4:50 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: ASMA034E The assembler program I am working on is receiving several of these messages: ASMA034E Operand =X' bey

Re: ASMA034E

2018-11-14 Thread Binyamin Dissen
I believe it would be more educational for you to show what you tried. On Wed, 14 Nov 2018 21:50:16 + "Steely.Mark" wrote: :>The assembler program I am working on is receiving several of these messages: :> :>ASMA034E Operand =X' beyond active USING range by 148 b

Re: ASMA034E

2018-11-14 Thread Farley, Peter x23353
4:50 PM To: IBM-MAIN@LISTSERV.UA.EDU Subject: ASMA034E EXTERNAL EMAIL The assembler program I am working on is receiving several of these messages: ASMA034E Operand =X' beyond active USING range by 148 bytes I have tried all the examples to add a second register to the USING statement

ASMA034E

2018-11-14 Thread Steely.Mark
The assembler program I am working on is receiving several of these messages: ASMA034E Operand =X' beyond active USING range by 148 bytes I have tried all the examples to add a second register to the USING statement. When the program executes it gets a S0C1. Currently I have a macro call