Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Do not retrain new links

On Wed, 2018-07-18 at 13:31 -0700, Manasi Navare wrote: > On Wed, Jul 18, 2018 at 01:34:12PM -0700, Dhinakaran Pandiyan wrote: > > > > On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote: > > > > > > On Wed, Jul 18, 2018 at 10:19:42AM -0700

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Do not retrain new links

On Wed, 2018-07-18 at 10:45 -0700, Manasi Navare wrote: > On Wed, Jul 18, 2018 at 10:19:42AM -0700, Dhinakaran Pandiyan wrote: > > > > The short pulse handler checks if channel equalization is okay and > > goes onto retrain a link if there are active MST links. This > >

Re: [Intel-gfx] [PATCH] drm/i915: Kill sink_crc for good

On Thu, 2018-07-05 at 14:25 -0700, Rodrigo Vivi wrote: > On Thu, Jul 05, 2018 at 02:11:45PM -0700, Dhinakaran Pandiyan wrote: > > > > On Thursday, July 5, 2018 12:25:28 PM PDT Rodrigo Vivi wrote: > > > > > > It was originally introduced following the VES

[Intel-gfx] [PATCH v2 1/2] drm/i915/mst: Do not retrain new links

Cc: Rodrigo Vivi Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index b45b08420c1f..2d61ff01cf51 100644 --- a/drivers/gpu/drm/i

[Intel-gfx] [PATCH v2 2/2] drm/i915/mst: Continue state updates even if AUX writes fail.

ned-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_dp_mst.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 7e3e01607643..110e7ff22ef7 100644 --- a/drivers/gpu/drm/i915/intel_dp_ms

[Intel-gfx] [PATCH] drm/i915/mst: Continue state updates even if AUX writes fail.

We are too late in the enabling sequence to back out cleanly, not updating state tracking variables, like intel_dp->active_mst_links in this instance, results in incorrect behaviour further along. Cc: Ville Syrjälä Cc: Rodrigo Vivi Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Give up link training clock recovery after 10 failed attempts

On Tue, 2018-07-17 at 18:05 -0700, Nathan Ciobanu wrote: > On Tue, Jul 17, 2018 at 03:21:17PM -0700, Dhinakaran Pandiyan wrote: > > > > On Mon, 2018-07-16 at 16:51 -0700, Marc Herbert wrote: > > > > > > > > > > > > > > > > > &

[Intel-gfx] [PATCH] drm/i915/mst: Do not retrain new links

ned-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_dp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index b45b08420c1f..2d61ff01cf51 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/

Re: [Intel-gfx] [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

On Tue, 2018-07-17 at 15:34 -0700, Dhinakaran Pandiyan wrote: > On Tue, 2018-07-17 at 14:49 -0700, matthew.s.atw...@intel.com wrote: > > > > From: Matt Atwood > > > > According to DP spec (2.9.3.1 of DP 1.4) if > > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

Re: [Intel-gfx] [PATCH 2/2] drm/i915: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

On Tue, 2018-07-17 at 14:49 -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > According to DP spec (2.9.3.1 of DP 1.4) if > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in > DPCD > 02200h through 0220Fh shall contain the DPRX's true capability. These > values wil

Re: [Intel-gfx] [PATCH v3] drm/i915/dp: Give up link training clock recovery after 10 failed attempts

On Mon, 2018-07-16 at 16:51 -0700, Marc Herbert wrote: > > > > > > > > I think the bug is with this infinite loop which is at the mercy > > > of an external device > > > and in my case I have this MST hub which appears to be DP 1.2 > > > that triggers the > > > infinite loop case. We have to limi

Re: [Intel-gfx] [PATCH] drm/i915/dp: Give up link training clock recovery after 10 failed attempts

On Fri, 2018-07-13 at 14:22 -0700, Rodrigo Vivi wrote: > On Fri, Jul 13, 2018 at 10:32:15AM -0700, Nathan Ciobanu wrote: > > > > Limit the link training clock recovery loop to 10 failed attempts > > at > > LANEx_CR_DONE per DP 1.4 spec. > Where exactly in the spec? > > > > > Some USB-C MST hubs

Re: [Intel-gfx] [PATCH v5] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Wed, 2018-07-11 at 22:33 -0700, Tarun Vyas wrote: > In commit "drm/i915: Wait for PSR exit before checking for vblank > evasion", the idea was to limit the PSR IDLE checks when PSR is > actually supported. While CAN_PSR does do that check, it doesn't > applies on a per-crtc basis. crtc_state->ha

Re: [Intel-gfx] [PATCH] drm/i915/psr: Split sink status into a separate debugfs node

On Thu, 2018-07-12 at 16:26 -0700, Rodrigo Vivi wrote: > On Wed, Jul 04, 2018 at 05:31:21PM -0700, Dhinakaran Pandiyan wrote: > > > > This allows to read i915_edp_psr_status from tests without > > triggering > > any AUX communication. Take this opportunity to mo

Re: [Intel-gfx] [PATCH] drm/i915/psr: Remove few mod parameters option.

On Wed, 2018-07-11 at 23:17 -0700, Rodrigo Vivi wrote: > On Wed, Jul 11, 2018 at 11:08:17PM -0700, Dhinakaran Pandiyan wrote: > > > > On Wed, 2018-07-11 at 22:27 -0700, Rodrigo Vivi wrote: > > > > > > Reduce the module parameter to enable or disable. > >

Re: [Intel-gfx] [PATCH] drm/i915/psr: Remove few mod parameters option.

r SET_POWER_CAPABLE > bit at PSR init time.")' > > So, let's remove these options for now. End goal is to > fully remove the mod param, moving it to a debugfs > interface in upcoming patches. Sounds like a good idea, but I have not had use for this module parameter anywa

Re: [Intel-gfx] [PATCH v4] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

being updated is driving it or not". With the commit message altered, feel free to add Reviewed-by: Dhinakaran Pandiyan > > Fixes: a608987970b9 ("drm/i915: Wait for PSR exit before checking for > vblank evasion") > > v2: Remove unnecessary parantheses, make che

Re: [Intel-gfx] [PATCH v3] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Mon, 2018-07-09 at 14:28 -0700, Tarun Vyas wrote: > In commit "drm/i915: Wait for PSR exit before checking for vblank > evasion", the idea was to limit the PSR IDLE checks when PSR is > actually supported. While CAN_PSR does do that check, it doesn't > applies on a per-crtc basis. crtc_state->ha

Re: [Intel-gfx] [PATCH v2] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Mon, 2018-07-09 at 12:52 -0700, Tarun Vyas wrote: > On Mon, Jul 09, 2018 at 11:58:52AM -0700, Dhinakaran Pandiyan wrote: > > > > On Mon, 2018-07-09 at 11:16 -0700, Tarun Vyas wrote: > > > > > > On Mon, Jul 09, 2018 at 11:30:00AM -0700

Re: [Intel-gfx] [PATCH v2] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Mon, 2018-07-09 at 12:24 -0700, Rodrigo Vivi wrote: > On Mon, Jul 09, 2018 at 11:30:00AM -0700, Dhinakaran Pandiyan wrote: > > > > On Sun, 2018-07-08 at 18:46 -0700, Tarun Vyas wrote: > > > > > > In commit "drm/i915: Wait for PSR exit before checking for

Re: [Intel-gfx] [PATCH v2] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Mon, 2018-07-09 at 11:16 -0700, Tarun Vyas wrote: > On Mon, Jul 09, 2018 at 11:30:00AM -0700, Dhinakaran Pandiyan wrote: > > > > On Sun, 2018-07-08 at 18:46 -0700, Tarun Vyas wrote: > > > > > > In commit "drm/i915: Wait for PSR exit before checking for

Re: [Intel-gfx] [PATCH v2] drm/i915: Use crtc_state->has_psr instead of CAN_PSR for pipe update

On Sun, 2018-07-08 at 18:46 -0700, Tarun Vyas wrote: > In commit "drm/i915: Wait for PSR exit before checking for vblank > evasion", the idea was to limit the PSR IDLE checks when PSR is > actually supported. While CAN_PSR does do that check, it doesn't > applies on a per-crtc basis. crtc_state->ha

Re: [Intel-gfx] [PATCH] drm/i915/psr: Split sink status into a separate debugfs node

On Thursday, July 5, 2018 2:04:18 PM PDT Rodrigo Vivi wrote: > On Wed, Jul 04, 2018 at 05:31:21PM -0700, Dhinakaran Pandiyan wrote: > > This allows to read i915_edp_psr_status from tests without triggering > > any AUX communication. Take this opportunity to move this under the >

Re: [Intel-gfx] [PATCH] drm/i915: Kill sink_crc for good

ktape all these different > issues I believe it is now time to move PSR to a more reliable validation. > Maybe not a perfect one as we dreamed for this sink_crc, but at least more > reliable. > Good riddance. Reviewed-by: Dhinakaran Pandiyan > Cc: Dhinakaran Pandiya

[Intel-gfx] [PATCH] drm/i915/psr: Split sink status into a separate debugfs node

: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/i915_debugfs.c | 69 + 1 file changed, 39 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index f6142d78ede4..5069d5dedafe 100644 --- a/drivers/gpu/drm

Re: [Intel-gfx] [PATCH v8 2/2] drm/i915: Wait for PSR exit before checking for vblank evasion

On Fri, 2018-06-29 at 16:26 -0700, Dhinakaran Pandiyan wrote: > On Wed, 2018-06-27 at 13:02 -0700, Tarun Vyas wrote: > > > > The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, > > then > > the pipe_update_start call schedules itself out to check back

Re: [Intel-gfx] [PATCH] drm/i915/psr: Add psr1 live status

the title before the colon.(DK) > Rebase. (Jani) > v7: Use tabs for indenting the values.(Jani) > v8: Addressed dk's review comments. > > Cc: Rodrigo Vivi > Cc: Dhinakaran Pandiyan > > Reviewed-by: Dhinakaran Pandiyan > Signed-off-by: Vathsal

Re: [Intel-gfx] [PATCH] drm/i915: Remove unecessary check for unsupported modifiers for NV12

On Thu, 2018-06-28 at 11:36 -0700, Dhinakaran Pandiyan wrote: > On Thu, 2018-06-28 at 08:48 +0200, Daniel Vetter wrote: > > > > On Wed, Jun 27, 2018 at 11:18:54PM -0700, Dhinakaran Pandiyan > > wrote: > > > > > > > > > There is alread

[Intel-gfx] [PATCH] drm/i915/psr: Prevent DC5/6 entry when reading pipe CRCs

or unavailable with PSR irrespective of DMC, but let's start with this. References: https://bugs.freedesktop.org/show_bug.cgi?id=106103 References: https://bugs.freedesktop.org/show_bug.cgi?id=105750 Cc: Imre Deak Cc: Paulo Zanoni Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/

Re: [Intel-gfx] [PATCH v8 2/2] drm/i915: Wait for PSR exit before checking for vblank evasion

ven't > fully exited PSR, then checking for vblank evasion isn't actually > applicable. > > v4: Comment explaining psr_wait after enabling VBL interrupts (DK) > > v5: CAN_PSR() to handle platforms that don't support PSR. > > v6: Handle local_irq_disable o

Re: [Intel-gfx] [PATCH] drm/i915: Remove unecessary check for unsupported modifiers for NV12

On Thu, 2018-06-28 at 08:48 +0200, Daniel Vetter wrote: > On Wed, Jun 27, 2018 at 11:18:54PM -0700, Dhinakaran Pandiyan wrote: > > > > There is already a check to allow only RGB formats with CCS > > modifiers. > > > > Signed-off-by: Dhinakaran Pandi

[Intel-gfx] [PATCH] drm/i915: Remove unecessary check for unsupported modifiers for NV12

There is already a check to allow only RGB formats with CCS modifiers. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_display.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index

Re: [Intel-gfx] [PATCH v7 1/5] drm/i915/psr: Remove intel_crtc_state parameter from disable_source()

On Tue, 2018-06-26 at 13:16 -0700, José Roberto de Souza wrote: > It was only used in VLV/CHV so after the removal of the PSR support > for those platforms it is not necessary any more. > > v7: Rebased > Pushed this to -dinq, thanks for your patience. > Reviewed-by: Dhinaka

Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.

On Tue, 2018-06-26 at 08:50 -0700, Rodrigo Vivi wrote: > On Tue, Jun 26, 2018 at 02:05:22AM -0700, Dhinakaran Pandiyan wrote: > > > > Depending whether PSR1 or PSR2 was configured, we print a warning > > if the > > corresponding control mmio indicated PSR was erroneousl

Re: [Intel-gfx] [PATCH v6 1/2] drm/i915/psr: Lockless version of psr_wait_for_idle

On Tue, 2018-06-26 at 10:26 +0200, Daniel Vetter wrote: > On Mon, Jun 25, 2018 at 10:57:23PM -0700, Tarun Vyas wrote: > > > > This is a lockless version of the exisiting psr_wait_for_idle(). > > We want to wait for PSR to idle out inside intel_pipe_update_start. > > At the time of a pipe update, w

[Intel-gfx] [PATCH v2 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.

. v2: Read PSR2 control register only on supported platforms (Rodrigo) Cc: Rodrigo Vivi Cc: Chris Wilson Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gp

Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.

On Mon, 2018-06-25 at 17:09 -0700, Rodrigo Vivi wrote: > On Sun, Jun 24, 2018 at 10:47:41PM -0700, Dhinakaran Pandiyan wrote: > > > > Depending whether PSR1 or PSR2 was configured, we print a warning > > if the > > corresponding control mmio indicated PSR was erroneousl

Re: [Intel-gfx] [PATCH 10/14] drm/i915: Populate possible_crtcs correctly

On Mon, 2018-06-25 at 14:10 +0300, Ville Syrjälä wrote: > On Thu, Jun 21, 2018 at 06:26:04PM -0700, Dhinakaran Pandiyan wrote: > > > > On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote: > > > > > > From: Ville Syrjälä > > > > > >

Re: [Intel-gfx] [PATCH] drm/i915/psr: Fix race in intel_psr_work()

On Sun, 2018-06-24 at 09:54 +0100, Chris Wilson wrote: > Quoting Dhinakaran Pandiyan (2018-06-23 05:45:06) > > > > commit 5422b37c907e ("drm/i915/psr: Kill delays when activating psr > > back.") switched from delayed work to the plain variant and while > &

[Intel-gfx] [PATCH 2/2] drm/i915/psr: Warn for erroneous enabling of both PSR1 and PSR2.

. Cc: Chris Wilson Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 7aa324f0d1f7..970b8ced46a3 100644 --- a/drivers/gpu/drm

[Intel-gfx] [PATCH 1/2] drm/i915/psr: Fix race in intel_psr_work()

948 Cc: Rodrigo Vivi Cc: Chris Wilson Cc: José Roberto de Souza Signed-off-by: Dhinakaran Pandiyan Reviewed-by: Chris Wilson --- drivers/gpu/drm/i915/intel_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i9

[Intel-gfx] [PATCH] drm/i915/psr: Fix race in intel_psr_work()

patch sort of defeats the point of the WARN_ON()s in psr_activate() now, do we still need them? Cc: Rodrigo Vivi Cc: Chris Wilson Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/int

Re: [Intel-gfx] [PATCH] drm/i915/psr: Add psr1 live status

the title before the colon.(DK) > Rebase. (Jani) > v7: use tabs for indenting the values.(Jani) This made me go through the patch again, I'm afraid I see more formatting (mostly) issues. Sorry for not noticing earlier. > Cc: Rodrigo Vivi > Cc: Dhinakaran Pandiyan >

Re: [Intel-gfx] [PATCH v3] drm/i915: Wait for PSR exit before checking for vblank evasion

On Thu, 2018-06-21 at 18:03 -0700, Tarun Vyas wrote: > The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then > the pipe_update_start call schedules itself out to check back later. > > On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but > lags w.r.t core kernel cod

Re: [Intel-gfx] [PATCH] drm/i915/psr: Lockless version of psr_wait_for_idle

On Thu, 2018-06-21 at 18:03 -0700, Tarun Vyas wrote: > This is a lockless version of the exisiting psr_wait_for_idle(). > We want to wait for PSR to idle out inside intel_pipe_update_start. > At the time of a pipe update, we should never race with any psr > enable or disable code, which is a part o

Re: [Intel-gfx] [PATCH 10/14] drm/i915: Populate possible_crtcs correctly

On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Don't advertize non-exisiting crtcs in the encoder possible_crtcs > bitmask. > How do we end up advertising non-existing CRTCs? encoder->crtc_mask seems to be populated in the encoder init functions based on possib

Re: [Intel-gfx] [PATCH 11/14] drm/i915: Fix DP-MST crtc_mask

On Fri, 2018-06-15 at 21:43 +0300, Ville Syrjälä wrote: > On Fri, Jun 15, 2018 at 11:33:01AM -0700, Dhinakaran Pandiyan wrote: > > > > On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote: > > > > > > From: Ville Syrjälä > > > > > > Each f

Re: [Intel-gfx] [PATCH v3] drm/i915/ddi: Get AUX power domain for DP main link too

On Thu, 2018-06-21 at 22:54 +0300, Imre Deak wrote: > On Thu, Jun 21, 2018 at 01:14:30PM -0700, Dhinakaran Pandiyan wrote: > > > > On Thu, 2018-06-21 at 21:44 +0300, Imre Deak wrote: > > > > > > So far we got an AUX power domain reference only for the dur

Re: [Intel-gfx] [PATCH v3] drm/i915/ddi: Get AUX power domain for DP main link too

; v3: (Ville) > - Fix comment about logic for encoders without a crtc state and >   add FIXME note for a simplification to avoid calling > get_power_domains >   in such cases. > - Use intel_crtc_has_dp_encoder() instead !intel_crtc_has_type(HDMI). > > Cc: Ville Syrjälä > Cc: Dhinakaran Pa

Re: [Intel-gfx] [PATCH v2] drm/i915: remove check for aux irq

On Thu, 2018-06-21 at 10:04 -0700, Lucas De Marchi wrote: > On Tue, Jun 19, 2018 at 01:17:10PM -0700, Dhinakaran Pandiyan wrote: > > > > On Tue, 2018-06-19 at 08:24 -0700, Lucas De Marchi wrote: > > > > > > On Tue, Jun 19, 2018 at 7

Re: [Intel-gfx] [PATCH] drm/i915/psr: Fix warning in intel_psr_activate()

On Mon, 2018-06-18 at 15:27 -0700, Rodrigo Vivi wrote: > On Mon, Jun 18, 2018 at 03:02:07PM -0700, Dhinakaran Pandiyan wrote: > > > > commit 5422b37c907e ("drm/i915/psr: Kill delays when activating psr > > back.") removed the call to cancel a scheduled psr_work fro

Re: [Intel-gfx] [PATCH v2] drm/i915: Wait for PSR exit before checking for vblank evasion

On Tue, 2018-06-19 at 14:59 -0700, Tarun Vyas wrote: > On Tue, Jun 19, 2018 at 02:54:07PM -0700, Dhinakaran Pandiyan wrote: > > > > On Tue, 2018-06-19 at 14:27 -0700, Dhinakaran Pandiyan wrote: > > > > > > On Mon, 2018-05-14 at 13:49 -0700, Tarun Vyas wrote: >

Re: [Intel-gfx] [PATCH v2] drm/i915: Wait for PSR exit before checking for vblank evasion

On Tue, 2018-06-19 at 14:27 -0700, Dhinakaran Pandiyan wrote: > On Mon, 2018-05-14 at 13:49 -0700, Tarun Vyas wrote: > > > > The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, > > then > > the pipe_update_start call schedules itself out to check back

Re: [Intel-gfx] [PATCH v2] drm/i915: Wait for PSR exit before checking for vblank evasion

On Mon, 2018-05-14 at 13:49 -0700, Tarun Vyas wrote: > The PIPEDSL freezes on PSR entry and if PSR hasn't fully exited, then > the pipe_update_start call schedules itself out to check back later. > > On ChromeOS-4.4 kernel, which is fairly up-to-date w.r.t drm/i915 but > lags w.r.t core kernel cod

Re: [Intel-gfx] [PATCH v2] drm/i915: remove check for aux irq

On Tue, 2018-06-19 at 08:24 -0700, Lucas De Marchi wrote: > On Tue, Jun 19, 2018 at 7:06 AM Ville Syrjälä > wrote: > > > > > > On Fri, Jun 15, 2018 at 02:51:06PM -0700, Lucas De Marchi wrote: > > > > > > On Fri, Jun 15, 2018 at 08:58:28PM +0300, Ville Syrjälä wrote: > > > > > > > > On Wed, May

Re: [Intel-gfx] [PATCH v5 5/5] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side

PD > and set DP_PSR_LINK_CRC_ERROR in DP_PSR_ERROR_STATUS. > > Spec: 7723 > > v4: > patch moved to after 'drm/i915/psr: Avoid PSR exit max time timeout' > to avoid touch in 2 patches EDP_PSR_DEBUG. > > v3: > disabling PSR instead of exiting on error > > Cc: Dhin

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

wer updated patches if you use version numbers. Reviewed-by: Dhinakaran Pandiyan > > v2: Jani > Keep the bdb version check. > v3: > Apply newer version for skl from 205+(DK). > Add (version check && platform list) (Jani). > Add bdb version for each pla

[Intel-gfx] [PATCH] drm/i915/psr: Fix warning in intel_psr_activate()

ngs as PSR is already enabled and active. So, put the cancel_work call back in psr_disable(). Cc: Rodrigo Vivi Cc: José Roberto de Souza Fixes: 5422b37c907e ("drm/i915/psr: Kill delays when activating psr back.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106948 Signe

Re: [Intel-gfx] [PATCH] drm/i915/psr: Kill delays when activating psr back.

On Wed, 2018-06-13 at 16:49 -0700, Dhinakaran Pandiyan wrote: > On Wed, 2018-06-13 at 12:26 -0700, Rodrigo Vivi wrote: > > > > The immediate enabling was actually not an issue for the > > HW perspective for core platforms that have HW tracking. > > HW will wait few i

Re: [Intel-gfx] [PATCH 11/14] drm/i915: Fix DP-MST crtc_mask

On Fri, 2018-06-15 at 19:49 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Each fake MST encoder is tied to a specific pipe. Fix the encoder's > crtc_mask to reflect that fact. > > Signed-off-by: Ville Syrjälä > --- >  drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- >  1 file changed, 1 inser

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

On Fri, 2018-06-15 at 11:10 +0300, Jani Nikula wrote: > On Thu, 14 Jun 2018, Dhinakaran Pandiyan om> wrote: > > > > On Thu, 2018-06-14 at 16:56 +, Nagaraju, Vathsala wrote: > > > > > > + Ashutosh(VBT team)   + maulik > > > > > > 209 is

Re: [Intel-gfx] [PATCH v4 4/5] drm/i915/psr: Avoid PSR exit max time timeout

On Thu, 2018-06-14 at 14:50 -0700, Dhinakaran Pandiyan wrote: > On Thu, 2018-06-14 at 14:13 -0700, Rodrigo Vivi wrote: > > > > On Thu, Jun 14, 2018 at 01:34:32PM -0700, José Roberto de Souza > > wrote: > > > > > > > > > Specification requires t

Re: [Intel-gfx] [PATCH v4 2/5] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink

; > v4: > > Using CAN_PSR instead of HAS_PSR in intel_psr_short_pulse > > > > v3: > > disabling PSR instead of exiting on error > > > > Cc: Dhinakaran Pandiyan > > Cc: Rodrigo Vivi > > Signed-off-by: José Roberto de Souza > > --- > &g

Re: [Intel-gfx] [PATCH v4 5/5] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side

eout' > > to avoid touch in 2 patches EDP_PSR_DEBUG. > > > > v3: > > disabling PSR instead of exiting on error > > > > Cc: Dhinakaran Pandiyan > > Cc: Rodrigo Vivi > > Signed-off-by: José Roberto de Souza > > --- > >  dri

Re: [Intel-gfx] [PATCH v4 4/5] drm/i915/psr: Avoid PSR exit max time timeout

enabled > so it should come first and only bdw+... > Isn't this the case? The dependency is the other way around, sending CRC's requires timeout to be disabled. Since disabling timeouts results in a predictable behavior, we can do it for all platforms. > > > >

Re: [Intel-gfx] [PATCH v2] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

On Thu, 2018-06-14 at 13:32 +0300, Ville Syrjälä wrote: > On Wed, Jun 13, 2018 at 06:51:37PM -0700, Dhinakaran Pandiyan wrote: > > > > On Fri, 2018-05-25 at 20:56 +0100, Chris Wilson wrote: > > > > > > Quoting Dhinakaran Pandiyan (2018-05-25 20:43:13) >

[Intel-gfx] [PATCH v3] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

t the register change. v2: from DK raw_reg_[read/write], branch prediction hint and drop platform check (Mika) v3: From DK Early re-enable of master interrupt (Chris) Cc: Chris Wilson Cc: Mika Kuoppala Signed-off-by: Dhinakaran Pandiyan [Paulo: bikesheds and rebases] Signed-off-by: Paulo Z

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

rg; intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH] drm/i915/psr: Adds psrwake options for all > platforms > > On Thu, 2018-06-14 at 11:59 +0530, Nagaraju, Vathsala wrote: > > > > > > On 6/13/2018 11:10 PM, Dhinakaran Pandiyan wrote: > > > > > >

Re: [Intel-gfx] [PATCH 05/24] drm/i915/icp: Add Interrupt Support

On Wed, 2018-06-13 at 15:23 -0700, Lucas De Marchi wrote: > On Tue, May 29, 2018 at 05:04:58PM -0700, Lucas De Marchi wrote: > > > > On Thu, May 24, 2018 at 05:43:24PM -0700, Lucas De Marchi wrote: > > > > > > On Thu, May 24, 2018 at 05:45:43PM -0700

Re: [Intel-gfx] [PATCH v2] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

On Fri, 2018-05-25 at 20:56 +0100, Chris Wilson wrote: > Quoting Dhinakaran Pandiyan (2018-05-25 20:43:13) > > > > The Graphics System Event(GSE) interrupt bit has a new location in > > the > > GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registers. Since GSE was the > >

Re: [Intel-gfx] [PATCH] drm/i915/psr: Kill delays when activating psr back.

On Wed, 2018-06-13 at 23:59 +, Souza, Jose wrote: > On Wed, 2018-06-13 at 16:49 -0700, Dhinakaran Pandiyan wrote: > > > > On Wed, 2018-06-13 at 12:26 -0700, Rodrigo Vivi wrote: > > > > > > The immediate enabling was actually not an issue for the > > &

Re: [Intel-gfx] [PATCH] drm/i915/psr: Kill delays when activating psr back.

s SRD exit training time (max of 6ms), plus SRD aux channel handshake (max of 1.5ms)." Otherwise, we can end up re-enabling right after a disable in psr_exit() > > Cc: Dhinakaran Pandiyan > Signed-off-by: Rodrigo Vivi > --- >  drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH v3 5/7] drm/i915/psr: Handle PSR RFB storage error

On Thu, 2018-05-17 at 15:21 -0700, José Roberto de Souza wrote: > Sink will interrupt source when it have any problem saving or reading > the remote frame buffer. > > v3: > disabling PSR instead of exiting on error > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi

Re: [Intel-gfx] [PATCH v3 4/7] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink

On Wed, 2018-06-13 at 20:02 +, Souza, Jose wrote: > On Wed, 2018-06-13 at 13:17 -0700, Dhinakaran Pandiyan wrote: > > > > On Tue, 2018-06-05 at 22:45 +, Souza, Jose wrote: > > > > > > On Tue, 2018-05-22 at 16:58 -0700, Dhinakaran Pandiyan wrote: > >

Re: [Intel-gfx] [PATCH v3 4/7] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink

On Tue, 2018-06-05 at 22:45 +, Souza, Jose wrote: > On Tue, 2018-05-22 at 16:58 -0700, Dhinakaran Pandiyan wrote: > > > > On Thu, 2018-05-17 at 15:21 -0700, José Roberto de Souza wrote: > > > > > > eDP spec states that sink device will do a short pulse in H

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

On Wed, 2018-06-13 at 10:32 -0700, Dhinakaran Pandiyan wrote: > On Wed, 2018-06-13 at 09:41 +0300, Jani Nikula wrote: > > > > On Wed, 13 Jun 2018, "Nagaraju, Vathsala" > co > > m> wrote: > > > > > > > > > On 6/12/2018 2:30 PM,

Re: [Intel-gfx] [PATCH] drm/i915/psr: Adds psrwake options for all platforms

es (Check for 203+ might help > > > > but cannot be foolproof) > > > > BXT Uses old interpretation. > > > > CNL/ICL+All > > > > GLK All > > > > > > > > For SKL, we will continue to use older int

Re: [Intel-gfx] [PATCH] drm/i915/psr : Add psr1 live status

Rename psr2_live_status to psr_source_status. > v4: DK > Move EDP_PSR_STATUS_STATE_SHIFT below EDP_PSR_STATUS_STATE_MASK. > Pass seq to psr_source_status, handle source status prints in > psr_source_status. > v5: Fixed CI warning messages > > Cc: Rodrigo Vivi > Cc: Dhina

Re: [Intel-gfx] [PATCH v3 2/7] drm/i915/dp: Use intel_dp_aux_wait_done() to wait for previous aux xfer

On Thursday, May 17, 2018 3:21:13 PM PDT José Roberto de Souza wrote: > This reduces the spaghetti that intel_dp_aux_xfer() and reuses code. > The only difference is that now it will wait up to 10ms instead of > 3ms. > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi > Signed

Re: [Intel-gfx] [PATCH] drm/i915/psr: Set idle frame count based on sink synchronization latency

On Tue, 2018-05-29 at 12:51 -0700, Rodrigo Vivi wrote: > On Thu, May 24, 2018 at 08:30:47PM -0700, Dhinakaran Pandiyan wrote: > > > > DPCD 2009h "Synchronization latency in sink" has bits that tell us > > the > > maximum number of frames sink can take

[Intel-gfx] [PATCH v2] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

t the register change. v2: from DK raw_reg_[read/write], branch prediction hint and drop platform check (Mika) Cc: Mika Kuoppala Signed-off-by: Dhinakaran Pandiyan [Paulo: bikesheds and rebases] Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_irq.c

[Intel-gfx] [PATCH] drm/i915/psr: Set idle frame count based on sink synchronization latency

rto de Souza Cc: Rodrigo Vivi Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 40 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index ebc483f06

Re: [Intel-gfx] [PATCH 05/24] drm/i915/icp: Add Interrupt Support

- SHOTPLUG_CTL_DDI and SHOTPLUG_CTL_TC. > > Introduce these registers and their intended values. > > > > Introduce icp_irq_handler(). > > > > Cc: Paulo Zanoni > > Cc: Dhinakaran Pandiyan > > Cc: Ville Syrjala > > Signed-off-by: Anusha Sri

Re: [Intel-gfx] [PATCH 02/24] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC

On Thu, 2018-05-24 at 12:22 +0300, Mika Kuoppala wrote: > Paulo Zanoni writes: > > > > > From: Dhinakaran Pandiyan > > > > The Graphics System Event(GSE) interrupt bit has a new location in > > the > > GU_MISC_INTERRUPT_{IIR, ISR, IMR, IER} registe

Re: [Intel-gfx] [PATCH] drm/i915/psr : Add psr1 live status

On Wed, 2018-05-23 at 11:07 +0530, Nagaraju, Vathsala wrote: > > On 5/23/2018 1:28 AM, Dhinakaran Pandiyan wrote: > > > > On Tue, 2018-05-22 at 14:27 +0530, vathsala nagaraju wrote: > > > > > > From: Vathsala Nagaraju > > > > > > Print

Re: [Intel-gfx] [PATCH v3 6/7] drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side

> and set DP_PSR_LINK_CRC_ERROR on DP_PSR_ERROR_STATUS. > > Also spec recommends to disable MAX_SLEEP as a trigger to exit PSR > when > CRC check is enabled to improve power savings. > > Spec: 7723 > > v3: > disabling PSR instead of exiting on error > > Cc: Dhinakaran Pandiy

Re: [Intel-gfx] [PATCH v3 4/7] drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink

R. > > Here taking the safest approach and disabling PSR(at least until > the next modeset), to avoid multiple rendering issues due to > bad pannels. > > v3: > disabling PSR instead of exiting on error > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi > Signed-off-by

Re: [Intel-gfx] [PATCH v3 3/7] drm/i915/psr: Remove intel_crtc_state parameter from disable()

On Thu, 2018-05-17 at 15:21 -0700, José Roberto de Souza wrote: > It was only used in VLV/CHV so after the removal of the PSR support > for those platforms it is not necessary any more. Right, Reviewed-by: Dhinakaran Pandiyan > > Cc: Dhinakaran Pandiyan > Cc: Rodrigo Vivi

Re: [Intel-gfx] [PATCH 6/6] drm/i915/psr: Fix ALPM cap check for PSR2

On Tue, 2018-05-22 at 07:37 -0700, Tarun Vyas wrote: > On Fri, May 11, 2018 at 12:51:45PM -0700, Dhinakaran Pandiyan wrote: > > > > While touching the code around this, I noticed that absence of ALPM > > capability does not stop us from enabling PSR2. But, the spec > >

Re: [Intel-gfx] [PATCH] drm/i915/psr : Add psr1 live status

Rename psr2_live_status to psr_source_status > > Cc: Rodrigo Vivi > Cc: Dhinakaran Pandiyan > > Signed-off-by: Vathsala Nagaraju > --- >  drivers/gpu/drm/i915/i915_debugfs.c | 66 +++-- > >  drivers/gpu/drm/i915/i915_reg.h |  1 + >  

Re: [Intel-gfx] [PATCH 1/6] drm/i915/psr: Avoid DPCD reads when panel does not support PSR

On Thu, 2018-05-17 at 17:27 -0700, Tarun Vyas wrote: > On Fri, May 11, 2018 at 12:51:40PM -0700, Dhinakaran Pandiyan wrote: > > > > Ville noticed that we are unncessarily reading DPCD's after knowing > > panel did not support PSR. Looks like this check that was prese

Re: [Intel-gfx] [PATCH] Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."

On Thursday, May 17, 2018 12:44:30 PM PDT Dhinakaran Pandiyan wrote: > On Thu, 2018-05-17 at 10:33 +0300, Jani Nikula wrote: > > On Thu, 17 May 2018, Jani Nikula wrote: > > > On Wed, 16 May 2018, Dhinakaran Pandiyan > > > > > .com> wrote: > > > >

Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

On Thu, 2018-05-17 at 11:02 +0300, Jani Nikula wrote: > On Wed, 16 May 2018, Dhinakaran Pandiyan om> wrote: > > > > On Wed, 2018-05-16 at 11:08 +0300, Jani Nikula wrote: > > > > > > I think the patch is now the way it should be. We should not > > >

Re: [Intel-gfx] [PATCH] Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."

On Thu, 2018-05-17 at 10:33 +0300, Jani Nikula wrote: > On Thu, 17 May 2018, Jani Nikula wrote: > > > > On Wed, 16 May 2018, Dhinakaran Pandiyan > .com> wrote: > > > > > > On Wed, 2018-05-16 at 11:01 +0300, Jani Nikula wrot

Re: [Intel-gfx] [PATCH] Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."

On Thu, 2018-05-17 at 10:33 +0300, Jani Nikula wrote: > On Thu, 17 May 2018, Jani Nikula wrote: > > > > On Wed, 16 May 2018, Dhinakaran Pandiyan > .com> wrote: > > > > > > On Wed, 2018-05-16 at 11:01 +0300, Jani Nikula wrot

Re: [Intel-gfx] [PATCH] Revert "drm/i915/edp: Allow alternate fixed mode for eDP if available."

On Wed, 2018-05-16 at 11:01 +0300, Jani Nikula wrote: > This reverts commit dc911f5bd8aacfcf8aabd5c26c88e04c837a938e. > > Per the report, no matter what display mode you select with xrandr, > the > i915 driver will always select the alternate fixed mode. For the > reporter this means that the disp

Re: [Intel-gfx] [PATCH] drm/dp: implement EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT

On Wed, 2018-05-16 at 09:33 -0700, matthew.s.atw...@intel.com wrote: > From: Matt Atwood > > According to DP spec (2.9.3.1 of DP 1.4) if > EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT is set the addresses in > DPCD > 02200h through 0220Fh shall contain the DPRX's true capability. These > values wil

Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

On Wed, 2018-05-16 at 09:14 +0530, vathsala nagaraju wrote: > On Wednesday 16 May 2018 04:33 AM, Dhinakaran Pandiyan wrote: > > > > On Mon, 2018-05-14 at 09:02 +0530, vathsala nagaraju wrote: > > > > > > From: Vathsala Nagaraju > > > > > >

Re: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr

On Wed, 2018-05-16 at 11:08 +0300, Jani Nikula wrote: > On Wed, 16 May 2018, vathsala nagaraju > wrote: > > > > On Wednesday 16 May 2018 04:33 AM, Dhinakaran Pandiyan wrote: > > > > > > On Mon, 2018-05-14 at 09:02 +0530, vathsala nagaraju wrote: >

Re: [Intel-gfx] [PATCH v2 2/9] drm/i915/psr: Move PSR exit specific code to hardware specific function

op.org/patch/30/ lands, we don't have to worry about this :) > > Signed-off-by: José Roberto de Souza > Cc: Dhinakaran Pandiyan > Reviewed-by: Rodrigo Vivi > --- > > No changes from v1. > >  drivers/gpu/drm/i915/i915_drv

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