[Intel-gfx] [PATCH igt] benchmarks/gem_exec_nop: fix engines selection

Code on loop() function shadowed function parameter which led to inability to try out different engines in the test: we always loaded RCS0. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103804 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Chris Wilson <ch

[Intel-gfx] [RFC v4 2/5] drm/i915/pmu: serve global events and support perf stat

racking. Change-Id: I7d1abe747a4399196e72253f7b66441a6528dbee Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> cpumask Change-Id: I145f59240b75f2b703e0531ec81af6cd05aae95c Signed-off-by: Dmitry Ro

[Intel-gfx] [RFC v4 5/5] drm/i915/pmu: deny perf driver level sampling of i915 PMU

off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> --- drivers/gpu/drm/i915/i915_pmu.c | 89 ++--- 1

[Intel-gfx] [RFC v4 0/5] Support perf stat with i915 PMU

.@infradead.org> Dmitry Rogozhkin (5): drm/i915/pmu: reorder function to suite next patch drm/i915/pmu: serve global events and support perf stat drm/i915/pmu: introduce i915_pmu_enable_info debugfs entry drm/i915/pmu: introduce refcounting of event subscriptions drm/i915/pmu: deny

[Intel-gfx] [RFC v4 4/5] drm/i915/pmu: introduce refcounting of event subscriptions

subscribers for this event. Change-Id: I0d787f5feab988ad3c8af6d7ad70fb26d5839263 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pmu.c

[Intel-gfx] [RFC v4 3/5] drm/i915/pmu: introduce i915_pmu_enable_info debugfs entry

With the exposure of i915 PMU event enabling mask we will be able to implement IGT tests to see whether we properly handle events enabling/disabling on multiple parallel consumers. Change-Id: I3561e48cd27bc2a19424cf7b6949fadb2a77ab20 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.

[Intel-gfx] [RFC v4 1/5] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

[Intel-gfx] [RFC i-g-t v2] tests/perf_pmu: test i915 RFC PMU

metrics do not conflict * cpu_online: verify PMU context migration on CPUs going online/offline v1: add cpu_online test v2: add enable and frequency tests Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson

[Intel-gfx] [RFC i-g-t v1] tests/perf_pmu: test i915 RFC PMU

initialization * single: verify that BUSY metrics work for each engine * parallel: verify that parallel requests for metrics do not conflict * cpu_online: verify PMU context migration on CPUs going online/offline v1: add cpu_online test Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com&

[Intel-gfx] [RFC v4 2/5] drm/i915/pmu: serve global events and support perf stat

racking. Change-Id: I7d1abe747a4399196e72253f7b66441a6528dbee Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> cpumask Change-Id: I145f59240b75f2b703e0531ec81af6cd05aae95c Signed-off-by: Dmitry Ro

[Intel-gfx] [RFC v4 3/5] drm/i915/pmu: introduce i915_pmu_enable_info debugfs entry

With the exposure of i915 PMU event enabling mask we will be able to implement IGT tests to see whether we properly handle events enabling/disabling on multiple parallel consumers. Change-Id: I3561e48cd27bc2a19424cf7b6949fadb2a77ab20 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.

[Intel-gfx] [RFC v4 5/5] drm/i915/pmu: deny perf driver level sampling of i915 PMU

off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> --- drivers/gpu/drm/i915/i915_pmu.c | 89 ++--- 1

[Intel-gfx] [RFC v4 0/5] Support perf stat with i915 PMU

level sampling. v3: Add CPUs online/offline tracking to form cpumask. v4: Add i915_pmu_enable_info debugfs entry. Introduce refcounting of event subscriptions. Dmitry Rogozhkin (5): drm/i915/pmu: reorder function to suite next patch drm/i915/pmu: serve global events and support perf stat

[Intel-gfx] [RFC v4 1/5] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

[Intel-gfx] [RFC v4 4/5] drm/i915/pmu: introduce refcounting of event subscriptions

subscribers for this event. Change-Id: I0d787f5feab988ad3c8af6d7ad70fb26d5839263 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pmu.c

[Intel-gfx] [RFC i-g-t v1] tests/perf_pmu: test i915 RFC PMU

initialization * single: verify that BUSY metrics work for each engine * parallel: verify that parallel requests for metrics do not conflict * cpu_online: verify PMU context migration on CPUs going online/offline v1: add cpu_online test Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com&

[Intel-gfx] [RFC v3 0/3] Support perf stat with i915 PMU

level sampling. v3: Add CPUs online/offline tracking to form cpumask. Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> Dmitry Rogozhkin (3): drm/i915/pmu: reorder function to suite next pa

[Intel-gfx] [RFC v3 3/3] drm/i915/pmu: deny perf driver level sampling of i915 PMU

off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> --- drivers/gpu/drm/i915/i915_pmu.c | 89 ++--- 1

[Intel-gfx] [RFC v3 1/3] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

[Intel-gfx] [RFC v3 2/3] drm/i915/pmu: serve global events and support perf stat

racking. Change-Id: I7d1abe747a4399196e72253f7b66441a6528dbee Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> cpumask Change-Id: I145f59240b75f2b703e0531ec81af6cd05aae95c Signed-off-by: Dmitry Ro

[Intel-gfx] [RFC i-g-t] tests/perf_pmu: test i915 RFC PMU

initialization * single: verify that BUSY metrics work for each engine * parallel: verify that parallel requests for metrics do not conflict Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chr

[Intel-gfx] [RFC v2 2/3] drm/i915/pmu: serve global events and support perf stat

ple events creation of the same type followed by counter aggregation by perf-stat. Change-Id: I7d1abe747a4399196e72253f7b66441a6528dbee Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infrad

[Intel-gfx] [RFC v2 3/3] drm/i915/pmu: deny perf driver level sampling of i915 PMU

off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> --- drivers/gpu/drm/i915/i915_pmu.c | 89 ++--- 1

[Intel-gfx] [RFC v2 1/3] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

[Intel-gfx] [RFC v2 0/3] Support perf stat with i915 PMU

level sampling. Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Peter Zijlstra <pet...@infradead.org> Dmitry Rogozhkin (3): drm/i915/pmu: reorder function to suite next patch drm/i915/pmu: serve global events and support perf s

[Intel-gfx] [RFC v1 1/2] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

[Intel-gfx] [RFC v1 0/2] Support perf stat with i915 PMU

comparing to Tvrtko's patches. Next patches adds fixes according to PMU API comments and clarifications from PMU aware engineers. v1: make busy_stats refcounted instead of the whole pmu Dmitry Rogozhkin (2): drm/i915/pmu: reorder function to suite next patch drm/i915/pmu: serve global events

[Intel-gfx] [RFC v1 2/2] drm/i915/pmu: serve global events and support perf stat

nter to avoid busy stats going away with some deleted event. Change-Id: I7d1abe747a4399196e72253f7b66441a6528dbee Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> ---

[Intel-gfx] [RFC 0/2] Support perf stat with i915 PMU

comparing to Tvrtko's patches. Next patches adds fixes according to PMU API comments and clarifications from PMU aware engineers. Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet...@infradead.org> Dmitry Rogozhkin (2): drm/i915/pmu: reorder function to suit

[Intel-gfx] [RFC 1/2] drm/i915/pmu: reorder function to suite next patch

This patch is doing nover except reordering functions to highlight changes in the next patch. Change-Id: I0cd298780503ae8f6f8035b86c59fc8b5191356b Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com> Cc: Peter Zijlstra <pet..

Re: [Intel-gfx] [PATCH 24/24] RFC drm/i915: Expose a PMU interface for perf queries

On 5/19/2017 1:01 AM, Chris Wilson wrote: On Thu, May 18, 2017 at 04:48:47PM -0700, Dmitry Rogozhkin wrote: On 5/18/2017 2:46 AM, Chris Wilson wrote: The first goal is to be able to measure GPU (and invidual ring) busyness without having to poll registers from userspace. (Which not only

Re: [Intel-gfx] [PATCH 24/24] RFC drm/i915: Expose a PMU interface for perf queries

On 5/18/2017 2:46 AM, Chris Wilson wrote: The first goal is to be able to measure GPU (and invidual ring) busyness without having to poll registers from userspace. (Which not only incurs holding the forcewake lock indefinitely, perturbing the system, but also runs the risk of hanging the

Re: [Intel-gfx] [RFC 0/3] Engine utilization tracking

On 5/10/2017 12:45 PM, Daniel Vetter wrote: On Wed, May 10, 2017 at 10:38 AM, Tvrtko Ursulin <tvrtko.ursu...@linux.intel.com> wrote: On 09/05/2017 19:11, Dmitry Rogozhkin wrote: On 5/9/2017 8:51 AM, Tvrtko Ursulin wrote: On 09/05/2017 16:29, Chris Wilson wrote: On Tue, May 09, 2017

Re: [Intel-gfx] [RFC 3/3] drm/i915: Export engine busy stats in debugfs

On 5/10/2017 1:30 AM, Tvrtko Ursulin wrote: On 09/05/2017 19:17, Dmitry Rogozhkin wrote: On 5/9/2017 7:09 AM, Tvrtko Ursulin wrote: [snip] +static ssize_t i915_engine_stats_read(struct file *file, char __user *ubuf, + size_t count, loff_t *pos) +{ +struct

Re: [Intel-gfx] [RFC 0/3] Engine utilization tracking

On 5/10/2017 1:38 AM, Tvrtko Ursulin wrote: On 09/05/2017 19:11, Dmitry Rogozhkin wrote: On 5/9/2017 8:51 AM, Tvrtko Ursulin wrote: On 09/05/2017 16:29, Chris Wilson wrote: On Tue, May 09, 2017 at 04:16:41PM +0100, Tvrtko Ursulin wrote: On 09/05/2017 15:26, Chris Wilson wrote: On Tue

Re: [Intel-gfx] [RFC 3/3] drm/i915: Export engine busy stats in debugfs

On 5/9/2017 7:09 AM, Tvrtko Ursulin wrote: From: Tvrtko Ursulin Export the stats added in the previous patch in debugfs. Number of active clients reading this data is tracked and the static key is only enabled whilst there are some. Userspace is intended to keep

Re: [Intel-gfx] [RFC 0/3] Engine utilization tracking

On 5/9/2017 8:51 AM, Tvrtko Ursulin wrote: On 09/05/2017 16:29, Chris Wilson wrote: On Tue, May 09, 2017 at 04:16:41PM +0100, Tvrtko Ursulin wrote: On 09/05/2017 15:26, Chris Wilson wrote: On Tue, May 09, 2017 at 03:09:33PM +0100, Tvrtko Ursulin wrote: From: Tvrtko Ursulin

Re: [Intel-gfx] [PATCH] drm/i915: Update MOCS settings for gen 9

On 5/5/2017 8:44 AM, Kenneth Graunke wrote: On Thursday, May 4, 2017 7:46:34 PM PDT Dmitry Rogozhkin wrote: On 5/4/2017 9:51 AM, Kenneth Graunke wrote: MediaSDK is not a benchmark. If I'm not mistaken, it's a userspace driver produced by Intel engineers, one which Intel has the full

Re: [Intel-gfx] [PATCH] drm/i915: Update MOCS settings for gen 9

On 5/4/2017 9:51 AM, Kenneth Graunke wrote: MediaSDK is not a benchmark. If I'm not mistaken, it's a userspace driver produced by Intel engineers, one which Intel has the full capability to change. What you're saying is that Intel's MediaSDK engineers are unwilling to change their software

[Intel-gfx] [RFC 0/2] slice shutdown debugfs interface for Gen8/Gen9

scalability across hw platforms. Dmitry Rogozhkin (2): drm/i915/skl: add slice shutdown debugfs interface drm/i915/bdw: permit make_rpcs execution on BDW to enable slice shutdown drivers/gpu/drm/i915/i915_debugfs.c | 38 +++- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [RFC 1/2] drm/i915/skl: add slice shutdown debugfs interface

and will not affect older ones. v1: Restrict effect of the patch to SKL. Comment code. Change-Id: I4f2fe5fefb8d1df4519fd0eb58237759c7d1a930 Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> CC: Tvrtko Ursulin <tvrtko.ursu...@intel.com> CC: Zhipeng Gong <zhipeng.g...@intel.

[Intel-gfx] [RFC 2/2] drm/i915/bdw: permit make_rpcs execution on BDW to enable slice shutdown

BDW supports RCS slices powering on/off. To do that we need make_rpcs executed on BDW to flash slices configuration. Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozh...@intel.com> CC: Tvrtko Ursulin <tvrtko.ursu...@intel.com> CC:

Re: [Intel-gfx] [RFC] drm/i915: add slice shutdown debugfs interface

On 4/7/2017 11:50 AM, Chris Wilson wrote: On Fri, Apr 07, 2017 at 03:41:41AM -0700, Dmitry Rogozhkin wrote: Slice shutdown override interface (i915_slice_enabled) permits to power on/off GPGPU slices in Gen8 and Gen9. This is helpful in performance investigations amd checking scalability

[Intel-gfx] [RFC] drm/i915: add slice shutdown debugfs interface

Slice shutdown override interface (i915_slice_enabled) permits to power on/off GPGPU slices in Gen8 and Gen9. This is helpful in performance investigations amd checking scalability across hw platforms. Change-Id: I4f2fe5fefb8d1df4519fd0eb58237759c7d1a930 Signed-off-by: Dmitry Rogozhkin