Re: [Intel-gfx] [PATCH 4/7] drm/i915/uc: Abort early on uc_init failure

2020-01-27 Thread Fernando Pacheco
firmware load. > > While at it, remove the unneeded fw_cleanup call (this is handled > outside of gt_init) and add a probe failure injection point for testing. > Also, update the logs for uc_init failures to probe_failure() since > they will cause the driver load to fail. Reviewe

Re: [Intel-gfx] [PATCH 3/7] drm/i915/uc: Improve tracking of uC init status

2020-01-27 Thread Fernando Pacheco
he check for > that). Also, since we need to have attempted the fetch for the result > of uses_guc to be meaningful, we need to make sure we've moved away > from INTEL_UC_FIRMWARE_SELECTED. > > All the GuC changes have been mirrored on the HuC for coherency. Reviewed-by: Fernando

Re: [Intel-gfx] [CI 2/2] HAX: force enable_guc=2

2020-01-22 Thread Fernando Pacheco
On 1/22/20 4:52 AM, Chris Wilson wrote: > Quoting Fernando Pacheco (2020-01-22 00:18:22) >> Signed-off-by: Fernando Pacheco >> --- >> drivers/gpu/drm/i915/i915_params.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/g

[Intel-gfx] [CI 1/2] drm/i915/guc: Provide mmio list to be saved/restored on engine reset

2020-01-21 Thread Fernando Pacheco
-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin Acked-by: Daniele Ceraolo Spurio Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 25 +++-- .../gpu/drm/i915/gt/intel_workarounds_types.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 96

[Intel-gfx] [CI 2/2] HAX: force enable_guc=2

2020-01-21 Thread Fernando Pacheco
Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 947d0a38fa3c..4d17235c33bd 100644 --- a/drivers/gpu/drm/i915/i915_params.h

[Intel-gfx] [PATCH 2/2] HAX: force enable_guc=2 and WA i915#571

2019-12-12 Thread Fernando Pacheco
From: Daniele Ceraolo Spurio To get a full run with GuC loading and HuC auth enabled. Signed-off-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 9 + drivers/gpu/drm/i915/i915_params.h | 2 +- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH 1/2] drm/i915/guc: Provide mmio list to be saved/restored on engine reset

2019-12-12 Thread Fernando Pacheco
-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 25 +++-- .../gpu/drm/i915/gt/intel_workarounds_types.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 96 ++- 3 files changed, 114 insertions(+), 8 deletions

[Intel-gfx] [PATCH 1/2] drm/i915/guc: Provide mmio list to be saved/restored on engine reset

2019-11-22 Thread Fernando Pacheco
that at some point we may attempt to add the same register more than once. Do not consider this an error; silently move on if the register is already in the list. Signed-off-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 23

[Intel-gfx] [PATCH 2/2] HAX: force enable_guc=2

2019-11-22 Thread Fernando Pacheco
Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 31b88f297fbc..acda9f2a1207 100644 --- a/drivers/gpu/drm/i915/i915_params.h

[Intel-gfx] [RFC PATCH 0/1] GuC engine reset support

2019-09-25 Thread Fernando Pacheco
: Chris Wilson Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Fernando Pacheco (1): drm/i915/guc: Provide mmio list to be saved/restored on engine reset drivers/gpu/drm/i915/gt/intel_workarounds.c | 23 +++-- .../gpu/drm/i915/gt/intel_workarounds_types.h | 1 + drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset

2019-09-25 Thread Fernando Pacheco
The driver must provide GuC with a list of mmio registers that should be saved/restored during a GuC-based engine reset. We provide a minimal set of registers that should get things working and extend as needed. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/gt/intel_workarounds.c

[Intel-gfx] [CI 1/2] drm/i915/uc: Extract common code from GuC stop/disable comm

2019-08-29 Thread Fernando Pacheco
situation (stop -> disable) only occurs during intel_uc_fini_hw, so during fini, call guc_disable_communication only if currently enabled. The symmetric calls to enable/disable remain unmodified for all other scenarios. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110943 Signed-off

[Intel-gfx] [CI 2/2] HAX: force enable_guc=2

2019-08-29 Thread Fernando Pacheco
Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index d29ade3b7de6..f9fbb1f2fabf 100644 --- a/drivers/gpu/drm/i915/i915_params.h

[Intel-gfx] [PATCH 0/3] Add/modify checks within intel_uc_fini_hw

2019-08-27 Thread Fernando Pacheco
. Thanks, Fernando Cc: Chris Wilson Cc: Michal Wajdeczko Cc: Daniele Ceraolo Spurio Fernando Pacheco (3): drm/i915/uc: Extract common code from GuC stop/disable comm drm/i915/uc: Disable GuC submission only if currently enabled drm/i915/uc: Fini hw even if GuC is not running .../gpu/drm/i915

[Intel-gfx] [PATCH 1/3] drm/i915/uc: Extract common code from GuC stop/disable comm

2019-08-27 Thread Fernando Pacheco
situation (stop -> disable) only occurs during intel_uc_fini_hw, so during fini, call guc_disable_communication only if currently enabled. The symmetric calls to enable/disable remain unmodified for all other scenarios. Signed-off-by: Fernando Pacheco Cc: Chris Wilson Cc: Michal Wajdeczko Cc: Da

[Intel-gfx] [PATCH 2/3] drm/i915/uc: Disable GuC submission only if currently enabled

2019-08-27 Thread Fernando Pacheco
It is not enough to check that uc supports GuC submission now that we can continue to load the driver after GuC initialization failure (support != enabled). Instead we should explicitly check that we enabled GuC submission. Signed-off-by: Fernando Pacheco Cc: Michal Wajdeczko Cc: Daniele

[Intel-gfx] [PATCH 3/3] drm/i915/uc: Fini hw even if GuC is not running

2019-08-27 Thread Fernando Pacheco
-off-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index b2eb340ce87e..ad5b928fe36a

[Intel-gfx] [PATCH v2] drm/i915/uc: Fini hw even if GuC is not running

2019-08-15 Thread Fernando Pacheco
-off-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c index 0dc2b0cf4604..67dec7dcc26f

Re: [Intel-gfx] [PATCH] drm/i915/uc: Fini hw even if GuC is not running

2019-08-14 Thread Fernando Pacheco
On 8/13/19 1:18 PM, Michal Wajdeczko wrote: > On Tue, 13 Aug 2019 18:26:28 +0200, Fernando Pacheco > wrote: > >> We should not be skipping uc_fini_hw on finding GuC >> is no longer running. There is plenty of hw and internal >> state that can be cleaned up wi

Re: [Intel-gfx] [PATCH] drm/i915/uc: Fini hw even if GuC is not running

2019-08-14 Thread Fernando Pacheco
On 8/13/19 1:16 PM, Daniele Ceraolo Spurio wrote: > > > On 8/13/19 9:26 AM, Fernando Pacheco wrote: >> We should not be skipping uc_fini_hw on finding GuC >> is no longer running. There is plenty of hw and internal >> state that can be cleaned up without having

[Intel-gfx] [PATCH] drm/i915/uc: Fini hw even if GuC is not running

2019-08-13 Thread Fernando Pacheco
We should not be skipping uc_fini_hw on finding GuC is no longer running. There is plenty of hw and internal state that can be cleaned up without having to communicate with GuC. Signed-off-by: Fernando Pacheco Cc: Daniele Ceraolo Spurio Cc: Michal Wajdeczko --- drivers/gpu/drm/i915/gt/uc

[Intel-gfx] [PATCH v3 4/5] Revert "drm/i915/guc: Disable global reset"

2019-04-19 Thread Fernando Pacheco
This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_reset.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c index 677d59304e78..1092d16c289c

[Intel-gfx] [PATCH v3 2/5] drm/i915/uc: Reserve upper range of GGTT

2019-04-19 Thread Fernando Pacheco
comfortably hold GuC/HuC firmware images. v2: Reserve node rather than insert (Chris) Simpler determination of node start/size (Daniele) Move reserve/release out to intel_guc.* files v3: Reserve starting at GUC_GGTT_TOP only and bail if this fails (Chris) Signed-off-by: Fernando Pacheco

[Intel-gfx] [PATCH v3 0/5] Perma-pin uC firmware and re-enable global reset

2019-04-19 Thread Fernando Pacheco
.* and intel_huc_fw.*. The bind/unbind will now take place within the newly repurposed intel_uc_fw_init/fini. All other changes should be called out in their respective patches and should be the direct result of a review comment. Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Fernando Pacheco (5): drm

[Intel-gfx] [PATCH v3 3/5] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-19 Thread Fernando Pacheco
needed during xfer (Chris) Remove attempts to bind outside of xfer (Chris) Mark fw bind/unbind static Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/intel_guc.c| 9 ++- drivers/gpu/drm/i915/intel_guc_fw.c | 18 ++--- drivers/gpu/drm/i915/intel_huc.c| 74

[Intel-gfx] [PATCH v3 5/5] drm/i915/selftests: Check that gpu reset is usable from atomic context

2019-04-19 Thread Fernando Pacheco
GPU reset is now available with GuC enabled, so re-enable our check that this reset is usable from atomic context. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3 1/5] drm/i915/uc: Rename uC firmware init/fini functions

2019-04-19 Thread Fernando Pacheco
;. v2: also rename uC fw fini function Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/intel_guc.c| 6 +++--- drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- drivers/gpu/drm/i915/intel_huc.h| 2 +- drivers/gpu/drm/i915/intel_huc_fw.c | 2 +- drivers/gpu/drm/i915/intel_uc_fw.c

Re: [Intel-gfx] [PATCH v2 2/5] drm/i915/uc: Reserve upper range of GGTT

2019-04-19 Thread Fernando Pacheco
On 4/19/19 12:14 AM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-19 00:31:48) >> GuC and HuC depend on struct_mutex for device >> reinitialization. Moving away from this dependency >> requires perma-pinning the firmware images in GGTT. >> The upper portion o

Re: [Intel-gfx] [PATCH v2 0/5] Perma-pin uC firmware and re-enable global reset

2019-04-18 Thread Fernando Pacheco
On 4/18/19 4:31 PM, Fernando Pacheco wrote: > The intent is to move the GuC and HuC firmware images to the > top of the address space. This portion is inaccessible during > normal GuC operations and should be relatively safe to house > both firmware images. By making the move we c

[Intel-gfx] [PATCH v2 2/5] drm/i915/uc: Reserve upper range of GGTT

2019-04-18 Thread Fernando Pacheco
comfortably hold GuC/HuC firmware images. v2: Reserve node rather than insert (Chris) Simpler determination of node start/size (Daniele) Move reserve/release out to intel_guc.* files Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_gem_gtt.c | 25 drivers/gpu

[Intel-gfx] [PATCH v2 1/5] drm/i915/uc: Rename uC firmware init/fini functions

2019-04-18 Thread Fernando Pacheco
;. v2: also rename uC fw fini function Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/intel_guc.c| 6 +++--- drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- drivers/gpu/drm/i915/intel_huc.h| 2 +- drivers/gpu/drm/i915/intel_huc_fw.c | 2 +- drivers/gpu/drm/i915/intel_uc_fw.c

[Intel-gfx] [PATCH v2 0/5] Perma-pin uC firmware and re-enable global reset

2019-04-18 Thread Fernando Pacheco
take place within the newly repurposed intel_uc_fw_init/fini. All other changes should be called out in their respective patches and should be the direct result of a review comment. Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Fernando Pacheco (5): drm/i915/uc: Rename uC firmware init/fini

[Intel-gfx] [PATCH v2 5/5] drm/i915/selftests: Check that gpu reset is usable from atomic context

2019-04-18 Thread Fernando Pacheco
GPU reset is now available with GuC enabled, so re-enable our check that this reset is usable from atomic context. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2 4/5] Revert "drm/i915/guc: Disable global reset"

2019-04-18 Thread Fernando Pacheco
This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_reset.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c index 677d59304e78..1092d16c289c

[Intel-gfx] [PATCH v2 3/5] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-18 Thread Fernando Pacheco
functions to bind/unbind fw object Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/intel_guc.c| 9 ++- drivers/gpu/drm/i915/intel_guc_fw.c | 18 +++-- drivers/gpu/drm/i915/intel_huc.c| 74 + drivers/gpu/drm/i915

Re: [Intel-gfx] [PATCH 3/4] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-16 Thread Fernando Pacheco
On 4/16/19 8:04 AM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-16 15:51:15) >> On 4/9/19 3:22 PM, Chris Wilson wrote: >>> Quoting Fernando Pacheco (2019-04-09 22:31:01) >>>> diff --git a/drivers/gpu/drm/i915/intel_huc.c >>>> b/drivers/gpu/dr

Re: [Intel-gfx] [PATCH 4/4] Revert "drm/i915/guc: Disable global reset"

2019-04-16 Thread Fernando Pacheco
On 4/16/19 8:05 AM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-16 15:45:03) >> >> On 4/9/19 2:54 PM, Chris Wilson wrote: >>> Quoting Fernando Pacheco (2019-04-09 22:31:02) >>>> This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8. >>&

Re: [Intel-gfx] [PATCH 3/4] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-16 Thread Fernando Pacheco
On 4/9/19 3:22 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:01) >> diff --git a/drivers/gpu/drm/i915/intel_huc.c >> b/drivers/gpu/drm/i915/intel_huc.c >> index 94c04f16a2ad..89e0b942ae86 100644 >> --- a/drivers/gpu/drm/i915/intel_huc.c &g

Re: [Intel-gfx] [PATCH 4/4] Revert "drm/i915/guc: Disable global reset"

2019-04-16 Thread Fernando Pacheco
On 4/9/19 2:54 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:02) >> This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8. > And don't forget the test code that skips guc. > -Chris Selftests? I couldn't find anything that skips guc. I found som

Re: [Intel-gfx] [PATCH 2/4] drm/i915/uc: Reserve upper range of GGTT

2019-04-15 Thread Fernando Pacheco
On 4/9/19 2:41 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:00) >> GuC and HuC depend on struct_mutex for device >> reinitialization. Moving away from this dependency >> requires perma-pinning the firmware images in GGTT. >> The upper portion o

Re: [Intel-gfx] [PATCH 3/4] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-09 Thread Fernando Pacheco
On 4/9/19 3:11 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:01) >> diff --git a/drivers/gpu/drm/i915/i915_gem.c >> b/drivers/gpu/drm/i915/i915_gem.c >> index bf3d12f94365..160959785589 100644 >> --- a/drivers/gpu/drm/i915/i915_gem.c &g

Re: [Intel-gfx] [PATCH 3/4] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-09 Thread Fernando Pacheco
On 4/9/19 2:53 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:01) >> Currently we pin the GuC or HuC firmware image just >> before uploading. Perma-pin during uC initialization >> instead and use the range reserved at the top of the >>

Re: [Intel-gfx] [PATCH 2/4] drm/i915/uc: Reserve upper range of GGTT

2019-04-09 Thread Fernando Pacheco
On 4/9/19 2:41 PM, Chris Wilson wrote: > Quoting Fernando Pacheco (2019-04-09 22:31:00) >> GuC and HuC depend on struct_mutex for device >> reinitialization. Moving away from this dependency >> requires perma-pinning the firmware images in GGTT. >> The upper portion o

[Intel-gfx] [PATCH 4/4] Revert "drm/i915/guc: Disable global reset"

2019-04-09 Thread Fernando Pacheco
This reverts commit fe62365f9f80a1c1d438c54fba21f5108a182de8. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_reset.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reset.c b/drivers/gpu/drm/i915/i915_reset.c index 68875ba43b8d..6f823d81c428

[Intel-gfx] [PATCH 3/4] drm/i915/uc: Place uC firmware in upper range of GGTT

2019-04-09 Thread Fernando Pacheco
pinning for the rsa signature which will be used during HuC auth as addresses above GUC_GGTT_TOP do not map through GTT. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_gem.c | 2 + drivers/gpu/drm/i915/intel_guc.c| 9 ++- drivers/gpu/drm/i915/intel_guc_fw.c | 43

[Intel-gfx] [PATCH 1/4] drm/i915/uc: Rename uC firmware init function

2019-04-09 Thread Fernando Pacheco
The uC firmware init function is called during GuC/HuC init early phases. Rename to include "_early" and properly reflect which phase we are at. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- drivers/gpu/drm/i915/intel_huc_fw.c | 2 +- drivers/gp

[Intel-gfx] [PATCH 2/4] drm/i915/uc: Reserve upper range of GGTT

2019-04-09 Thread Fernando Pacheco
comfortably hold GuC/HuC firmware images. Signed-off-by: Fernando Pacheco --- drivers/gpu/drm/i915/i915_gem_gtt.c | 25 ++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 1 + drivers/gpu/drm/i915/intel_guc.h| 11 +++ 3 files changed, 34 insertions(+), 3 deletions(-) diff

[Intel-gfx] [PATCH 0/4] Perma-pin uC firmware and re-enable global reset

2019-04-09 Thread Fernando Pacheco
the firmware images above GUC_GGTT_TOP was discussed previously here: https://patchwork.freedesktop.org/patch/273616/ Cc: Chris Wilson Cc: Daniele Ceraolo Spurio Fernando Pacheco (4): drm/i915/uc: Rename uC firmware init function drm/i915/uc: Reserve upper range of GGTT drm/i915/uc: Place uC